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Change subject: mb/amd/chausie/devicetree: enable GFX HDA, ACP and XHCI2 devices
......................................................................
Patch Set 1: Code-Review+1
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Change subject: soc/amd/*/lpc: rename SPIROM_BASE_ADDRESS_REGISTER
......................................................................
Patch Set 2: Code-Review+1
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Change subject: {drivers/security}: Replace `cb_err_t` with `enum cb_err`
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Patchset:
PS1:
start siemens-bot
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Change subject: mb/google/brya/var/vell: Add 5G WWAN ACPI support for vell
......................................................................
Patch Set 16: Code-Review+1
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Change subject: {drivers/security}: Replace `cb_err_t` with `enum cb_err`
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
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PS1:
Thanks for fixing Subrata!
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Change subject: soc/amd/cezanne/psp_verstage: Log the platform boot mode report
......................................................................
Patch Set 3: Code-Review+1
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Change subject: util/release: Update genrelnotes with the latest version
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Patch Set 2: Code-Review+1
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Change subject: mb/google/brya/var/vell: Add 5G WWAN ACPI support for vell
......................................................................
mb/google/brya/var/vell: Add 5G WWAN ACPI support for vell
Add FM350GL 5G WWAN support using drivers/wwan/fm and addtional PM
features from RTD3.
BUG=b:220084872
TEST=emerge-brya coreboot
Change-Id: If6d3f965b8f6b6753446f55a8bd47d3b0c1ae7be
Signed-off-by: Robert Chen <robert.chen(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/brya/Kconfig.name
M src/mainboard/google/brya/variants/vell/gpio.c
M src/mainboard/google/brya/variants/vell/include/variant/gpio.h
3 files changed, 23 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/61847/16
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Werner Zeh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62699 )
Change subject: lib/spd: Do not print part number if it is not available
......................................................................
lib/spd: Do not print part number if it is not available
If the DRAM part number is not available in the SPD data (meaning filled
with 0x00) do not print it in the log.
Change-Id: If7224c6e114731b1c03915a2bde80f57369d0cee
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
---
M src/lib/spd_bin.c
1 file changed, 4 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/62699/1
diff --git a/src/lib/spd_bin.c b/src/lib/spd_bin.c
index 865f16c..1b236b0 100644
--- a/src/lib/spd_bin.c
+++ b/src/lib/spd_bin.c
@@ -167,8 +167,10 @@
case SPD_DRAM_DDR5:
case SPD_DRAM_LPDDR4:
case SPD_DRAM_LPDDR4X:
- *spd_name = (const char *) &spd[DDR4_SPD_PART_OFF];
- *len = DDR4_SPD_PART_LEN;
+ if (spd[DDR4_SPD_PART_OFF]) {
+ *spd_name = (const char *) &spd[DDR4_SPD_PART_OFF];
+ *len = DDR4_SPD_PART_LEN;
+ }
break;
default:
*len = 0;
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