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Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62420
to look at the new patch set (#4).
Change subject: mb/starlabs/labtop: Remove unused return value from MWAK
......................................................................
mb/starlabs/labtop: Remove unused return value from MWAK
Signed-off-by: Sean Rhodes <sean(a)starlabs.systems>
Change-Id: I00f8ea86a7e03a0b1bf9e68f75582a2ae70aef02
---
M src/mainboard/starlabs/labtop/acpi/sleep.asl
1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/62420/4
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Change subject: MAINTAINERS: Remove myself
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/siemens/mc_ehl: Increase SPD buffer size to 512 bytes
......................................................................
Patch Set 3: Code-Review+1
(1 comment)
File src/mainboard/siemens/mc_ehl/romstage_fsp_params.c:
https://review.coreboot.org/c/coreboot/+/62698/comment/2b095e05_108ca650
PS3, Line 17: 0x200
How about `CONFIG_DIMM_SPD_SIZE` instead?
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Change subject: soc/mediatek/common: Add halt() after triggering wdt reset
......................................................................
Patch Set 2:
(1 comment)
File src/soc/mediatek/common/wdt.c:
https://review.coreboot.org/c/coreboot/+/62752/comment/e6f66336_e578190f
PS1, Line 39: /*
: * We trigger secondary reset by triggering WDT hardware to send signal to EC.
: * We do not use do_board_reset() to send signal to EC
: * which is controlled by software driver.
: * Before triggering secondary reset, clean the data cache so the logs in cbmem
: * console (either in SRAM or DRAM) can be flushed.
: */
> move these comments into the new function.
Done
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Hello Hung-Te Lin, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: soc/mediatek/common: Add halt() after triggering wdt reset
......................................................................
soc/mediatek/common: Add halt() after triggering wdt reset
It's more reasonable to halt when we trigger watchdog reset because
whole system should be reset after we trigger watchdog reset.
BUG=b:222217317
TEST=build pass
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Change-Id: I726ba1599841f63b37062f9ce2e04840e4f250bb
---
M src/soc/mediatek/common/wdt.c
1 file changed, 20 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/62752/2
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Change subject: soc/mediatek/common: Add halt() after triggering wdt reset
......................................................................
Patch Set 1:
(1 comment)
File src/soc/mediatek/common/wdt.c:
https://review.coreboot.org/c/coreboot/+/62752/comment/72342439_8233817e
PS1, Line 39: /*
: * We trigger secondary reset by triggering WDT hardware to send signal to EC.
: * We do not use do_board_reset() to send signal to EC
: * which is controlled by software driver.
: * Before triggering secondary reset, clean the data cache so the logs in cbmem
: * console (either in SRAM or DRAM) can be flushed.
: */
move these comments into the new function.
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