coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/denverton_ns: enable Denverton to use common LPC code
by Jeff Daly (Code Review) 12 Mar '22

12 Mar '22

Attention is currently required from: Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph. Hello build bot (Jenkins), Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61019 to look at the new patch set (#11). Change subject: soc/intel/denverton_ns: enable Denverton to use common LPC code ...................................................................... soc/intel/denverton_ns: enable Denverton to use common LPC code Use Intel common SoC LPC code for Denverton refactor Signed-off-by: Jeff Daly <jeffd(a)silicom-usa.com> Change-Id: I46e55e5cdb9b8063575fe1ad7a53217ead9822e2 --- M src/soc/intel/common/block/lpc/lpc.c M src/soc/intel/denverton_ns/Kconfig A src/soc/intel/denverton_ns/include/soc/irq.h M src/soc/intel/denverton_ns/include/soc/p2sb.h A src/soc/intel/denverton_ns/include/soc/pcr_ids.h M src/soc/intel/denverton_ns/lpc.c 6 files changed, 151 insertions(+), 137 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/61019/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/61019 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I46e55e5cdb9b8063575fe1ad7a53217ead9822e2 Gerrit-Change-Number: 61019 Gerrit-PatchSet: 11 Gerrit-Owner: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/denverton_ns: enable Denverton to use common SoC SPI code
by Jeff Daly (Code Review) 12 Mar '22

12 Mar '22

Attention is currently required from: Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph. Hello build bot (Jenkins), Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Angel Pons, Michal Motyl, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61014 to look at the new patch set (#10). Change subject: soc/intel/denverton_ns: enable Denverton to use common SoC SPI code ...................................................................... soc/intel/denverton_ns: enable Denverton to use common SoC SPI code Use Intel common SoC SPI code for Denverton refactor Signed-off-by: Jeff Daly <jeffd(a)silicom-usa.com> Change-Id: Ic1d57c6b348adb934785b0e2bec4e856f0bf8d77 --- M src/soc/intel/common/block/spi/spi.c M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/spi.c 3 files changed, 12 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/61014/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/61014 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic1d57c6b348adb934785b0e2bec4e856f0bf8d77 Gerrit-Change-Number: 61014 Gerrit-PatchSet: 10 Gerrit-Owner: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/denverton_ns: enable Denverton to use common SoC XHCI code
by Jeff Daly (Code Review) 12 Mar '22

12 Mar '22

Attention is currently required from: Felix Singer, Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph. Hello Felix Singer, build bot (Jenkins), Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Angel Pons, Michal Motyl, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60992 to look at the new patch set (#11). Change subject: soc/intel/denverton_ns: enable Denverton to use common SoC XHCI code ...................................................................... soc/intel/denverton_ns: enable Denverton to use common SoC XHCI code Use Intel common SoC XHCI code for Denverton refactor Signed-off-by: Jeff Daly <jeffd(a)silicom-usa.com> Change-Id: I505b3a7761cb3719697626e1f272d0928fdd29f1 --- M src/soc/intel/common/block/xhci/xhci.c M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/chip.h M src/soc/intel/denverton_ns/xhci.c 4 files changed, 18 insertions(+), 30 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/60992/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/60992 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I505b3a7761cb3719697626e1f272d0928fdd29f1 Gerrit-Change-Number: 60992 Gerrit-PatchSet: 11 Gerrit-Owner: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/denverton_ns: enable Denverton to use common systemagent code
by Jeff Daly (Code Review) 12 Mar '22

12 Mar '22

Attention is currently required from: Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph. Hello build bot (Jenkins), Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61015 to look at the new patch set (#10). Change subject: soc/intel/denverton_ns: enable Denverton to use common systemagent code ...................................................................... soc/intel/denverton_ns: enable Denverton to use common systemagent code Use Intel common SoC systemagent code for Denverton refactor Signed-off-by: Jeff Daly <jeffd(a)silicom-usa.com> Change-Id: I39df1f0889c1c4ac6f2b3c25ccb7817e4492f446 --- M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/denverton_ns/bootblock/bootblock.c M src/soc/intel/denverton_ns/chip.h M src/soc/intel/denverton_ns/include/soc/iomap.h M src/soc/intel/denverton_ns/include/soc/nvs.h M src/soc/intel/denverton_ns/include/soc/soc_util.h M src/soc/intel/denverton_ns/include/soc/systemagent.h D src/soc/intel/denverton_ns/memmap.c M src/soc/intel/denverton_ns/soc_util.c M src/soc/intel/denverton_ns/systemagent.c 13 files changed, 217 insertions(+), 541 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/61015/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/61015 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I39df1f0889c1c4ac6f2b3c25ccb7817e4492f446 Gerrit-Change-Number: 61015 Gerrit-PatchSet: 10 Gerrit-Owner: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/denverton_ns/chip.c: add soc_acpi_name function
by Jeff Daly (Code Review) 12 Mar '22

12 Mar '22

Attention is currently required from: Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph. Hello build bot (Jenkins), Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Angel Pons, Michal Motyl, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60991 to look at the new patch set (#13). Change subject: soc/intel/denverton_ns/chip.c: add soc_acpi_name function ...................................................................... soc/intel/denverton_ns/chip.c: add soc_acpi_name function Intel common SoC code uses SoC-specific soc_acpi_name function to generate ACPI tables, add this to Denverton Signed-off-by: Jeff Daly <jeffd(a)silicom-usa.com> Change-Id: I5f50733656ca7724caf8a6570bcb21f7b761c3ce --- M src/soc/intel/denverton_ns/chip.c 1 file changed, 91 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/60991/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/60991 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5f50733656ca7724caf8a6570bcb21f7b761c3ce Gerrit-Change-Number: 60991 Gerrit-PatchSet: 13 Gerrit-Owner: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/var/primus{4es}: add eMMC enable pin in ramstage
by Casper Chang (Code Review) 12 Mar '22

12 Mar '22

Attention is currently required from: Paul Menzel. Casper Chang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62703 ) Change subject: mb/google/brya/var/primus{4es}: add eMMC enable pin in ramstage ...................................................................... Patch Set 7: (1 comment) Patchset: PS7: Hi all, could you please help to submit this CL? Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/62703 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1b6f164cc326bd368addb1e143ad2cbd449bb08d Gerrit-Change-Number: 62703 Gerrit-PatchSet: 7 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Sat, 12 Mar 2022 11:47:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: payloads/seabios: Update stable version to 1.16.0
by Felix Singer (Code Review) 12 Mar '22

12 Mar '22

Attention is currently required from: Martin Roth, Matt DeVillier, Paul Menzel, Stefan Reinauer. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62575 ) Change subject: payloads/seabios: Update stable version to 1.16.0 ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/62575/comment/3773234e_01a82a9c PS2, Line 11: > Tested how? I am waiting for MrChromebox to test, because he reported NVMe issues with 1.15.0 -- To view, visit https://review.coreboot.org/c/coreboot/+/62575 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I475a9be47171bfbe3b3c2d4d1d14bb753d8575a8 Gerrit-Change-Number: 62575 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Sat, 12 Mar 2022 08:15:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: payloads/seabios: Update stable version to 1.16.0
by Paul Menzel (Code Review) 12 Mar '22

12 Mar '22

Attention is currently required from: Felix Singer, Martin Roth, Matt DeVillier, Stefan Reinauer. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62575 ) Change subject: payloads/seabios: Update stable version to 1.16.0 ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/62575/comment/08336602_2bf597e1 PS2, Line 11: Tested how? -- To view, visit https://review.coreboot.org/c/coreboot/+/62575 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I475a9be47171bfbe3b3c2d4d1d14bb753d8575a8 Gerrit-Change-Number: 62575 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Sat, 12 Mar 2022 07:54:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: hp/z220_cmt_workstation: Add variant of z220_sff_workstation
by Paul Menzel (Code Review) 12 Mar '22

12 Mar '22

Attention is currently required from: Damien Zammit, Angel Pons. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62759 ) Change subject: hp/z220_cmt_workstation: Add variant of z220_sff_workstation ...................................................................... Patch Set 2: (1 comment) File src/mainboard/hp/z220_sff_workstation/variants/z220_cmt_workstation/gpio.c: PS1: > There's a handful of gpios that are different, not many. […] Angel, thank you for looking into this. Here you go: ``` $ diff -u src/mainboard/hp/z220_sff_workstation/variants/z220_sff_workstation/gpio.c src/mainboard/hp/z220_sff_workstation/variants/z220_cmt_workstation/gpio.c --- src/mainboard/hp/z220_sff_workstation/variants/z220_sff_workstation/gpio.c 2022-03-12 08:51:03.024153261 +0100 +++ src/mainboard/hp/z220_sff_workstation/variants/z220_cmt_workstation/gpio.c 2022-03-12 08:51:03.024153261 +0100 @@ -10,7 +10,7 @@ .gpio4 = GPIO_MODE_NATIVE, .gpio5 = GPIO_MODE_NATIVE, .gpio6 = GPIO_MODE_GPIO, - .gpio7 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_NATIVE, .gpio8 = GPIO_MODE_GPIO, .gpio9 = GPIO_MODE_NATIVE, .gpio10 = GPIO_MODE_NATIVE, @@ -41,7 +41,6 @@ .gpio0 = GPIO_DIR_INPUT, .gpio1 = GPIO_DIR_INPUT, .gpio6 = GPIO_DIR_INPUT, - .gpio7 = GPIO_DIR_INPUT, .gpio8 = GPIO_DIR_INPUT, .gpio13 = GPIO_DIR_INPUT, .gpio15 = GPIO_DIR_OUTPUT, @@ -63,20 +62,16 @@ .gpio29 = GPIO_LEVEL_HIGH, }; -static const struct pch_gpio_set1 pch_gpio_set1_reset = { +static const struct pch_gpio_set1 pch_gpio_set1_blink = { }; static const struct pch_gpio_set1 pch_gpio_set1_invert = { .gpio0 = GPIO_INVERT, .gpio1 = GPIO_INVERT, .gpio6 = GPIO_INVERT, - .gpio7 = GPIO_INVERT, .gpio13 = GPIO_INVERT, }; -static const struct pch_gpio_set1 pch_gpio_set1_blink = { -}; - static const struct pch_gpio_set2 pch_gpio_set2_mode = { .gpio32 = GPIO_MODE_GPIO, .gpio33 = GPIO_MODE_GPIO, @@ -92,7 +87,7 @@ .gpio43 = GPIO_MODE_GPIO, .gpio44 = GPIO_MODE_NATIVE, .gpio45 = GPIO_MODE_NATIVE, - .gpio46 = GPIO_MODE_GPIO, + .gpio46 = GPIO_MODE_NATIVE, .gpio47 = GPIO_MODE_NATIVE, .gpio48 = GPIO_MODE_GPIO, .gpio49 = GPIO_MODE_GPIO, @@ -113,7 +108,7 @@ }; static const struct pch_gpio_set2 pch_gpio_set2_direction = { - .gpio32 = GPIO_DIR_INPUT, + .gpio32 = GPIO_DIR_OUTPUT, .gpio33 = GPIO_DIR_INPUT, .gpio34 = GPIO_DIR_INPUT, .gpio35 = GPIO_DIR_INPUT, @@ -122,7 +117,6 @@ .gpio38 = GPIO_DIR_INPUT, .gpio39 = GPIO_DIR_INPUT, .gpio43 = GPIO_DIR_INPUT, - .gpio46 = GPIO_DIR_INPUT, .gpio48 = GPIO_DIR_INPUT, .gpio49 = GPIO_DIR_INPUT, .gpio54 = GPIO_DIR_INPUT, @@ -132,9 +126,7 @@ }; static const struct pch_gpio_set2 pch_gpio_set2_level = { -}; - -static const struct pch_gpio_set2 pch_gpio_set2_reset = { + .gpio32 = GPIO_LEVEL_LOW, }; static const struct pch_gpio_set3 pch_gpio_set3_mode = { @@ -164,9 +156,6 @@ .gpio71 = GPIO_LEVEL_LOW, }; -static const struct pch_gpio_set3 pch_gpio_set3_reset = { -}; - const struct pch_gpio_map mainboard_gpio_map = { .set1 = { .mode = &pch_gpio_set1_mode, @@ -174,18 +163,15 @@ .level = &pch_gpio_set1_level, .blink = &pch_gpio_set1_blink, .invert = &pch_gpio_set1_invert, - .reset = &pch_gpio_set1_reset, }, .set2 = { .mode = &pch_gpio_set2_mode, .direction = &pch_gpio_set2_direction, .level = &pch_gpio_set2_level, - .reset = &pch_gpio_set2_reset, }, .set3 = { .mode = &pch_gpio_set3_mode, .direction = &pch_gpio_set3_direction, .level = &pch_gpio_set3_level, - .reset = &pch_gpio_set3_reset, }, }; ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/62759 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I187dba9d9332aa3a8ee9207fc224a7d87da22c6f Gerrit-Change-Number: 62759 Gerrit-PatchSet: 2 Gerrit-Owner: Damien Zammit Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Damien Zammit Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 12 Mar 2022 07:52:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Damien Zammit Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: ec/starlabs/merlin: Always store EC values
by Sean Rhodes (Code Review) 12 Mar '22

12 Mar '22

Hello build bot (Jenkins), Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62741 to look at the new patch set (#7). Change subject: ec/starlabs/merlin: Always store EC values ...................................................................... ec/starlabs/merlin: Always store EC values The EC values will be changed when entering S3, S4 or S5, so move the function that stores the current settings outside of logic that restricts it to S4 or S5. This means the state isn't lost when entering S3. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Ia007a8ad9c08a309489e9f64f1ed311858bfcd10 --- M src/ec/starlabs/merlin/acpi/suspend.asl 1 file changed, 53 insertions(+), 55 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/62741/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/62741 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia007a8ad9c08a309489e9f64f1ed311858bfcd10 Gerrit-Change-Number: 62741 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit March 2022