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Change subject: util/ifdtool: Add Meteorlake platform support under IFDv2
......................................................................
util/ifdtool: Add Meteorlake platform support under IFDv2
BUG=b:b/224325352
TEST=Able to build ifdtool.
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I3564efa27d0271286435284e745458aada987008
---
M util/ifdtool/ifdtool.c
M util/ifdtool/ifdtool.h
2 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/61274/3
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John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62723 )
Change subject: soc/intel/common: Configure TCSS access through IOE P2SB
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62723/comment/e80b624b_216633b0
PS2, Line 2: John
> Please use your full name.
Ack
https://review.coreboot.org/c/coreboot/+/62723/comment/d4a76d83_e363393f
PS2, Line 9: This change abstracts the TCSS access through IOE P2SB on Meteor Lake.
> Please elaborate. […]
Apart from the existing common code Kconfig _TCSS_REG_ACCESS_REGBAR, this change only adds the TCSS access capability through Kconfig _TCSS_REG_ACCESS_SBI and _IOE_P2SB. There will be additional platform code ../soc/intel/meteorkake which selects the Kconfig _SBI and_IOE_P2SB along with other configuration to complete the TCSS access on Meteor Lake.
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62766 )
Change subject: soc/intel/tgl: Set DIMM_SPD_SIZE to 512
......................................................................
Set Ready For Review
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Hello build bot (Jenkins), Wonkyu Kim, Eric Lai, Angel Pons, Patrick Rudolph, EricR Lai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62723
to look at the new patch set (#3).
Change subject: soc/intel/common: Configure TCSS access through IOE P2SB
......................................................................
soc/intel/common: Configure TCSS access through IOE P2SB
This change abstracts the TCSS access through IOE P2SB on Meteor Lake.
BUG=b:213574324
TEST=Build platforms coreboot images successfully.
Change-Id: I3302aabfb5f540c41da6359f11376b4202c6310b
Signed-off-by: John Zhao <john.zhao(a)intel.com>
---
M src/soc/intel/common/block/tcss/tcss.c
1 file changed, 21 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/62723/3
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Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62703 )
Change subject: mb/google/brya/var/primus{4es}: add eMMC enable pin in ramstage
......................................................................
Patch Set 7: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62703/comment/67123942_b39ff6b1
PS5, Line 10: the
> Start a new sentence?
Done
Commit Message:
https://review.coreboot.org/c/coreboot/+/62703/comment/339f0b6b_015c867d
PS7, Line 9: Currently the BayHub eMMC enable pin is using the default
: configuration from the baseboard, which leads to RTD3 not being
: able to control the GPIO when exiting and entering suspend. To fix
: this, program the GPIO in the ramstage GPIO table.
Next time please reflow for 72 characters per line.
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Change subject: soc/intel/common: Configure TCSS access through IOE P2SB
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62723/comment/2ea58ab5_2d4940cc
PS2, Line 2: John
Please use your full name.
https://review.coreboot.org/c/coreboot/+/62723/comment/9e0de2b3_90c40f00
PS2, Line 9: This change abstracts the TCSS access through IOE P2SB on Meteor Lake.
Please elaborate. (For example: What is the current status?)
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Change subject: soc/intel/common: Configure TCSS access through IOE P2SB
......................................................................
Patch Set 2:
(1 comment)
File src/soc/intel/common/block/tcss/tcss.c:
https://review.coreboot.org/c/coreboot/+/62723/comment/9fbe99e4_7078001d
PS2, Line 389: else if (CONFIG(SOC_INTEL_COMMON_BLOCK_TCSS_REG_ACCESS_SBI)) {
> Is just SOC_INTEL_COMMON_BLOCK_IOE_P2SB sufficient enough?
Under the scope of SOC_INTEL_COMMON_BLOCK_REG_ACCESS_SBI, there is consideration for future platforms expansion beyond the Meteor Lake which has the IOE die. i.e,
else if (CONFIG(SOC_INTEL_COMMON_BLOCK_REG_ACCESS_SBI)) {
if (CONFIG(SOC_INTEL_COMMON_BLOCK_IOE_P2SB))
ioe_tcss_configure_aux_bias_pads_sbi(pads); // MTL with IOE
// TBD
else if (CONFIG(SOC_INTEL_COMMON_BLOCK_XYZ_P2SB))
xyz_tcss_configure_aux_bias_pads_sbi(pads); // XYZ platform
}
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