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Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
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Change subject: soc/mediatek: Trigger wdt SW reset when wdt status is not equal to 0
......................................................................
soc/mediatek: Trigger wdt SW reset when wdt status is not equal to 0
Because we close external signal in kernel driver since MT8195, it's
more reasonable we need to trigger sw reset with exteranl signal
again if the wdt status is not euqal to 0.
BUG=none
TEST=build pass
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Change-Id: Ic6128df7eadaebcf7ff8d4c5492e3e0cfbab6e36
---
M src/soc/mediatek/common/wdt.c
1 file changed, 13 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/62797/2
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Change subject: mb/google/brask/variants/moli: set eMMC pin in bootblock
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62770/comment/9033fa58_bd80976a
PS3, Line 9: 1.add eMMC enable pin in bootblock
: 2.set eMMC reset pin unable in bootblock
> suggestion: […]
Ok,
The first question, we follow the setting in primus.
In primus, it deasserted reset pin in bootblock.
The second question,
the reson why controller be powered on with reset asserted can refer to https://review.coreboot.org/c/coreboot/+/62703
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Change subject: mb/google/brya: set GPP_D0 to GPO
......................................................................
Patch Set 6: Code-Review+1
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Change subject: mb/google/brya/var/kinox: Modify the DPTF/Fan parameters
......................................................................
Patch Set 6:
(1 comment)
Patchset:
PS6:
Update Patchset6 for Thermal_paramters_list-0314.xlsx
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Change subject: mb/google/brya/var/vell: Add 5G WWAN ACPI support for vell
......................................................................
Patch Set 22:
(1 comment)
Patchset:
PS18:
> so is this obsolete due to CB:62771 ?
I think this one is also needed for Add FM350GL?
The GPIO changed is already merged for Redrix.
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Change subject: mb/google/brask/variants/moli: set eMMC pin in bootblock
......................................................................
Patch Set 5:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62770/comment/6aa9a816_ac2ad99d
PS3, Line 12:
> nit: remove extra blank line
done
File src/mainboard/google/brya/variants/moli/gpio.c:
https://review.coreboot.org/c/coreboot/+/62770/comment/fc7de85f_7c37ea74
PS3, Line 73: /* B3 : PROC_GP2 ==> EMMC_PERST_L */
: PAD_CFG_GPO(GPP_B3, 0, DEEP),
:
> Please keep line 75 and 73 together, the comment goes with the pad programming
done
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Hello build bot (Jenkins), Tim Wawrzynczak, Sumeet R Pawnikar, Nick Vaccaro, Zhuohao Lee,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#6).
Change subject: mb/google/brya/var/kinox: Modify the DPTF/Fan parameters
......................................................................
mb/google/brya/var/kinox: Modify the DPTF/Fan parameters
Follow the Thermal_paramters_list-0314.xlsx to modify DPTF/Fan parameters.
BUG=b:221180425, b:222020226, b:221182596
TEST=emerge-brask coreboot
Signed-off-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com>
Change-Id: I5f44120430029130d38b89d0eab6bbf205aca929
---
M src/mainboard/google/brya/variants/kinox/overridetree.cb
1 file changed, 141 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/62625/6
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Change subject: mb/google/brya/var/kinox: Modify the DPTF/Fan parameters
......................................................................
Patch Set 5:
(1 comment)
File src/mainboard/google/brya/variants/kinox/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/62625/comment/858cf328_0ea43a26
PS5, Line 139: 90, SHUTDOWN),
: [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN),
: [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 90, SHUTDOWN),
: [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 90
> Is there any specific reason for keeping the same 90 degree C temperature threshold for both Critica […]
Hi Sumeet,
I think we can discuess with thermal team on issue tracker.
The answer from from thermal team, “First of all for thanks thermal setting review.
Currently, we don’t have the test mechine for thermal test.
Therefore, we only can conservative predictions the Critical and Passive policies to protection the EVT unit.
And we modify the Critical policies from 90C to 93C.
Thanks.”
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