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Change subject: mb/google/brya: Remove mainboard.asl
......................................................................
Patch Set 4: Code-Review+2
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Change subject: soc/intel/xeon_sp: Remove the allocator workaround
......................................................................
Patch Set 4:
(1 comment)
File src/soc/intel/xeon_sp/chip_common.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144118):
https://review.coreboot.org/c/coreboot/+/62353/comment/ac4e0529_fb31e310
PS4, Line 63: res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
line over 96 characters
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Hello build bot (Jenkins), Anjaneya "Reddy" Chagam, Jonathan Zhang, Johnny Lin, Christian Walter, Angel Pons, Arthur Heymans, Patrick Rudolph, Tim Chu,
I'd like you to reexamine a change. Please visit
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Change subject: soc/intel/xeon_sp: Remove the allocator workaround
......................................................................
soc/intel/xeon_sp: Remove the allocator workaround
The xeon_sp was redoing a large part of the PCI allocation on its own
to deal with multiple PCI root ports. This is not handled using
multiple domains.
This requires the use of the resource allocator V4.6.
Tested on ocp/deltalake.
Change-Id: Iedca35cca8350eb53b5be04c42474d2b4c9d347f
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/device/Kconfig
M src/soc/intel/xeon_sp/Kconfig
M src/soc/intel/xeon_sp/chip_common.c
M src/soc/intel/xeon_sp/cpx/chip.c
M src/soc/intel/xeon_sp/include/soc/chip_common.h
M src/soc/intel/xeon_sp/skx/chip.c
6 files changed, 86 insertions(+), 502 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/62353/4
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Change subject: mb/google/skyrim: Add counter initializers
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
You can probably abandon this patch.
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Change subject: soc/amd/sabrina: Add counter initializers
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Patch Set 6: Code-Review+2
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Change subject: soc/amd/sabrina: Add counter initializers
......................................................................
soc/amd/sabrina: Add counter initializers
Some counters are not being initialized and are relying on mainboards to
set their values. If the mainboards have not implemented these
functions it leads to indeterminate behavior.
BUG=b:224618411
TEST=builds
Signed-off-by: Jon Murphy <jpmurphy(a)google.com>
Change-Id: I8d4f5b1124d4017b04bcaf7044216fd696dce63d
---
M src/soc/amd/sabrina/fsp_m_params.c
1 file changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/62863/6
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Change subject: payloads/LinuxBoot: Fix u-root branch
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
File payloads/external/LinuxBoot/Kconfig:
https://review.coreboot.org/c/coreboot/+/62590/comment/e452ceee_7708be79
PS1, Line 188: master
Also rename this?
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Change subject: soc/amd/sabrina: Add counter initializers
......................................................................
Patch Set 5:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62863/comment/7b277828_c69b4134
PS5, Line 10: functions
nit: newline
File src/soc/amd/sabrina/fsp_m_params.c:
https://review.coreboot.org/c/coreboot/+/62863/comment/0446ac0f_2a5d51ff
PS5, Line 50: fsp_dxio
Maybe set to NULL too?
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