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Change subject: soc/amd/common/block: Add mainboard_handle_smi
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
File src/soc/amd/common/block/cpu/smm/smi_handler.c:
https://review.coreboot.org/c/coreboot/+/62598/comment/a3d7e389_60b20a96
PS2, Line 10: int
i would use an unsigned int here. since this will require making the parameters of other functions and local variables unsigned int too, that's something for another patch though
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Hello Nico Huber, Arthur Heymans,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62865
to look at the new patch set (#2).
Change subject: device: Introduce v4.6 resource allocator
......................................................................
device: Introduce v4.6 resource allocator
This is not a complete rewrite, more an adaptation of the v4 allocator.
For the moment, I suggest this for experiments, until we have a better
understanding what we require from the resource allocator.
It differs mostly in pass 2. Instead of searching memranges for every
bridge, we only do that for the top level and finish the calculations
of pass 1 at the bridge level. And we don't handle above-4G resources
separately. This implies that we need a top-down allocation at the top
level to place things above 4G, which will be added in a later commit.
Detailed list of functional differences in v4.5
--------------------------------------------
Pass 1:
* Completely ignore resources with 0 limit.
* Don't propagate above-4G flag. Propagation makes it harder to
effectively opt-out from 4G, e.g. for boot graphics / network
devices. OTOH, this way resources can only be placed above 4G
if all resources downstream of a bridge allow it.
* Store the calculated `base` offset in the resources (like v3
did). This allows us to skip the largest_resource() walk at
the bridge level in pass 2.
Pass 2:
* No separate handling for above-4G resources. They'll need a
top-down mode.
* No memranges at the bridge-level. Instead we simply add the
offset that was pre-calculated in pass 1 to the allocated
`base` of the bridge resource. This lowers the computational
complexity of pass 2. But there's likely no measurable impact
for our usual, shallow device trees.
Beside that, there is some heavy refactoring: All the resource
printing is factored out into separate functions. This results
in one-liners in the actual program code which hopefully will
distract less during reading. Some thin functions are manually
inlined where it seems to improve readability, and comments are
adapted and re-flown to 72 columns (counting from indentation
level).
V4.6
----
* Allow for multiple domain resources.
TEST=Works fine on OCP deltalake using multiple domains
Change-Id: I462b384860b7e183b51118490417fb9106f0c7a1
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/device/Kconfig
M src/device/Makefile.inc
M src/northbridge/amd/agesa/family14/Kconfig
M src/northbridge/amd/agesa/family15tn/Kconfig
M src/northbridge/amd/agesa/family16kb/Kconfig
M src/northbridge/amd/pi/00730F01/Kconfig
6 files changed, 25 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/62865/2
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Change subject: device: Introduce v4.6 resource allocator
......................................................................
Patch Set 1:
(1 comment)
File src/device/resource_allocator_v4.5.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144128):
https://review.coreboot.org/c/coreboot/+/62865/comment/05d30878_4ed84ac7
PS1, Line 419: void assign_resource_cb(void *param, struct device *dev, struct resource *res)
open brace '{' following function definitions go on the next line
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Change subject: device: Introduce v4.6 resource allocator
......................................................................
Patch Set 1:
(1 comment)
File src/device/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/62865/comment/0c9d96e6_cb688414
PS1, Line 64: ramstage-$(CONFIG_RESOURCE_ALLOCATOR_V4_5) += resource_allocator_v4.5.c
that won't fly ^^
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Change subject: mb/google/skyrim: Add counter initializers
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
> You can probably abandon this patch.
fixing this at soc level should be sufficient
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Change subject: soc/amd/sabrina: Add counter initializers
......................................................................
Patch Set 6: Code-Review+2
(1 comment)
Patchset:
PS6:
please also fix this for the earlier socs. i'm ok with either doing that in this patch or in follow-up patches
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Change subject: mb/hp/snb_ivb_laptops: Move selects from Kconfig.name to Kconfig
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62816/comment/1565ccae_ef81b8b9
PS2, Line 10: at
> Um, are you sure? I think "at" is correct here.
https://www.reddit.com/r/grammar/comments/cogcz6/deleted_by_user/
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Change subject: soc/intel/xeon_sp: Remove the allocator workaround
......................................................................
Patch Set 5: Verified+1
(1 comment)
File src/soc/intel/xeon_sp/chip_common.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144125):
https://review.coreboot.org/c/coreboot/+/62353/comment/eba76435_3856f513
PS5, Line 63: res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
line over 96 characters
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