coreboot-gerrit March 2022

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Change in coreboot[master]: mb/google/skyrim: Add DXIO descriptors
by Jon Murphy (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Raul Rangel, Karthik Ramasubramanian, Felix Held. Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62903 ) Change subject: mb/google/skyrim: Add DXIO descriptors ...................................................................... Patch Set 8: (11 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62903/comment/29756271_9bfeee91 PS3, Line 13: TEST=Builds > Requested assistance from factory bring up team in testing the patch Should get hardware today or Monday and can test patch locally as well. File src/mainboard/google/skyrim/port_descriptors.c: https://review.coreboot.org/c/coreboot/+/62903/comment/96406ec5_5e2c720a PS8, Line 12: 0 > 1 Done https://review.coreboot.org/c/coreboot/+/62903/comment/a4956ebb_4d67f6ca PS8, Line 13: 0 > 1 Done https://review.coreboot.org/c/coreboot/+/62903/comment/1c9131ad_ebb983f8 PS8, Line 24: 1 > 0 Done https://review.coreboot.org/c/coreboot/+/62903/comment/e196ccb2_df7d46d8 PS8, Line 25: 1 > 0 Done https://review.coreboot.org/c/coreboot/+/62903/comment/3cfecd26_e3719d29 PS8, Line 38: .start_logical_lane = 2, : .end_logical_lane = 3, > not sure if the numbers need to be swapped or not Ack https://review.coreboot.org/c/coreboot/+/62903/comment/a4b3c651_8272755e PS8, Line 49: {/* unused MXM */ : .engine_type = UNUSED_ENGINE, : .port_present = false, : .start_logical_lane = 4, : .end_logical_lane = 7, : .device_number = 0, : .function_number = 0, : .link_speed_capability = GEN3, : .turn_off_unused_lanes = true, : }, : { /* unused MXM2 */ : .engine_type = UNUSED_ENGINE, : .port_present = false, : .start_logical_lane = 8, : .end_logical_lane = 11, : .device_number = 0, : .function_number = 0, : .link_speed_capability = GEN3, : .turn_off_unused_lanes = true, : }, : { /* unused MXM3 */ : .engine_type = UNUSED_ENGINE, : .port_present = false, : .start_logical_lane = 12, : .end_logical_lane = 15, : .device_number = 0, : .function_number = 0, : .link_speed_capability = GEN3, : .turn_off_unused_lanes = true, : }, : { /* unused SSD2 */ : .engine_type = UNUSED_ENGINE, : .port_present = false, : .start_logical_lane = 16, : .end_logical_lane = 19, : .device_number = 0, : .function_number = 0, : .link_speed_capability = GEN3, : .turn_off_unused_lanes = true, : }, > can this be removed? Done https://review.coreboot.org/c/coreboot/+/62903/comment/615c3662_40d92437 PS8, Line 98: DDI_HDMI > DDI_DP Done https://review.coreboot.org/c/coreboot/+/62903/comment/9b3e7708_da981995 PS8, Line 102: { /* DDI2 - DP (type C) */ > i'm not 100% sure if ddi2 is a dummy and ddi3 and 4 are the type c ones or if ddi2 and 3 are the typ […] Ack File src/mainboard/google/skyrim/variants/baseboard/devicetree.cb: https://review.coreboot.org/c/coreboot/+/62903/comment/713d7074_678a805e PS8, Line 50: device ref gpp_bridge_0 on # WLAN : chip drivers/wifi/generic : register "wake" = "GEVENT_8" : device pci 00.0 on end : end : end : device ref gpp_bridge_1 on end # SD > wifi before sd turned out to be the correct order after figuring out how the physical to logical lan […] Done File src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h: https://review.coreboot.org/c/coreboot/+/62903/comment/a498f1f4_b7e57335 PS8, Line 9: : #define SD_DEVFN PCIE_GPP_2_0_DEVFN : #define WLAN_DEVFN PCIE_GPP_2_1_DEVFN > swap Done -- To view, visit https://review.coreboot.org/c/coreboot/+/62903 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib68cf3d64641b006e0f2c4805af22b44a505a0d1 Gerrit-Change-Number: 62903 Gerrit-PatchSet: 8 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 18 Mar 2022 16:25:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jon Murphy <jpmurphy(a)google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/taeko: Enable Genesys L1 entry delay
by Kevin Chang (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Peichao Wang, Tim Wawrzynczak. Kevin Chang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62918 ) Change subject: mb/google/brya/var/taeko: Enable Genesys L1 entry delay ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/62918 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I142a816611e204e6c8577d15b3f0a0e08251f848 Gerrit-Change-Number: 62918 Gerrit-PatchSet: 3 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 18 Mar 2022 16:19:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/skyrim: Add ACPI configuration for USB ports
by Jon Murphy (Code Review) 18 Mar '22

18 Mar '22

Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62153 ) Change subject: mb/google/skyrim: Add ACPI configuration for USB ports ...................................................................... Patch Set 37: (1 comment) File src/mainboard/google/skyrim/variants/baseboard/devicetree.cb: https://review.coreboot.org/c/coreboot/+/62153/comment/86aff4c6_c6d0934d PS37, Line 79: 2.3 > CB:62713 CB:62713 was merged, can we close this comment? -- To view, visit https://review.coreboot.org/c/coreboot/+/62153 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1b05f190f25dca1566e1023011cc70c2d32f461 Gerrit-Change-Number: 62153 Gerrit-PatchSet: 37 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 18 Mar 2022 16:19:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/taeko: Disable GL9763e PCIE port L0s
by Kevin Chang (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Paul Menzel, Tim Wawrzynczak. Kevin Chang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62919 ) Change subject: mb/google/brya/var/taeko: Disable GL9763e PCIE port L0s ...................................................................... Patch Set 3: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62919/comment/674f140f_0bed5765 PS2, Line 9: didn't > doesn’t Update in latest patch. https://review.coreboot.org/c/coreboot/+/62919/comment/57b1188a_ccf353c5 PS2, Line 9: disable > Missing third person s? disables Update in latest patch. https://review.coreboot.org/c/coreboot/+/62919/comment/364fbf0e_2a3476d9 PS2, Line 12: TEST=Build FW and run stress exceed 2500 cycles. > Did it fail before? If yes, please mention that at the beginning of the commit message. No, it didn't fail with this setting before. This is suggestion from vendor. -- To view, visit https://review.coreboot.org/c/coreboot/+/62919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19b5f3dc8d95e153301d777492c921ce582ba988 Gerrit-Change-Number: 62919 Gerrit-PatchSet: 3 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 18 Mar 2022 16:18:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/taeko: Disable GL9763e PCIE port L0s
by Kevin Chang (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Kevin Chang, Tim Wawrzynczak. Kevin Chang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62919 ) Change subject: mb/google/brya/var/taeko: Disable GL9763e PCIE port L0s ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/62919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19b5f3dc8d95e153301d777492c921ce582ba988 Gerrit-Change-Number: 62919 Gerrit-PatchSet: 3 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 18 Mar 2022 16:17:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add UfsEnable parameter
by Eric Lai (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Rizwan Qureshi, Tim Wawrzynczak, Meera Ravindranath. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62914 ) Change subject: soc/intel/alderlake: Add UfsEnable parameter ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: If it's really port2, need Intel update the EDS and add some comment in the UPD. Per EDS, if only support 1 UFS should be index 0... -- To view, visit https://review.coreboot.org/c/coreboot/+/62914 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic9b956204fb1001977d86c0d898b2734efb32271 Gerrit-Change-Number: 62914 Gerrit-PatchSet: 2 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Comment-Date: Fri, 18 Mar 2022 16:13:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Enable PSP_POSTCODES_ON_ESPI config
by Jon Murphy (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Raul Rangel, Rob Barnes, Karthik Ramasubramanian. Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62881 ) Change subject: mb/google/guybrush: Enable PSP_POSTCODES_ON_ESPI config ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/62881 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic3930a037d37275c4130004079cd1afedcc13356 Gerrit-Change-Number: 62881 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 18 Mar 2022 16:13:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/skyrim/devicetree: set PSPP policy to DXIO_PSPP_DISABLED
by Jon Murphy (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Felix Held. Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62924 ) Change subject: mb/google/skyrim/devicetree: set PSPP policy to DXIO_PSPP_DISABLED ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/62924 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ea602596acb8e5ea92076386e80102c3bc757af Gerrit-Change-Number: 62924 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 18 Mar 2022 16:12:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/skyrim: Build APCB sources into amdfw when present
by Felix Held (Code Review) 18 Mar '22

18 Mar '22

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62877 ) Change subject: mb/google/skyrim: Build APCB sources into amdfw when present ...................................................................... Patch Set 3: Code-Review+2 (1 comment) Patchset: PS3: > oh, sorry for the confusion, this is in skyrim's makefile, so it's all good was looking at the sabrina soc makfile in parallel on another screen and mixed up things -- To view, visit https://review.coreboot.org/c/coreboot/+/62877 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I71b30a5716f2e0d60d07a0ec29f98609c1f2a8b7 Gerrit-Change-Number: 62877 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Comment-Date: Fri, 18 Mar 2022 16:09:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/skyrim/devicetree: set PSPP policy to DXIO_PSPP_DISABLED
by Raul Rangel (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Jon Murphy, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62924 ) Change subject: mb/google/skyrim/devicetree: set PSPP policy to DXIO_PSPP_DISABLED ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62924 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ea602596acb8e5ea92076386e80102c3bc757af Gerrit-Change-Number: 62924 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 18 Mar 2022 16:08:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit March 2022