coreboot-gerrit March 2022

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Change in coreboot[master]: drivers/intel/fsp2_0: Add provision to extract FSP Performance Data
by build bot (Jenkins) (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Nick Vaccaro, Andrey Petrov. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62942 ) Change subject: drivers/intel/fsp2_0: Add provision to extract FSP Performance Data ...................................................................... Patch Set 3: (1 comment) File src/drivers/intel/fsp2_0/fsp_timestamp.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144341): https://review.coreboot.org/c/coreboot/+/62942/comment/dc36f0d4_c74d6ad8 PS3, Line 107: rec = (const struct generic_event_record *)((uint8_t *)rec + rec->header.length); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/62942 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1b7f6b98bafeec0afe843f0f78c99c2f34f50b3 Gerrit-Change-Number: 62942 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Mon, 21 Mar 2022 09:00:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0: Add provision to extract FSP Performance Data
by Subrata Banik (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Subrata Banik, Maulik V Vaghela, Tim Wawrzynczak, Nick Vaccaro, Andrey Petrov. Hello build bot (Jenkins), Kangheui Won, Maulik V Vaghela, Tim Wawrzynczak, Nick Vaccaro, Eric Lai, Andrey Petrov, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62942 to look at the new patch set (#3). Change subject: drivers/intel/fsp2_0: Add provision to extract FSP Performance Data ...................................................................... drivers/intel/fsp2_0: Add provision to extract FSP Performance Data This patch enriches coreboot FSP2.0 driver to extract the FSP timestamp from FPDT (Firmware Performance Data Table) and display as part of either BS_PAYLOAD_LOAD or BS_OS_RESUME boot stage if the SoC user selects the required `GET_FSP_TIMESTAMP` config. The prerequisite to this implementation is to have FSP binary built with `PcdFspPerformanceEnable` PCD set to `TRUE` to allow FSP to populate the FPDT HOB. BUG=b:216635831 TEST=Able to dump FSP performance data with GET_FSP_TIMESTAMP Kconfig selected and met the FSP prerequisites. +--------------------------------------------------+ |------ FSP Performance Timestamp Table Dump ------| +--------------------------------------------------+ |Perf-ID Timestamp(ms) String/GUID | +--------------------------------------------------+ 0 460253 SEC/52c05b14-0b98-496c-bc3b04b50211d680 50 460263 PEI/52c05b14-0b98-496c-bc3b04b50211d680 40 460274 PreMem/52c05b14-0b98-496c-bc3b04b50211d680 1 495803 9b3ada4f-ae56-4c24-8deaf03b7558ae50 2 508959 9b3ada4f-ae56-4c24-8deaf03b7558ae50 1 515253 6141e486-7543-4f1a-a579ff532ed78e75 2 525453 6141e486-7543-4f1a-a579ff532ed78e75 1 532059 baeb5bee-5b33-480a-8ab7b29c85e7ceab 2 546806 baeb5bee-5b33-480a-8ab7b29c85e7ceab 1 553302 1b04374d-fa9c-420f-ac62fee6d45e8443 2 563859 1b04374d-fa9c-420f-ac62fee6d45e8443 1 569955 88c17e54-ebfe-4531-a992581029f58126 2 575753 88c17e54-ebfe-4531-a992581029f58126 1 582099 a8499e65-a6f6-48b0-96db45c266030d83 50f0 599599 unknown name/3112356f-cc77-4e82-86d53e25ee8192a4 50f1 716649 unknown name/3112356f-cc77-4e82-86d53e25ee8192a4 2 728507 a8499e65-a6f6-48b0-96db45c266030d83 1 734755 9e1cc850-6731-4848-87526673c7005eee .... Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: Ia1b7f6b98bafeec0afe843f0f78c99c2f34f50b3 --- M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/Makefile.inc A src/drivers/intel/fsp2_0/fsp_timestamp.c 3 files changed, 120 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/62942/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/62942 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1b7f6b98bafeec0afe843f0f78c99c2f34f50b3 Gerrit-Change-Number: 62942 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/var/taeko: Enable Genesys L1 entry delay
by Subrata Banik (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Kevin Chang, Peichao Wang, Tim Wawrzynczak. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62918 ) Change subject: mb/google/brya/var/taeko: Enable Genesys L1 entry delay ...................................................................... Patch Set 4: Code-Review+1 (1 comment) Patchset: PS4: will let Tim and others to review. -- To view, visit https://review.coreboot.org/c/coreboot/+/62918 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I142a816611e204e6c8577d15b3f0a0e08251f848 Gerrit-Change-Number: 62918 Gerrit-PatchSet: 4 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Mon, 21 Mar 2022 08:41:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/genesyslogic/gl9763e: Add set L1 entry delay to Max for GL9763E
by Subrata Banik (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Ben Chuang, Tim Wawrzynczak, Paul Menzel. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62917 ) Change subject: drivers/genesyslogic/gl9763e: Add set L1 entry delay to Max for GL9763E ...................................................................... Patch Set 4: Code-Review+1 (1 comment) Patchset: PS4: will let Tim and others to review. -- To view, visit https://review.coreboot.org/c/coreboot/+/62917 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19d4dfb7b873d09ff30ad4d2d63b876047c21601 Gerrit-Change-Number: 62917 Gerrit-PatchSet: 4 Gerrit-Owner: Ben Chuang <benchuanggli(a)gmail.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Lai Jason <jasonlai.genesyslogic(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ben Chuang <benchuanggli(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 21 Mar 2022 08:40:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/genesyslogic/gl9763e: Add set L1 entry delay to Max for GL9763E
by Ben Chuang (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Paul Menzel. Ben Chuang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62917 ) Change subject: drivers/genesyslogic/gl9763e: Add set L1 entry delay to Max for GL9763E ...................................................................... Patch Set 4: (1 comment) File src/drivers/genesyslogic/gl9763e/gl9763e.c: https://review.coreboot.org/c/coreboot/+/62917/comment/506e8cd8_1325d6b0 PS3, Line 27: { > nit: you can drop this Done. -- To view, visit https://review.coreboot.org/c/coreboot/+/62917 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19d4dfb7b873d09ff30ad4d2d63b876047c21601 Gerrit-Change-Number: 62917 Gerrit-PatchSet: 4 Gerrit-Owner: Ben Chuang <benchuanggli(a)gmail.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Lai Jason <jasonlai.genesyslogic(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 21 Mar 2022 08:19:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: commonlib/bsd/helpers: Move STRINGIFY() from string.h
by Jakub Czapiga (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Tim Wawrzynczak, Julius Werner. Jakub Czapiga has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62921 ) Change subject: commonlib/bsd/helpers: Move STRINGIFY() from string.h ...................................................................... Patch Set 2: (1 comment) File src/commonlib/bsd/include/commonlib/bsd/helpers.h: https://review.coreboot.org/c/coreboot/+/62921/comment/48e7e6bc_77361c8d PS2, Line 15: #define ALIGN(x, a) __ALIGN_MASK(x, (__typeof__(x))(a)-1UL) ALIGN(), ALIGN_UP(), GiB, etc. are conflicting with libpayload's defines when included in <\commonlib/timestamp_sierialized.h -> commonlib/bsd/helpers.h. Fail can be seen in CB:62709. Should it these defines be guarded with #ifndef? Or maybe it would be easier to just leave STRINGIFY() in string.h of coreboot and redefine it in timestamp_serialized.h just for this(CB:62709) case? -- To view, visit https://review.coreboot.org/c/coreboot/+/62921 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3263b2aa7657759207bf6ffda750d839e741f99c Gerrit-Change-Number: 62921 Gerrit-PatchSet: 2 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Mon, 21 Mar 2022 08:16:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/genesyslogic/gl9763e: Add set L1 entry delay to Max for GL9763E
by Ben Chuang (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Ben Chuang, Tim Wawrzynczak, Paul Menzel. Hello build bot (Jenkins), Peichao Wang, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62917 to look at the new patch set (#4). Change subject: drivers/genesyslogic/gl9763e: Add set L1 entry delay to Max for GL9763E ...................................................................... drivers/genesyslogic/gl9763e: Add set L1 entry delay to Max for GL9763E Add an option to set L1 entry delay to Max for GL9763E. The L1 entry delay will be changed to expected value by sdhci-pci-gli driver in Linux v5.14. BUG=b:220079865 TEST=build and verify the value of GL9763E's 0x8A4[28:19] register is 0x3FF. Change-Id: I19d4dfb7b873d09ff30ad4d2d63b876047c21601 Signed-off-by: Ben Chuang <benchuanggli(a)gmail.com> --- M src/drivers/genesyslogic/gl9763e/Kconfig M src/drivers/genesyslogic/gl9763e/gl9763e.c M src/drivers/genesyslogic/gl9763e/gl9763e.h 3 files changed, 13 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/62917/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/62917 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19d4dfb7b873d09ff30ad4d2d63b876047c21601 Gerrit-Change-Number: 62917 Gerrit-PatchSet: 4 Gerrit-Owner: Ben Chuang <benchuanggli(a)gmail.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Lai Jason <jasonlai.genesyslogic(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ben Chuang <benchuanggli(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/var/primus{4es}: add delay time to rtd3-cold
by Paul Menzel (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Terry Chen, Tim Wawrzynczak. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62949 ) Change subject: mb/google/brya/var/primus{4es}: add delay time to rtd3-cold ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/62949/comment/2fe65ae0_8a4dfa5a PS3, Line 12: Please document, where these delay times are from. Datasheet? -- To view, visit https://review.coreboot.org/c/coreboot/+/62949 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ab4fdf0ee73b819b3c203e995ac9d5ae0d24bd0 Gerrit-Change-Number: 62949 Gerrit-PatchSet: 3 Gerrit-Owner: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Mon, 21 Mar 2022 07:55:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: /mb/google/brya/var/taniks: Modify DPTF setting for taniks
by Paul Menzel (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: YH Lin, Joey Peng, Tim Wawrzynczak. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62952 ) Change subject: /mb/google/brya/var/taniks: Modify DPTF setting for taniks ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62952/comment/00f8d298_cd105235 PS1, Line 7: /mb/google/brya/var/taniks: Modify DPTF setting for taniks Please write something like: > Increase … from 40 °C to 70 °C https://review.coreboot.org/c/coreboot/+/62952/comment/03143f7d_84f1a5b7 PS1, Line 12: TEST=build and tested on taniks board Tested how? Just booted or ran some benchmark? -- To view, visit https://review.coreboot.org/c/coreboot/+/62952 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I567815782ece4ab7fcec7da6b787ee9eec27aba4 Gerrit-Change-Number: 62952 Gerrit-PatchSet: 1 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Mon, 21 Mar 2022 07:53:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/kinox: Modify DDR4 to non-interleaved
by Dtrain Hsu (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Tim Wawrzynczak. Hello build bot (Jenkins), Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62953 to look at the new patch set (#3). Change subject: mb/google/brya/var/kinox: Modify DDR4 to non-interleaved ...................................................................... mb/google/brya/var/kinox: Modify DDR4 to non-interleaved Kinox is designed to 8-layer PCB. In order to reduce the length of memory singals, the DDR4 is designed from interleaved to non-interleaved. BUG=b:210094309 TEST=emerge-brask coreboot Signed-off-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Change-Id: I03c6fcccf8b1646cec1a35cc1f9cbb1cfb942c4e --- M src/mainboard/google/brya/variants/kinox/Makefile.inc A src/mainboard/google/brya/variants/kinox/memory.c 2 files changed, 32 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/62953/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/62953 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I03c6fcccf8b1646cec1a35cc1f9cbb1cfb942c4e Gerrit-Change-Number: 62953 Gerrit-PatchSet: 3 Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit March 2022