Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62992 )
Change subject: vendorcode/intel: Remove UDK2015 headers
......................................................................
vendorcode/intel: Remove UDK2015 headers
The headers are now unused, drop them.
Change-Id: Ibfaa3029ddc614935481ce736c9d971bf4831b5d
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/vendorcode/intel/Kconfig
M src/vendorcode/intel/Makefile.inc
D src/vendorcode/intel/edk2/UDK2015/IntelFsp2Pkg/Include/FspDataTable.h
D src/vendorcode/intel/edk2/UDK2015/IntelFsp2Pkg/Include/FspEas.h
D src/vendorcode/intel/edk2/UDK2015/IntelFsp2Pkg/Include/FspEas/FspApi.h
D src/vendorcode/intel/edk2/UDK2015/IntelFsp2Pkg/Include/FspGlobalData.h
D src/vendorcode/intel/edk2/UDK2015/IntelFsp2Pkg/Include/FspMeasurePointId.h
D src/vendorcode/intel/edk2/UDK2015/IntelFsp2Pkg/Include/FspStatusCode.h
D src/vendorcode/intel/edk2/UDK2015/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
D src/vendorcode/intel/edk2/UDK2015/IntelFsp2Pkg/Include/Guid/GuidHobFspEas.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Base.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Guid/FirmwareFileSystem2.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Guid/HiiFormMapMethodGuid.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Guid/PcAnsi.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Guid/WinCertificate.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Ia32/ProcessorBind.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/IndustryStandard/Acpi.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/IndustryStandard/Acpi10.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/IndustryStandard/Acpi20.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/IndustryStandard/Acpi30.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/IndustryStandard/Acpi40.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/IndustryStandard/Acpi50.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/IndustryStandard/Acpi51.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/IndustryStandard/Acpi60.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/IndustryStandard/AcpiAml.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/IndustryStandard/Bluetooth.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/IndustryStandard/PeImage.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Library/HobLib.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Pi/PiBootMode.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Pi/PiFirmwareFile.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Pi/PiFirmwareVolume.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Pi/PiHob.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Protocol/DevicePath.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Protocol/GraphicsOutput.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Protocol/SimpleTextIn.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Protocol/SimpleTextInEx.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Protocol/SimpleTextOut.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Uefi.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Uefi/UefiBaseType.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Uefi/UefiGpt.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Uefi/UefiInternalFormRepresentation.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Uefi/UefiMultiPhase.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Uefi/UefiPxe.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/Uefi/UefiSpec.h
D src/vendorcode/intel/edk2/UDK2015/MdePkg/Include/X64/ProcessorBind.h
45 files changed, 0 insertions(+), 24,574 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/62992/1
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Mark Hsieh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62991 )
Change subject: mb/google/brya/var/gimble: Include 4 new SPDs
......................................................................
Patch Set 1:
This change is ready for review.
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Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62990 )
Change subject: drivers/smmstore: Enable 4KiB blocks in SMMSTORE
......................................................................
Patch Set 1:
This change is ready for review.
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Sean Rhodes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/62037 )
Change subject: payloads/tianocore: Pass SPI_4K_WRITES build option
......................................................................
Abandoned
Abandoned in favour of 62990
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Change subject: ec/google: Add PSRC and PBOK method
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS3:
> Could you update the comment as well :p thanks! Will +2 after.
done
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya: Add DPTF power participant for brya
......................................................................
mb/google/brya: Add DPTF power participant for brya
Select DRIVERS_INTEL_DPTF_SUPPORTS_TPWR to add power participant
for brya
Signed-off-by: Varshit B Pandya <varshit.b.pandya(a)intel.com>
Change-Id: I463aa6fea6fdef9c9ae68d5425272d233c8c5743
---
M src/mainboard/google/brya/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/62947/4
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Hello build bot (Jenkins), Subrata Banik, Rizwan Qureshi, Tim Wawrzynczak, Eric Lai,
I'd like you to reexamine a change. Please visit
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Change subject: ec/google: Notify DPTF driver power participant on PD event
......................................................................
ec/google: Notify DPTF driver power participant on PD event
The DPTF power participant device needs to be notified when
power source changes so it can re-evaluate power source and
power source change count, this can be later used by DPTF along
with methods provided by EC.
BUG=b:205928013
TEST=Build, boot brya0 and dump DSDT to check change
Signed-off-by: Varshit B Pandya <varshit.b.pandya(a)intel.com>
Change-Id: I07f58b928a0dba92bec3817177142c586e5014b9
---
M src/ec/google/chromeec/acpi/ec.asl
1 file changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/62946/4
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Change subject: ec/google: Add PSRC and PBOK method
......................................................................
ec/google: Add PSRC and PBOK method
As per Intel Dynamic Tuning revision 1.3.13 add support for
PSRC and PBOK under \_SB.DPTF.TPWR device
ec_fill_dptf_helpers() is used to generate all the helper
function that DPTF requires.
BUG=b:205928013
TEST=Buil, boot brya0 and dump SSDT to check methods
Scope (\_SB.DPTF.TPWR)
{
Method (PSRC, 0, Serialized)
{
Local0 = \_SB.PCI0.LPCB.EC0.PWRT /* External reference */
Return ((Local0 && 0x0F))
}
Method (PBOK, 1, Serialized)
{
Local0 = (Arg0 & 0x0F)
\_SB.PCI0.LPCB.EC0.PBOK = Local0
}
}
Signed-off-by: Varshit B Pandya <varshit.b.pandya(a)intel.com>
Change-Id: Ia536a9e1528f6e415247eca9ed2b0b685eb73196
---
M src/ec/google/chromeec/ec_dptf_helpers.c
1 file changed, 44 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/62945/4
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