coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

1 participants
6700 discussions

Change in coreboot[master]: soc/mediatek: Add mtk_early_init for passing data across sessions
by Hung-Te Lin (Code Review) 24 Mar '22

24 Mar '22

Attention is currently required from: Paul Menzel, Angel Pons, Yu-Ping Wu, Jianjun Wang. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63019 ) Change subject: soc/mediatek: Add mtk_early_init for passing data across sessions ...................................................................... Patch Set 1: (2 comments) File src/soc/mediatek/common/early_init.c: https://review.coreboot.org/c/coreboot/+/63019/comment/5668ede1_53b2c627 PS1, Line 48: return cur_time.microseconds - init->pcie_timestamp_us; we have to add a special case here - if pcie_timestamp_us is 0 then we should return 0. /* If early int was never done */ if (!init->pcie_timestamp_us) return 0; File src/soc/mediatek/common/include/soc/early_init.h: https://review.coreboot.org/c/coreboot/+/63019/comment/9fc69f78_655570f8 PS1, Line 17: mtk_pcie_save_timestamp What about enum early_init_types { EARLY_INIT_PCIE, }; And then void early_init_clear(void); void early_init_save_timestamp(enum early_init_types init_type); void early_init_get_elapsed_time(enum early_init_types init_type); -- To view, visit https://review.coreboot.org/c/coreboot/+/63019 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01f91b7fe2cbe4f73b5c616bb7aae778dee27d9a Gerrit-Change-Number: 63019 Gerrit-PatchSet: 1 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 24 Mar 2022 02:21:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/brya/var/gimble: Include 4 new SPDs
by Felix Held (Code Review) 24 Mar '22

24 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62991 ) Change subject: mb/google/brya/var/gimble: Include 4 new SPDs ...................................................................... mb/google/brya/var/gimble: Include 4 new SPDs Add the four SPD files for LPDDD4 memory parts below to gimble: 1. Hynix H54G56CYRBX247 2. Hynix H54G46CYRBX267 3. Samsung K4UBE3D4AB-MGCL 4. Samsung K4U6E3S4AB-MGCL BUG=b:191574298 TEST=USE="project_gimble emerge-brya coreboot" Signed-off-by: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Change-Id: I143207cda066603051803b9008eb2e2364f16e46 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62991 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/mainboard/google/brya/variants/gimble/memory/Makefile.inc M src/mainboard/google/brya/variants/gimble/memory/dram_id.generated.txt M src/mainboard/google/brya/variants/gimble/memory/mem_parts_used.txt 3 files changed, 10 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/gimble/memory/Makefile.inc b/src/mainboard/google/brya/variants/gimble/memory/Makefile.inc index 9db9484..6379d4a 100644 --- a/src/mainboard/google/brya/variants/gimble/memory/Makefile.inc +++ b/src/mainboard/google/brya/variants/gimble/memory/Makefile.inc @@ -4,6 +4,6 @@ # util/spd_tools/bin/part_id_gen ADL lp4x src/mainboard/google/brya/variants/gimble/memory src/mainboard/google/brya/variants/gimble/memory/mem_parts_used.txt SPD_SOURCES = -SPD_SOURCES += spd/lp4x/set-0/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, MT53E512M32D1NP-046 WT:B -SPD_SOURCES += spd/lp4x/set-0/spd-3.hex # ID = 1(0b0001) Parts = H9HCNNNCPMMLXR-NEE, K4UBE3D4AA-MGCR, MT53E1G32D2NP-046 WT:B +SPD_SOURCES += spd/lp4x/set-0/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, MT53E512M32D1NP-046 WT:B, H54G46CYRBX267, K4U6E3S4AB-MGCL +SPD_SOURCES += spd/lp4x/set-0/spd-3.hex # ID = 1(0b0001) Parts = H9HCNNNCPMMLXR-NEE, K4UBE3D4AA-MGCR, MT53E1G32D2NP-046 WT:B, H54G56CYRBX247, K4UBE3D4AB-MGCL SPD_SOURCES += spd/lp4x/set-0/spd-4.hex # ID = 2(0b0010) Parts = MT53E1G32D2NP-046 WT:A diff --git a/src/mainboard/google/brya/variants/gimble/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/gimble/memory/dram_id.generated.txt index c3a1347..6a6ce93 100644 --- a/src/mainboard/google/brya/variants/gimble/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/gimble/memory/dram_id.generated.txt @@ -12,3 +12,7 @@ K4UBE3D4AA-MGCR 1 (0001) MT53E512M32D1NP-046 WT:B 0 (0000) MT53E1G32D2NP-046 WT:B 1 (0001) +H54G56CYRBX247 1 (0001) +H54G46CYRBX267 0 (0000) +K4UBE3D4AB-MGCL 1 (0001) +K4U6E3S4AB-MGCL 0 (0000) diff --git a/src/mainboard/google/brya/variants/gimble/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/gimble/memory/mem_parts_used.txt index 568e724..2309d87 100644 --- a/src/mainboard/google/brya/variants/gimble/memory/mem_parts_used.txt +++ b/src/mainboard/google/brya/variants/gimble/memory/mem_parts_used.txt @@ -6,3 +6,7 @@ K4UBE3D4AA-MGCR MT53E512M32D1NP-046 WT:B MT53E1G32D2NP-046 WT:B +H54G56CYRBX247 +H54G46CYRBX267 +K4UBE3D4AB-MGCL +K4U6E3S4AB-MGCL 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/62991 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I143207cda066603051803b9008eb2e2364f16e46 Gerrit-Change-Number: 62991 Gerrit-PatchSet: 3 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: soc/mediatek: PCIe: Assert PERST# at bootblock stage
by Hung-Te Lin (Code Review) 24 Mar '22

24 Mar '22

Attention is currently required from: Shelley Chen, Paul Menzel, Rex-BC Chen, Angel Pons, Yu-Ping Wu, Jianjun Wang. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62359 ) Change subject: soc/mediatek: PCIe: Assert PERST# at bootblock stage ...................................................................... Patch Set 19: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/62359/comment/27c8cb2f_a2566ff7 PS19, Line 7: PCIe: Assert PERST# at bootblock stage pre-initialize PCIe at the bootblock stage -- To view, visit https://review.coreboot.org/c/coreboot/+/62359 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5b9369e6f8599f93415588ea585c952a41c5e7d Gerrit-Change-Number: 62359 Gerrit-PatchSet: 19 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 24 Mar 2022 02:12:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek: PCIe: Assert PERST# at bootblock stage
by Hung-Te Lin (Code Review) 24 Mar '22

24 Mar '22

Attention is currently required from: Shelley Chen, Paul Menzel, Rex-BC Chen, Angel Pons, Yu-Ping Wu, Jianjun Wang. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62359 ) Change subject: soc/mediatek: PCIe: Assert PERST# at bootblock stage ...................................................................... Patch Set 19: (1 comment) File src/mainboard/google/cherry/bootblock.c: https://review.coreboot.org/c/coreboot/+/62359/comment/23b375cd_dc270cb7 PS18, Line 48: mtk_pcie_pre_init(); > In the previous version of this patch, it placed in mt8195's bootblock_soc_init(), and Hung-Te sugge […] I'd still recommend having 'pre-init' in the mainboard bootblock, because not every boards do want pre-init. For Chromebooks we like to have pre-init, but other implementations may want to do it later, or deciding on a different rule. This is also how we handle eMMC pre-init. -- To view, visit https://review.coreboot.org/c/coreboot/+/62359 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5b9369e6f8599f93415588ea585c952a41c5e7d Gerrit-Change-Number: 62359 Gerrit-PatchSet: 19 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 24 Mar 2022 02:11:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek: PCIe: Assert PERST# at bootblock stage
by Jianjun Wang (Code Review) 24 Mar '22

24 Mar '22

Attention is currently required from: Hung-Te Lin, Shelley Chen, Paul Menzel, Rex-BC Chen, Angel Pons, Yu-Ping Wu. Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62359 ) Change subject: soc/mediatek: PCIe: Assert PERST# at bootblock stage ...................................................................... Patch Set 19: (1 comment) File src/mainboard/google/cherry/bootblock.c: https://review.coreboot.org/c/coreboot/+/62359/comment/f21a52e3_f4046cc1 PS18, Line 48: mtk_pcie_pre_init(); > I meant mt8195. In the previous version of this patch, it placed in mt8195's bootblock_soc_init(), and Hung-Te suggests move it to bootblock_mainboard_init, I'm not sure which one is better. https://review.coreboot.org/c/coreboot/+/62359/9..19/src/soc/mediatek/mt819… -- To view, visit https://review.coreboot.org/c/coreboot/+/62359 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5b9369e6f8599f93415588ea585c952a41c5e7d Gerrit-Change-Number: 62359 Gerrit-PatchSet: 19 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 24 Mar 2022 02:07:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/cherry: Add PCIe domain support
by Yu-Ping Wu (Code Review) 24 Mar '22

24 Mar '22

Attention is currently required from: Hung-Te Lin, Shelley Chen, Paul Menzel, Angel Pons, Jianjun Wang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62360 ) Change subject: mb/google/cherry: Add PCIe domain support ...................................................................... Patch Set 19: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62360/comment/178c7a81_f94e4ef0 PS18, Line 7: mb/google/cherry: Add PCIe domain support > Add *dojo* somewhere? How about Add PCIe domain support for dojo https://review.coreboot.org/c/coreboot/+/62360/comment/280182d6_d018199a PS18, Line 9: Add override device tree for dojo and add PCIe domain support. > Yes, other platforms may support PCIe(e.g. […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/62360 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifb02960504177fe488e6784b954c16b2c8d94972 Gerrit-Change-Number: 62360 Gerrit-PatchSet: 19 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 24 Mar 2022 01:57:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek/mt8195: Add PCIe pre_init support in bootblock stage
by Yu-Ping Wu (Code Review) 24 Mar '22

24 Mar '22

Attention is currently required from: Paul Menzel, Rex-BC Chen, Angel Pons, Jianjun Wang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63018 ) Change subject: soc/mediatek/mt8195: Add PCIe pre_init support in bootblock stage ...................................................................... Patch Set 1: Code-Review-1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63018 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic27f3ed7f1a6e3ff623d8754061547b55cd75d19 Gerrit-Change-Number: 63018 Gerrit-PatchSet: 1 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 24 Mar 2022 01:56:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek: PCIe: Assert PERST# at bootblock stage
by Yu-Ping Wu (Code Review) 24 Mar '22

24 Mar '22

Attention is currently required from: Hung-Te Lin, Shelley Chen, Paul Menzel, Rex-BC Chen, Angel Pons, Jianjun Wang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62359 ) Change subject: soc/mediatek: PCIe: Assert PERST# at bootblock stage ...................................................................... Patch Set 19: (1 comment) File src/mainboard/google/cherry/bootblock.c: https://review.coreboot.org/c/coreboot/+/62359/comment/969afb40_5ca709d9 PS18, Line 48: mtk_pcie_pre_init(); > Can we move this to mt8186's bootblock_soc_init()? I meant mt8195. -- To view, visit https://review.coreboot.org/c/coreboot/+/62359 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5b9369e6f8599f93415588ea585c952a41c5e7d Gerrit-Change-Number: 62359 Gerrit-PatchSet: 19 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 24 Mar 2022 01:55:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek: PCIe: Assert PERST# at bootblock stage
by Yu-Ping Wu (Code Review) 24 Mar '22

24 Mar '22

Attention is currently required from: Hung-Te Lin, Shelley Chen, Paul Menzel, Rex-BC Chen, Angel Pons, Jianjun Wang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62359 ) Change subject: soc/mediatek: PCIe: Assert PERST# at bootblock stage ...................................................................... Patch Set 19: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62359/comment/77f470a4_33cd788f PS9, Line 14: 100ms > I use the image without serial console (the file without 'dev' or 'serial' suffix), the logs of core […] Ack. 100ms is ensured in CB:62933. File src/mainboard/google/cherry/bootblock.c: https://review.coreboot.org/c/coreboot/+/62359/comment/2d6bddf8_cfa1e93e PS18, Line 48: mtk_pcie_pre_init(); > I think so, PCIe only support for dojo board currently. Can we move this to mt8186's bootblock_soc_init()? -- To view, visit https://review.coreboot.org/c/coreboot/+/62359 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5b9369e6f8599f93415588ea585c952a41c5e7d Gerrit-Change-Number: 62359 Gerrit-PatchSet: 19 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 24 Mar 2022 01:55:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: drivers/i2c/tpm: Work around missing board_cfg in Ti50 FW under 0.15
by Reka Norman (Code Review) 24 Mar '22

24 Mar '22

Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Christian Walter, Eric Lai. Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63011 ) Change subject: drivers/i2c/tpm: Work around missing board_cfg in Ti50 FW under 0.15 ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63011 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieec7842ca66b4c690df04a400cebcf45138c745d Gerrit-Change-Number: 63011 Gerrit-PatchSet: 7 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 24 Mar 2022 01:47:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2022