coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/nissa/var/nivviks: Remove USB2 WWAN
by Eric Lai (Code Review) 25 Mar '22

25 Mar '22

Eric Lai has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/63098 ) Change subject: mb/google/nissa/var/nivviks: Remove USB2 WWAN ...................................................................... Abandoned USB2.0 for recovery and update -- To view, visit https://review.coreboot.org/c/coreboot/+/63098 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d37ef7104afd2d4c218fb1f4e1d493ccdbffdb2 Gerrit-Change-Number: 63098 Gerrit-PatchSet: 1 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: sb/intel/i82801i/jx/chip.h: Use unsigned ints for bitfields
by 9elements QA (Code Review) 25 Mar '22

25 Mar '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63024 ) Change subject: sb/intel/i82801i/jx/chip.h: Use unsigned ints for bitfields ...................................................................... Patch Set 3: Automatic boot test returned (PASS/FAIL/TOTAL): 11 / 1 / 12 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/97153 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/97152 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/97151 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/97150 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/97149 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/97148 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/97147 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/97146 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/97145 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/97144 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/97143 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/97142 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/63024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d6c333bb884ebc0ae50c4437f2cd98e74cf7379 Gerrit-Change-Number: 63024 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Sat, 26 Mar 2022 02:20:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: Add mtk_early_init for passing data across sessions
by Jianjun Wang (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel, Angel Pons, Yu-Ping Wu. Hello Hung-Te Lin, build bot (Jenkins), Rex-BC Chen, Paul Menzel, Angel Pons, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63019 to look at the new patch set (#4). Change subject: soc/mediatek: Add mtk_early_init for passing data across sessions ...................................................................... soc/mediatek: Add mtk_early_init for passing data across sessions Passing pcie timestamp from bootblock stage to ram stage, it can be used for other modules if they needs to passing data across sessions. TEST=Build pass and boot up to kernel successfully via SSD on Dojo board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x15b7 PCI SSVID : 0x15b7 SN : 21517J440114 MN : WDC PC SN530 SDBPTPZ-256G-1006 RAB : 0x4 AERL : 0x7 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006 BUG=b:178565024 BRANCH=cherry Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com> Change-Id: I01f91b7fe2cbe4f73b5c616bb7aae778dee27d9a --- M src/soc/mediatek/common/Kconfig A src/soc/mediatek/common/early_init.c A src/soc/mediatek/common/include/soc/early_init.h 3 files changed, 80 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/63019/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/63019 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01f91b7fe2cbe4f73b5c616bb7aae778dee27d9a Gerrit-Change-Number: 63019 Gerrit-PatchSet: 4 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/common/block/lpc: Add support to not clear port80 enable
by Felix Held (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Jason Glenesk, Marshall Dawson, Fred Reitberger, Karthik Ramasubramanian. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63118 ) Change subject: soc/amd/common/block/lpc: Add support to not clear port80 enable ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Should the other two fixed decode ranges be handled the same way? i don't think that the psp/smu firmwares will access what's decoded by the other two fixed decode ranges (at least after the x86 is released from reset), so i'd only handle the port 80 decode via this special case -- To view, visit https://review.coreboot.org/c/coreboot/+/63118 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia5ee012ac4858d6dd43827274169edf622a70489 Gerrit-Change-Number: 63118 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 25 Mar 2022 22:54:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Fred Reitberger <reitbergerfred(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: include/efi: Add correct header file for EFI_PROCESSOR_INFORMATION
by 9elements QA (Code Review) 25 Mar '22

25 Mar '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63010 ) Change subject: include/efi: Add correct header file for EFI_PROCESSOR_INFORMATION ...................................................................... Patch Set 3: Automatic boot test returned (PASS/FAIL/TOTAL): 11 / 1 / 12 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/97062 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/97061 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/97060 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/97059 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/97058 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/97057 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/97056 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/97055 FAIL: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/97054 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/97053 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/97052 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/97051 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/63010 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c0ca4f8876e46f1748ffc9e3b90de00ead80ebd Gerrit-Change-Number: 63010 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 25 Mar 2022 22:38:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: include/spd.h: Fix DDR4_SPD_72B_SO_{R,U}DIMM values
by Elyes Haouas (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Paul Menzel, Arthur Heymans. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62647 ) Change subject: include/spd.h: Fix DDR4_SPD_72B_SO_{R,U}DIMM values ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Are these used anywhere, so does something need testing? non, there is no affected board in coreboot tree. -- To view, visit https://review.coreboot.org/c/coreboot/+/62647 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id4e9c3814e2e7f379917bf93f7975af3aad31dbb Gerrit-Change-Number: 62647 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 25 Mar 2022 21:56:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb: add new board clevo/tgl-u/l140mu
by build bot (Jenkins) (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Felix Singer, Paul Menzel, Tim Wawrzynczak. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59548 ) Change subject: mb: add new board clevo/tgl-u/l140mu ...................................................................... Patch Set 8: (6 comments) File src/mainboard/clevo/tgl-u/variants/l140mu/gpio.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144767): https://review.coreboot.org/c/coreboot/+/59548/comment/15799f0b_c70ed104 PS8, Line 94: PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), /* I2C1_SDA / PCH_I2C_SDA (retimer rom) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144767): https://review.coreboot.org/c/coreboot/+/59548/comment/56258d1a_bd2427b1 PS8, Line 95: PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), /* I2C1_SCL / PCH_I2C_SCL (retimer rom) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144767): https://review.coreboot.org/c/coreboot/+/59548/comment/33272449_5de0f2d1 PS8, Line 99: PAD_NC(GPP_C23, UP_20K), /* GPP_C23 / PCH_GPP_C23 (WLAN_WAKEUP#) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144767): https://review.coreboot.org/c/coreboot/+/59548/comment/dcc289cb_a28f6d35 PS8, Line 104: PAD_NC(GPP_D2, NONE), /* LEDKB_DET# (unused; not sold w/o KBLED) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144767): https://review.coreboot.org/c/coreboot/+/59548/comment/8ffcbffb_45d5e458 PS8, Line 107: PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), /* SRCCLKREQ0# / SSD1_CLKREQ# (for SSD2!) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144767): https://review.coreboot.org/c/coreboot/+/59548/comment/9e90b916_c87d410d PS8, Line 110: PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1), /* SRCCLKREQ3# / SSD2_CLKREQ# (for SSD1!) */ line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/59548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c4bef3827da10241e9b01e12ecc4276e131a620 Gerrit-Change-Number: 59548 Gerrit-PatchSet: 8 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 25 Mar 2022 21:54:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb: add new board clevo/tgl-u/l140mu
by build bot (Jenkins) (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Felix Singer, Paul Menzel, Tim Wawrzynczak. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59548 ) Change subject: mb: add new board clevo/tgl-u/l140mu ...................................................................... Patch Set 7: (6 comments) File src/mainboard/clevo/tgl-u/variants/l140mu/gpio.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144766): https://review.coreboot.org/c/coreboot/+/59548/comment/7685f218_4cd8569f PS7, Line 94: PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), /* I2C1_SDA / PCH_I2C_SDA (retimer rom) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144766): https://review.coreboot.org/c/coreboot/+/59548/comment/ea590971_a94c0445 PS7, Line 95: PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), /* I2C1_SCL / PCH_I2C_SCL (retimer rom) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144766): https://review.coreboot.org/c/coreboot/+/59548/comment/d88acdb0_a01c807b PS7, Line 99: PAD_NC(GPP_C23, UP_20K), /* GPP_C23 / PCH_GPP_C23 (WLAN_WAKEUP#) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144766): https://review.coreboot.org/c/coreboot/+/59548/comment/7b5987ff_3072d798 PS7, Line 104: PAD_NC(GPP_D2, NONE), /* LEDKB_DET# (unused; not sold w/o KBLED) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144766): https://review.coreboot.org/c/coreboot/+/59548/comment/20fc95d7_c8e10580 PS7, Line 107: PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), /* SRCCLKREQ0# / SSD1_CLKREQ# (for SSD2!) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144766): https://review.coreboot.org/c/coreboot/+/59548/comment/4de4baaf_bb46da50 PS7, Line 110: PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1), /* SRCCLKREQ3# / SSD2_CLKREQ# (for SSD1!) */ line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/59548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c4bef3827da10241e9b01e12ecc4276e131a620 Gerrit-Change-Number: 59548 Gerrit-PatchSet: 7 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 25 Mar 2022 21:54:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb: add new board clevo/tgl-u/l140mu
by Michael Niewöhner (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Felix Singer, Paul Menzel, Tim Wawrzynczak. Hello Felix Singer, build bot (Jenkins), Paul Menzel, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59548 to look at the new patch set (#8). Change subject: mb: add new board clevo/tgl-u/l140mu ...................................................................... mb: add new board clevo/tgl-u/l140mu Add new board Clevo L14xMU (TGL). Tested and working: - On-board RAM and DIMM slot - Graphics (GOP driver), including HDMI - Keyboard - I2C touchpad (including interrupt) - TPM (with interrupt on Windows, only polling on Linux [1]) - microSD Card reader - both NVME ports - Speakers - Microphone - Camera - WLAN/BT (CNVi) - All USB2/3 ports including Type-C - Thunderbolt detects my work laptop in TB Control Center (I couldn't test anything more due to security policy) - TianoCore Note on TPM: The vendor sets Intel PTT to default-on in newer CSME images, which conflicts with the dTPM. Currently, there are two ways to make it work: 1) Boot vendor firmware once to let it disable PTT via CSME firmware feature override. 2) Use Intel Flash Image Tool (FIT) to set "initial power-up state" to disabled. Boots fine: - Debian testing, unstable (Linux 5.16.14, 5.17.0-rc6) - Windows 10 21H2 (Build 19044.1586) Untested: - Thunderbolt (see above) - Type-C DisplayPort - S-ATA - LTE (my board is non-LTE, has a second NVME port instead) Doesn't work: - TPM interrupt on Linux [1] - WLAN/BT (PCIe) - gets detected but can't be enabled - All EC related functions - EC driver is WIP - Fn-Keys - S0ix - UCSI - Fan control - Battery info [1] https://lkml.org/lkml/2021/5/1/103 Change-Id: I4c4bef3827da10241e9b01e12ecc4276e131a620 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- A src/mainboard/clevo/tgl-u/Kconfig A src/mainboard/clevo/tgl-u/Kconfig.name A src/mainboard/clevo/tgl-u/Makefile.inc A src/mainboard/clevo/tgl-u/board_info.txt A src/mainboard/clevo/tgl-u/bootblock.c A src/mainboard/clevo/tgl-u/cmos.default A src/mainboard/clevo/tgl-u/cmos.layout A src/mainboard/clevo/tgl-u/dsdt.asl A src/mainboard/clevo/tgl-u/include/variant/gpio.h A src/mainboard/clevo/tgl-u/include/variant/ramstage.h A src/mainboard/clevo/tgl-u/include/variant/romstage.h A src/mainboard/clevo/tgl-u/ramstage.c A src/mainboard/clevo/tgl-u/romstage.c A src/mainboard/clevo/tgl-u/spd/samsung-M471A1G44AB0-CWE.spd.hex A src/mainboard/clevo/tgl-u/variants/l140mu/Makefile.inc A src/mainboard/clevo/tgl-u/variants/l140mu/board_info.txt A src/mainboard/clevo/tgl-u/variants/l140mu/data.vbt A src/mainboard/clevo/tgl-u/variants/l140mu/devicetree.cb A src/mainboard/clevo/tgl-u/variants/l140mu/gma-mainboard.ads A src/mainboard/clevo/tgl-u/variants/l140mu/gpio.c A src/mainboard/clevo/tgl-u/variants/l140mu/gpio_early.c A src/mainboard/clevo/tgl-u/variants/l140mu/hda_verb.c A src/mainboard/clevo/tgl-u/variants/l140mu/ramstage.c A src/mainboard/clevo/tgl-u/variants/l140mu/romstage.c 24 files changed, 917 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/59548/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/59548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c4bef3827da10241e9b01e12ecc4276e131a620 Gerrit-Change-Number: 59548 Gerrit-PatchSet: 8 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb: add new board clevo/tgl-u/l140mu
by Michael Niewöhner (Code Review) 25 Mar '22

25 Mar '22

Attention is currently required from: Michael Niewöhner. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59548 ) Change subject: mb: add new board clevo/tgl-u/l140mu ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/59548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c4bef3827da10241e9b01e12ecc4276e131a620 Gerrit-Change-Number: 59548 Gerrit-PatchSet: 7 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Fri, 25 Mar 2022 21:45:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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