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Change in coreboot[master]: ec/starlabs/merlin: Add support for Nuvoton EC's
by Felix Held (Code Review) 30 Mar '22

30 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62702 ) Change subject: ec/starlabs/merlin: Add support for Nuvoton EC's ...................................................................... ec/starlabs/merlin: Add support for Nuvoton EC's Support was created for the NPCE9m5x series, using version 1.1 of the datasheet. The specific model tested was the NPCE985P/G, on the StarLite Mk IV with version 1.00 of the EC firmware. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Ib66baf1e88f5d548ce955dffa00c9b88255b2f95 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62702 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> --- M src/ec/starlabs/merlin/Kconfig M src/ec/starlabs/merlin/Makefile.inc M src/ec/starlabs/merlin/ec.h A src/ec/starlabs/merlin/nuvoton.c 4 files changed, 322 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved diff --git a/src/ec/starlabs/merlin/Kconfig b/src/ec/starlabs/merlin/Kconfig index 93101b7..ff6077a 100644 --- a/src/ec/starlabs/merlin/Kconfig +++ b/src/ec/starlabs/merlin/Kconfig @@ -1,5 +1,11 @@ ## SPDX-License-Identifier: GPL-2.0-only +config EC_STARLABS_NUVOTON + bool + select EC_ACPI + help + Interface to Nuvoton embedded controller principally in Star Labs notebooks. + config EC_STARLABS_ITE bool select EC_ACPI @@ -33,21 +39,21 @@ config EC_STARLABS_KBL_LEVELS bool default n - depends on EC_STARLABS_ITE + depends on EC_STARLABS_ITE || EC_STARLABS_NUVOTON help Select if the mainboard supports multiple levels of brightness for the keyboard. config EC_STARLABS_FAN bool default n - depends on EC_STARLABS_ITE + depends on EC_STARLABS_ITE || EC_STARLABS_NUVOTON help Select if the mainboard has a fan. config EC_STARLABS_MAX_CHARGE bool default n - depends on EC_STARLABS_ITE + depends on EC_STARLABS_ITE || EC_STARLABS_NUVOTON help Select if the mainboard supports limiting the maximum charge of the battery. diff --git a/src/ec/starlabs/merlin/Makefile.inc b/src/ec/starlabs/merlin/Makefile.inc index 3445ef3..ac0d5e3 100644 --- a/src/ec/starlabs/merlin/Makefile.inc +++ b/src/ec/starlabs/merlin/Makefile.inc @@ -26,3 +26,12 @@ endif endif endif + +ifeq ($(CONFIG_EC_STARLABS_NUVOTON),y) + +EC_VARIANT_DIR := $(call strip_quotes, $(CONFIG_EC_VARIANT_DIR)) +CPPFLAGS_common += -I$(src)/ec/starlabs/merlin/variants/$(EC_VARIANT_DIR) + +all-y += nuvoton.c + +endif diff --git a/src/ec/starlabs/merlin/ec.h b/src/ec/starlabs/merlin/ec.h index 1e7607d..6a6cda5 100644 --- a/src/ec/starlabs/merlin/ec.h +++ b/src/ec/starlabs/merlin/ec.h @@ -1,19 +1,20 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * EC communication interface for ITE Embedded Controller. + * EC communication interface for Embedded Controller. */ -#ifndef _EC_STARLABS_ITE_H -#define _EC_STARLABS_ITE_H +#ifndef _EC_STARLABS_EC_H +#define _EC_STARLABS_EC_H /* * Define the expected value of the PNP base address that is fixed through * the BADRSEL register controlled within the EC domain by the EC Firmware. */ #define ITE_FIXED_ADDR 0x4e +#define NUVOTON_FIXED_ADDR 0x4e -/* Logical device number (LDN) assignments. */ +/* Logical device number (LDN) assignments for ITE. */ #define ITE_SP1 0x01 /* Serial Port 1 (UART) */ #define ITE_SP2 0x02 /* Serial Port 2 (UART) */ #define ITE_SWUC 0x04 /* System Wake-Up Control (SWUC) */ @@ -30,9 +31,21 @@ #define ITE_PMC4 0x18 /* Power Management I/F Channel 4 (PMC4) */ #define ITE_PMC5 0x19 /* Power Management I/F Channel 5 (PMC5) */ +/* Logical device number (LDN) assignments for Nuvoton. */ +#define NUVOTON_MSWC 0x04 /* Mobile System Wake-Up Control (MSWC) */ +#define NUVOTON_KBCM 0x05 /* KBC / Mouse Interface */ +#define NUVOTON_KBCK 0x06 /* KBC / Keyboard Interface */ +#define NUVOTON_SHM 0x0f /* Shared Memory (SHM) */ +#define NUVOTON_PM1 0x11 /* Power Management I/F Channel 1 (PM1) */ +#define NUVOTON_PM2 0x12 /* Power Management I/F Channel 2 (PM2) */ +#define NUVOTON_PM3 0x17 /* Power Management I/F Channel 3 (PM3) */ +#define NUVOTON_ESHM 0x1d /* Extended Shared Memory (ESHM) */ +#define NUVOTON_PM4 0x1e /* Power Management I/F Channel 3 (PM4) */ + /* Host domain registers. */ #define ITE_CHIPID1 0x20 /* Device ID register 1 */ #define ITE_CHIPID2 0x21 /* Device ID register 2 */ +#define NUVOTON_CHIPID 0x27 /* Device ID register */ /* EC RAM common offsets */ #define ECRAM_MAJOR_VERSION 0x00 diff --git a/src/ec/starlabs/merlin/nuvoton.c b/src/ec/starlabs/merlin/nuvoton.c new file mode 100644 index 0000000..ee8a661 --- /dev/null +++ b/src/ec/starlabs/merlin/nuvoton.c @@ -0,0 +1,287 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <device/device.h> +#include <device/pnp.h> +#include <ec/acpi/ec.h> +#include <option.h> +#include <pc80/keyboard.h> + +#include "ec.h" +#include "ecdefs.h" + +uint16_t ec_get_version(void) +{ + return (ec_read(ECRAM_MAJOR_VERSION) << 8) | ec_read(ECRAM_MINOR_VERSION); +} + +static uint8_t get_ec_value_from_option(const char *name, + unsigned int fallback, + const uint8_t *lut, + size_t lut_size) +{ + unsigned int index = get_uint_option(name, fallback); + if (index >= lut_size) + index = fallback; + return lut[index]; +} + +static uint16_t ec_get_chip_id(unsigned int port) +{ + return pnp_read_index(port, NUVOTON_CHIPID); +} + +static void merlin_init(struct device *dev) +{ + if (!dev->enabled) + return; + + /* + * The address/data IO port pair for the Nuvoton EC are configurable + * through the EC domain and are fixed by the EC's firmware blob. If + * the value(s) passed through the "dev" structure don't match the + * expected values then output severe warnings. + */ + if (dev->path.pnp.port != NUVOTON_FIXED_ADDR) { + printk(BIOS_ERR, "NUVOTON: Incorrect ports defined in devicetree.cb.\n"); + printk(BIOS_ERR, "NUVOTON: Serious operational issues will arise.\n"); + return; + } + + const uint16_t chip_id = ec_get_chip_id(dev->path.pnp.port); + + if (chip_id != NUVOTON_CHIPID_VAL) { + printk(BIOS_ERR, "NUVOTON: Expected chip ID 0x%04x, but got 0x%04x instead.\n", + NUVOTON_CHIPID_VAL, chip_id); + return; + } + + pc_keyboard_init(NO_AUX_DEVICE); + + /* + * Restore settings from CMOS into EC RAM: + * + * kbl_timeout + * fn_ctrl_swap + * max_charge + * fan_mode + * fn_lock_state + * trackpad_state + * kbl_brightness + * kbl_state + */ + + /* + * Keyboard Backlight Timeout + * + * Setting: kbl_timeout + * + * Values: 30 Seconds, 1 Minute, 3 Minutes, 5 Minutes, Never + * Default: 30 Seconds + * + */ + const uint8_t kbl_timeout[] = { + SEC_30, + MIN_1, + MIN_3, + MIN_5, + NEVER + }; + + ec_write(ECRAM_KBL_TIMEOUT, + get_ec_value_from_option("kbl_timeout", + 0, + kbl_timeout, + ARRAY_SIZE(kbl_timeout))); + + /* + * Fn Ctrl Reverse + * + * Setting: fn_ctrl_swap + * + * Values: Enabled, Disabled + * Default: Disabled + * + */ + const uint8_t fn_ctrl_swap[] = { + FN_CTRL, + CTRL_FN + }; + + ec_write(ECRAM_FN_CTRL_REVERSE, + get_ec_value_from_option("fn_ctrl_swap", + 1, + fn_ctrl_swap, + ARRAY_SIZE(fn_ctrl_swap))); + + /* + * Maximum Charge Level + * + * Setting: max_charge + * + * Values: 60%, 80%, 100% + * Default: 100% + * + */ + const uint8_t max_charge[] = { + CHARGE_100, + CHARGE_80, + CHARGE_60 + }; + + if (CONFIG(EC_STARLABS_MAX_CHARGE)) + ec_write(ECRAM_MAX_CHARGE, + get_ec_value_from_option("max_charge", + 0, + max_charge, + ARRAY_SIZE(max_charge))); + + /* + * Fan Mode + * + * Setting: fan_mode + * + * Values: Quiet, Normal, Aggressive + * Default: Normal + * + */ + const uint8_t fan_mode[] = { + FAN_NORMAL, + FAN_AGGRESSIVE, + FAN_QUIET + }; + + if (CONFIG(EC_STARLABS_FAN)) + ec_write(ECRAM_FAN_MODE, + get_ec_value_from_option("fan_mode", + 0, + fan_mode, + ARRAY_SIZE(fan_mode))); + + /* + * Function Lock + * + * Setting: fn_lock_state + * + * Values: Locked, Unlocked + * Default: Locked + * + */ + const uint8_t fn_lock_state[] = { + UNLOCKED, + LOCKED + }; + + ec_write(ECRAM_FN_LOCK_STATE, + get_ec_value_from_option("fn_lock_state", + 1, + fn_lock_state, + ARRAY_SIZE(fn_lock_state))); + + /* + * Trackpad State + * + * Setting: trackpad_state + * + * Values: Enabled, Disabled + * Default: Enabled + * + */ + const uint8_t trackpad_state[] = { + TRACKPAD_ENABLED, + TRACKPAD_DISABLED + }; + + ec_write(ECRAM_TRACKPAD_STATE, + get_ec_value_from_option("trackpad_state", + 0, + trackpad_state, + ARRAY_SIZE(trackpad_state))); + + /* + * Keyboard Backlight Brightness + * + * Setting: kbl_brightness + * + * Values: Off, Low, High / Off, On + * Default: Low + * + */ + const uint8_t kbl_brightness[] = { + KBL_ON, + KBL_OFF, + KBL_LOW, + KBL_HIGH + }; + + if (CONFIG(EC_STARLABS_KBL_LEVELS)) + ec_write(ECRAM_KBL_BRIGHTNESS, + get_ec_value_from_option("kbl_brightness", + 2, + kbl_brightness, + ARRAY_SIZE(kbl_brightness))); + else + ec_write(ECRAM_KBL_BRIGHTNESS, + get_ec_value_from_option("kbl_brightness", + 0, + kbl_brightness, + ARRAY_SIZE(kbl_brightness))); + + /* + * Keyboard Backlight State + * + * Setting: kbl_state + * + * Values: Off, On + * Default: On + * + */ + const uint8_t kbl_state[] = { + KBL_DISABLED, + KBL_ENABLED + }; + + ec_write(ECRAM_KBL_STATE, + get_ec_value_from_option("kbl_state", + 1, + kbl_state, + ARRAY_SIZE(kbl_state))); +} + +static struct device_operations ops = { + .init = merlin_init, + .read_resources = noop_read_resources, + .set_resources = noop_set_resources, +}; + +static struct pnp_info pnp_dev_info[] = { + /* System Wake-Up Control (SWUC) */ + { NULL, NUVOTON_MSWC, PNP_IO0 | PNP_IRQ0, 0xfff0, }, + /* KBC / Mouse Interface */ + { NULL, NUVOTON_KBCM, PNP_IRQ0, }, + /* KBC / Keyboard Interface */ + { NULL, NUVOTON_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff, }, + /* Shared Memory / Flash Interface (SMFI) */ + { NULL, NUVOTON_SHM, PNP_IO0 | PNP_IRQ0, 0xfff0, }, + /* Power Management I/F Channel 1 (PMC1) */ + { NULL, NUVOTON_PM1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff, }, + /* Power Management I/F Channel 2 (PMC2) */ + { NULL, NUVOTON_PM2, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IRQ0, 0x07fc, + 0x07fc, 0xfff0, }, + /* Power Management I/F Channel 3 (PMC3) */ + { NULL, NUVOTON_PM3, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff, }, + /* Extended Shared Memory (ESHM) */ + { NULL, NUVOTON_ESHM }, + /* Power Management I/F Channel 4 (PMC4) */ + { NULL, NUVOTON_PM4, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff, }, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); +} + +struct chip_operations ec_starlabs_merlin_ops = { + CHIP_NAME("NUVOTON EC") + .enable_dev = enable_dev +}; -- To view, visit https://review.coreboot.org/c/coreboot/+/62702 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib66baf1e88f5d548ce955dffa00c9b88255b2f95 Gerrit-Change-Number: 62702 Gerrit-PatchSet: 15 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: drivers/intel/dptf: Add support for Power participant
by Eric Lai (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Varshit B Pandya, Lance Zhao, Subrata Banik, Tim Wawrzynczak, Rizwan Qureshi, Sumeet R Pawnikar. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62944 ) Change subject: drivers/intel/dptf: Add support for Power participant ...................................................................... Patch Set 5: (1 comment) File src/drivers/intel/dptf/dptf.h: https://review.coreboot.org/c/coreboot/+/62944/comment/4a131c6e_39831c40 PS5, Line 18: const char *tpwr_device_hid; you should put this with https://review.coreboot.org/c/coreboot/+/63202 -- To view, visit https://review.coreboot.org/c/coreboot/+/62944 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I437e509f58df1777d75e5981f0a5a63095ccb6a3 Gerrit-Change-Number: 62944 Gerrit-PatchSet: 5 Gerrit-Owner: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Attention: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Attention: Lance Zhao Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Comment-Date: Wed, 30 Mar 2022 14:07:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp1_1/hob.c: Don't use broken FSP macros
by build bot (Jenkins) (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Patrick Rudolph, Lee Leahy. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63205 ) Change subject: drivers/intel/fsp1_1/hob.c: Don't use broken FSP macros ...................................................................... Patch Set 1: (5 comments) File src/drivers/intel/fsp1_1/hob.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145029): https://review.coreboot.org/c/coreboot/+/63205/comment/0647f446_958f1e94 PS1, Line 32: /* TODO: It looks like we violate the const qualifier a lot so use an union to work 'an union' may be misspelled - perhaps 'a union'? Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145029): https://review.coreboot.org/c/coreboot/+/63205/comment/ee43f837_2a3692b3 PS1, Line 42: union efi_hob hob = { .header = parent } ; space prohibited before semicolon Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145029): https://review.coreboot.org/c/coreboot/+/63205/comment/32e26f50_2405deef PS1, Line 59: union efi_hob hob = { .header = hob_start }; code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145029): https://review.coreboot.org/c/coreboot/+/63205/comment/c0e01211_3bab7d28 PS1, Line 59: union efi_hob hob = { .header = hob_start }; please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145029): https://review.coreboot.org/c/coreboot/+/63205/comment/b7292802_39d206d7 PS1, Line 244: void *hob = NULL;; Statements terminations use 1 semicolon -- To view, visit https://review.coreboot.org/c/coreboot/+/63205 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic5fbde9666be461232c2d6af181e72c6fbcf7425 Gerrit-Change-Number: 63205 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Comment-Date: Wed, 30 Mar 2022 14:04:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/fsp1_1: Fix more strict-aliasing rules errors
by Arthur Heymans (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Lee Leahy. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63017 ) Change subject: drivers/fsp1_1: Fix more strict-aliasing rules errors ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Sounds like a good plan. I did CB:63205. That should do it to. -- To view, visit https://review.coreboot.org/c/coreboot/+/63017 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If774ae6338dbb1ee2778d8c93cbb1868c61b1874 Gerrit-Change-Number: 63017 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Comment-Date: Wed, 30 Mar 2022 14:02:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp1_1/hob.c: Don't use broken FSP macros
by Arthur Heymans (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Lee Leahy. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63205 ) Change subject: drivers/intel/fsp1_1/hob.c: Don't use broken FSP macros ...................................................................... drivers/intel/fsp1_1/hob.c: Don't use broken FSP macros This rewrites the code to not use FSP macros to loop over HOB structures and also avoid unnecessary nested loop which just make the code hard to read. This gives more insight in what is going on and allows to use newer UDK headers where the macros have been rewritten in invalid C code, most likely to avoid the 'const' qualifier. In coreboot working around the 'const' qualifier also seems needed for now so use union types for this. Change-Id: Ic5fbde9666be461232c2d6af181e72c6fbcf7425 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/drivers/intel/fsp1_1/hob.c 1 file changed, 49 insertions(+), 52 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/63205/1 diff --git a/src/drivers/intel/fsp1_1/hob.c b/src/drivers/intel/fsp1_1/hob.c index 976df5d..2d210bb 100644 --- a/src/drivers/intel/fsp1_1/hob.c +++ b/src/drivers/intel/fsp1_1/hob.c @@ -23,40 +23,56 @@ return hob_list; } -/* Returns the next instance of a HOB type from the starting HOB. */ -static void *get_next_hob(uint16_t type, const void *hob_start) +struct hob_header { + uint16_t type; + uint16_t length; + uint8_t guid[16]; +}; + +/* TODO: It looks like we violate the const qualifier a lot so use an union to work + it for now. */ +union efi_hob { + uintptr_t addr; + const struct hob_header *header; +}; + +/* Returns the next instance of a HOB */ +static void *next_hob(const void *parent) { - EFI_PEI_HOB_POINTERS hob; + union efi_hob hob = { .header = parent } ; + return (void *)(hob.addr + hob.header->length); +} - if (!hob_start) - return NULL; +static bool hob_match_type(const void *hob, const uint16_t type) +{ + const struct hob_header *header = hob; + return header->type == type; +} - hob.Raw = (UINT8 *)hob_start; +static bool is_last_hob(const void *hob) +{ + return hob_match_type(hob, EFI_HOB_TYPE_END_OF_HOB_LIST); +} - /* Parse the HOB list until end of list or matching type is found. */ - while (!END_OF_HOB_LIST(hob.Raw)) { - if (hob.Header->HobType == type) - return hob.Raw; - if (GET_HOB_LENGTH(hob.Raw) < sizeof(*hob.Header)) +static void *get_type_guid_hob(const uint16_t type, const EFI_GUID *guid, const void *hob_start) +{ + union efi_hob hob = { .header = hob_start }; + + while (hob.header && !is_last_hob(hob.header)) { + if (hob_match_type(hob.header, type)) + continue; + + if (compare_guid(guid, (EFI_GUID *)hob.header->guid)) break; - hob.Raw = GET_NEXT_HOB(hob.Raw); + hob.header = next_hob(hob.header); } - return NULL; + return (void *)hob.addr; } /* Returns the next instance of the matched GUID HOB from the starting HOB. */ void *get_guid_hob(const EFI_GUID *guid, const void *hob_start) { - EFI_PEI_HOB_POINTERS hob; - - hob.Raw = (uint8_t *)hob_start; - while ((hob.Raw = get_next_hob(EFI_HOB_TYPE_GUID_EXTENSION, hob.Raw)) - != NULL) { - if (compare_guid(guid, &hob.Guid->Name)) - break; - hob.Raw = GET_NEXT_HOB(hob.Raw); - } - return hob.Raw; + return get_type_guid_hob(EFI_HOB_TYPE_GUID_EXTENSION, guid, hob_start); } /* @@ -64,16 +80,7 @@ */ void *get_resource_hob(const EFI_GUID *guid, const void *hob_start) { - EFI_PEI_HOB_POINTERS hob; - - hob.Raw = (UINT8 *)hob_start; - while ((hob.Raw = get_next_hob(EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, - hob.Raw)) != NULL) { - if (compare_guid(guid, &hob.ResourceDescriptor->Owner)) - break; - hob.Raw = GET_NEXT_HOB(hob.Raw); - } - return hob.Raw; + return get_type_guid_hob(EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, guid, hob_start); } static void print_hob_mem_attributes(void *hob_ptr) @@ -234,13 +241,11 @@ */ void print_hob_type_structure(u16 hob_type, void *hob_list_ptr) { - u32 *current_hob; - u32 *next_hob = 0; - u8 last_hob = 0; + void *hob = NULL;; u32 current_type; const char *current_type_str; - current_hob = hob_list_ptr; + hob = hob_list_ptr; /* * Print out HOBs of our desired type until @@ -250,35 +255,27 @@ printk(BIOS_DEBUG, "%p: hob_list_ptr\n", hob_list_ptr); do { EFI_HOB_GENERIC_HEADER *current_header_ptr = - (EFI_HOB_GENERIC_HEADER *)current_hob; + (EFI_HOB_GENERIC_HEADER *)hob; /* Get the type of this HOB */ current_type = current_header_ptr->HobType; - current_type_str = get_hob_type_string(current_hob); + current_type_str = get_hob_type_string(hob); if (current_type == hob_type || hob_type == 0x0000) { printk(BIOS_DEBUG, "HOB %p is an %s (type 0x%0x)\n", - current_hob, current_type_str, + hob, current_type_str, current_type); switch (current_type) { case EFI_HOB_TYPE_MEMORY_ALLOCATION: - print_hob_mem_attributes(current_hob); + print_hob_mem_attributes(hob); break; case EFI_HOB_TYPE_RESOURCE_DESCRIPTOR: - print_hob_resource_attributes(current_hob); + print_hob_resource_attributes(hob); break; } } - /* Check for end of HOB list */ - last_hob = END_OF_HOB_LIST(current_hob); - if (!last_hob) { - /* Get next HOB pointer */ - next_hob = GET_NEXT_HOB(current_hob); - - /* Start on next HOB */ - current_hob = next_hob; - } - } while (!last_hob); + hob = next_hob(hob); + } while (!is_last_hob(hob)); printk(BIOS_DEBUG, "=== End of FSP HOB Data Structure ===\n\n"); } -- To view, visit https://review.coreboot.org/c/coreboot/+/63205 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic5fbde9666be461232c2d6af181e72c6fbcf7425 Gerrit-Change-Number: 63205 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Attention: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/intel/fsp1_1: Rename hob finding functions
by Arthur Heymans (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Lee Leahy. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63204 ) Change subject: drivers/intel/fsp1_1: Rename hob finding functions ...................................................................... drivers/intel/fsp1_1: Rename hob finding functions The hob finding functions are never looped over so there is no point for the 'next' inside their name. Change-Id: I18e452d313612ba14edda479d43f2797f6c84034 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/drivers/intel/fsp1_1/hob.c M src/drivers/intel/fsp1_1/include/fsp/util.h M src/drivers/intel/fsp1_1/raminit.c M src/drivers/intel/fsp1_1/ramstage.c M src/drivers/intel/fsp1_1/romstage.c M src/mainboard/google/cyan/spd/spd.c 6 files changed, 13 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/63204/1 diff --git a/src/drivers/intel/fsp1_1/hob.c b/src/drivers/intel/fsp1_1/hob.c index d72535c..976df5d 100644 --- a/src/drivers/intel/fsp1_1/hob.c +++ b/src/drivers/intel/fsp1_1/hob.c @@ -45,7 +45,7 @@ } /* Returns the next instance of the matched GUID HOB from the starting HOB. */ -void *get_next_guid_hob(const EFI_GUID *guid, const void *hob_start) +void *get_guid_hob(const EFI_GUID *guid, const void *hob_start) { EFI_PEI_HOB_POINTERS hob; @@ -62,7 +62,7 @@ /* * Returns the next instance of the matching resource HOB from the starting HOB. */ -void *get_next_resource_hob(const EFI_GUID *guid, const void *hob_start) +void *get_resource_hob(const EFI_GUID *guid, const void *hob_start) { EFI_PEI_HOB_POINTERS hob; diff --git a/src/drivers/intel/fsp1_1/include/fsp/util.h b/src/drivers/intel/fsp1_1/include/fsp/util.h index 0c9a1fa..2dec3f0 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/util.h +++ b/src/drivers/intel/fsp1_1/include/fsp/util.h @@ -24,7 +24,7 @@ void fsp_notify(u32 phase); void print_hob_type_structure(u16 hob_type, void *hob_list_ptr); void print_fsp_info(FSP_INFO_HEADER *fsp_header); -void *get_next_resource_hob(const EFI_GUID *guid, const void *hob_start); +void *get_resource_hob(const EFI_GUID *guid, const void *hob_start); void fsp_display_upd_value(const char *name, uint32_t size, uint64_t old, uint64_t new); void report_fsp_output(void); @@ -77,7 +77,7 @@ #endif void *get_hob_list(void); -void *get_next_guid_hob(const EFI_GUID *guid, const void *hob_start); +void *get_guid_hob(const EFI_GUID *guid, const void *hob_start); asmlinkage void chipset_teardown_car_main(void); diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c index 78700a9..7da85d4 100644 --- a/src/drivers/intel/fsp1_1/raminit.c +++ b/src/drivers/intel/fsp1_1/raminit.c @@ -120,7 +120,7 @@ /* Locate the FSP reserved memory area */ fsp_reserved_bytes = 0; - fsp_memory = get_next_resource_hob(&fsp_reserved_guid, hob_list_ptr); + fsp_memory = get_resource_hob(&fsp_reserved_guid, hob_list_ptr); if (fsp_memory == NULL) { fsp_verification_failure = 1; printk(BIOS_ERR, @@ -155,7 +155,7 @@ fsp_set_runtime(fsp_header, hob_list_ptr); /* Lookup the FSP_BOOTLOADER_TOLUM_HOB */ - cbmem_root = get_next_resource_hob(&bootldr_tolum_guid, hob_list_ptr); + cbmem_root = get_resource_hob(&bootldr_tolum_guid, hob_list_ptr); if (cbmem_root == NULL) { fsp_verification_failure = 1; printk(BIOS_ERR, "7.4: FSP_BOOTLOADER_TOLUM_HOB missing!\n"); @@ -164,7 +164,7 @@ } /* Locate the FSP_SMBIOS_MEMORY_INFO HOB */ - memory_info_hob = get_next_guid_hob(&memory_info_hob_guid, + memory_info_hob = get_guid_hob(&memory_info_hob_guid, hob_list_ptr); if (memory_info_hob == NULL) { printk(BIOS_ERR, "FSP_SMBIOS_MEMORY_INFO HOB missing!\n"); @@ -185,7 +185,7 @@ * 7.5: EFI_PEI_GRAPHICS_INFO_HOB produced by SiliconInit * FSP_SMBIOS_MEMORY_INFO HOB verified above */ - hob_ptr.Raw = get_next_guid_hob(&mrc_guid, hob_list_ptr); + hob_ptr.Raw = get_guid_hob(&mrc_guid, hob_list_ptr); if ((hob_ptr.Raw == NULL) && (params->saved_data == NULL)) { printk(BIOS_ERR, "7.3: FSP_NON_VOLATILE_STORAGE_HOB missing!\n"); fsp_verification_failure = 1; @@ -236,7 +236,7 @@ "ERROR - coreboot's requirements not met by FSP binary!\n"); /* Locate the memory configuration data to speed up the next reboot */ - mrc_hob = get_next_guid_hob(&mrc_guid, hob_list_ptr); + mrc_hob = get_guid_hob(&mrc_guid, hob_list_ptr); if (mrc_hob == NULL) { printk(BIOS_DEBUG, "Memory Configuration Data Hob not present\n"); diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c index d85ba7c..2ffa675 100644 --- a/src/drivers/intel/fsp1_1/ramstage.c +++ b/src/drivers/intel/fsp1_1/ramstage.c @@ -38,7 +38,7 @@ * FSP_SMBIOS_MEMORY_INFO HOB verified by raminit */ if ((fsp_info_header->ImageAttribute & GRAPHICS_SUPPORT_BIT) && - !get_next_guid_hob(&graphics_info_guid, hob_list_ptr) && + !get_guid_hob(&graphics_info_guid, hob_list_ptr) && CONFIG(DISPLAY_HOBS)) { printk(BIOS_ERR, "7.5: EFI_PEI_GRAPHICS_INFO_HOB missing!\n"); printk(BIOS_ERR, "Missing one or more required FSP HOBs!\n"); @@ -117,7 +117,7 @@ u32 *vbt_hob; void *hob_list_ptr = get_hob_list(); - vbt_hob = get_next_guid_hob(&vbt_guid, hob_list_ptr); + vbt_hob = get_guid_hob(&vbt_guid, hob_list_ptr); if (vbt_hob == NULL) { printk(BIOS_ERR, "FSP_ERR: Graphics Data HOB is not present\n"); } else { diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index 7fd1cf5..3f93f33 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -152,7 +152,7 @@ /* Locate the memory info HOB, presence validated by raminit */ hob_list_ptr = fsp_get_hob_list(); - hob_ptr = get_next_guid_hob(&memory_info_hob_guid, hob_list_ptr); + hob_ptr = get_guid_hob(&memory_info_hob_guid, hob_list_ptr); memory_info_hob = (FSP_SMBIOS_MEMORY_INFO *)(hob_ptr + 1); /* Display the data in the FSP_SMBIOS_MEMORY_INFO HOB */ diff --git a/src/mainboard/google/cyan/spd/spd.c b/src/mainboard/google/cyan/spd/spd.c index 21a298e..169b983 100644 --- a/src/mainboard/google/cyan/spd/spd.c +++ b/src/mainboard/google/cyan/spd/spd.c @@ -118,7 +118,7 @@ /* Locate the memory info HOB, presence validated by raminit */ hob_list_ptr = fsp_get_hob_list(); - hob_ptr = get_next_guid_hob(&memory_info_hob_guid, hob_list_ptr); + hob_ptr = get_guid_hob(&memory_info_hob_guid, hob_list_ptr); if (hob_ptr != NULL) { memory_info_hob = (FSP_SMBIOS_MEMORY_INFO *)(hob_ptr + 1); dimm->ddr_frequency = memory_info_hob->MemoryFrequencyInMHz; -- To view, visit https://review.coreboot.org/c/coreboot/+/63204 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I18e452d313612ba14edda479d43f2797f6c84034 Gerrit-Change-Number: 63204 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Attention: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/intel/fsp1_1: Reduce scope of functions
by Arthur Heymans (Code Review) 30 Mar '22

30 Mar '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63203 ) Change subject: drivers/intel/fsp1_1: Reduce scope of functions ...................................................................... drivers/intel/fsp1_1: Reduce scope of functions Reduce scope of get_next_hob and drop unused functions. Change-Id: I81007295ed2d1592c4d829cbb277c0726d89ea4b Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/drivers/intel/fsp1_1/hob.c M src/drivers/intel/fsp1_1/include/fsp/util.h 2 files changed, 1 insertion(+), 30 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/63203/1 diff --git a/src/drivers/intel/fsp1_1/hob.c b/src/drivers/intel/fsp1_1/hob.c index 9a09cfd..d72535c 100644 --- a/src/drivers/intel/fsp1_1/hob.c +++ b/src/drivers/intel/fsp1_1/hob.c @@ -24,7 +24,7 @@ } /* Returns the next instance of a HOB type from the starting HOB. */ -void *get_next_hob(uint16_t type, const void *hob_start) +static void *get_next_hob(uint16_t type, const void *hob_start) { EFI_PEI_HOB_POINTERS hob; @@ -44,12 +44,6 @@ return NULL; } -/* Returns the first instance of a HOB type among the whole HOB list. */ -void *get_first_hob(uint16_t type) -{ - return get_next_hob(type, get_hob_list()); -} - /* Returns the next instance of the matched GUID HOB from the starting HOB. */ void *get_next_guid_hob(const EFI_GUID *guid, const void *hob_start) { @@ -66,14 +60,6 @@ } /* - * Returns the first instance of the matched GUID HOB among the whole HOB list. - */ -void *get_first_guid_hob(const EFI_GUID *guid) -{ - return get_next_guid_hob(guid, get_hob_list()); -} - -/* * Returns the next instance of the matching resource HOB from the starting HOB. */ void *get_next_resource_hob(const EFI_GUID *guid, const void *hob_start) @@ -90,15 +76,6 @@ return hob.Raw; } -/* - * Returns the first instance of the matching resource HOB among the whole HOB - * list. - */ -void *get_first_resource_hob(const EFI_GUID *guid) -{ - return get_next_resource_hob(guid, get_hob_list()); -} - static void print_hob_mem_attributes(void *hob_ptr) { EFI_MEMORY_TYPE hob_mem_type; diff --git a/src/drivers/intel/fsp1_1/include/fsp/util.h b/src/drivers/intel/fsp1_1/include/fsp/util.h index e1fb596..0c9a1fa 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/util.h +++ b/src/drivers/intel/fsp1_1/include/fsp/util.h @@ -24,10 +24,7 @@ void fsp_notify(u32 phase); void print_hob_type_structure(u16 hob_type, void *hob_list_ptr); void print_fsp_info(FSP_INFO_HEADER *fsp_header); -void *get_next_type_guid_hob(UINT16 type, const EFI_GUID *guid, - const void *hob_start); void *get_next_resource_hob(const EFI_GUID *guid, const void *hob_start); -void *get_first_resource_hob(const EFI_GUID *guid); void fsp_display_upd_value(const char *name, uint32_t size, uint64_t old, uint64_t new); void report_fsp_output(void); @@ -80,10 +77,7 @@ #endif void *get_hob_list(void); -void *get_next_hob(uint16_t type, const void *hob_start); -void *get_first_hob(uint16_t type); void *get_next_guid_hob(const EFI_GUID *guid, const void *hob_start); -void *get_first_guid_hob(const EFI_GUID *guid); asmlinkage void chipset_teardown_car_main(void); -- To view, visit https://review.coreboot.org/c/coreboot/+/63203 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81007295ed2d1592c4d829cbb277c0726d89ea4b Gerrit-Change-Number: 63203 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: ec/starlabs/merlin: Make EC function names generic
by Felix Held (Code Review) 30 Mar '22

30 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62700 ) Change subject: ec/starlabs/merlin: Make EC function names generic ...................................................................... ec/starlabs/merlin: Make EC function names generic Rather than using `ite_`, use `ec_` so the same functions can be called for different ECs. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Ie61af233f731eb47772af1c82c6abdc515bc89cc Reviewed-on: https://review.coreboot.org/c/coreboot/+/62700 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/ec/starlabs/merlin/ec.h M src/ec/starlabs/merlin/ite.c M src/mainboard/starlabs/labtop/smbios.c M src/mainboard/starlabs/lite/smbios.c 4 files changed, 6 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/ec/starlabs/merlin/ec.h b/src/ec/starlabs/merlin/ec.h index 8f8bb99..1e7607d 100644 --- a/src/ec/starlabs/merlin/ec.h +++ b/src/ec/starlabs/merlin/ec.h @@ -81,6 +81,6 @@ #define KBL_DISABLED 0x00 #define KBL_ENABLED 0xdd -uint16_t it_get_version(void); +uint16_t ec_get_version(void); #endif diff --git a/src/ec/starlabs/merlin/ite.c b/src/ec/starlabs/merlin/ite.c index e8eaa22..357c67c 100644 --- a/src/ec/starlabs/merlin/ite.c +++ b/src/ec/starlabs/merlin/ite.c @@ -10,7 +10,7 @@ #include "ec.h" #include "ecdefs.h" -uint16_t it_get_version(void) +uint16_t ec_get_version(void) { return (ec_read(ECRAM_MAJOR_VERSION) << 8) | ec_read(ECRAM_MINOR_VERSION); } @@ -26,7 +26,7 @@ return lut[index]; } -static uint16_t ite_get_chip_id(unsigned int port) +static uint16_t ec_get_chip_id(unsigned int port) { return (pnp_read_index(port, ITE_CHIPID1) << 8) | pnp_read_index(port, ITE_CHIPID2); @@ -49,7 +49,7 @@ return; } - const uint16_t chip_id = ite_get_chip_id(dev->path.pnp.port); + const uint16_t chip_id = ec_get_chip_id(dev->path.pnp.port); if (chip_id != ITE_CHIPID_VAL) { printk(BIOS_ERR, "ITE: Expected chip ID 0x%04x, but got 0x%04x instead.\n", diff --git a/src/mainboard/starlabs/labtop/smbios.c b/src/mainboard/starlabs/labtop/smbios.c index 22f3ad3..fbdbefd 100644 --- a/src/mainboard/starlabs/labtop/smbios.c +++ b/src/mainboard/starlabs/labtop/smbios.c @@ -17,7 +17,7 @@ /* Get the Embedded Controller firmware version */ void smbios_ec_revision(uint8_t *ec_major_revision, uint8_t *ec_minor_revision) { - u16 ec_version = it_get_version(); + u16 ec_version = ec_get_version(); *ec_major_revision = ec_version >> 8; *ec_minor_revision = ec_version & 0xff; diff --git a/src/mainboard/starlabs/lite/smbios.c b/src/mainboard/starlabs/lite/smbios.c index 3eaaf3a..394e29c 100644 --- a/src/mainboard/starlabs/lite/smbios.c +++ b/src/mainboard/starlabs/lite/smbios.c @@ -17,7 +17,7 @@ /* Get the Embedded Controller firmware version */ void smbios_ec_revision(uint8_t *ec_major_revision, uint8_t *ec_minor_revision) { - u16 ec_version = it_get_version(); + u16 ec_version = ec_get_version(); *ec_major_revision = ec_version >> 8; *ec_minor_revision = ec_version & 0xff; -- To view, visit https://review.coreboot.org/c/coreboot/+/62700 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie61af233f731eb47772af1c82c6abdc515bc89cc Gerrit-Change-Number: 62700 Gerrit-PatchSet: 8 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: ec/starlabs/merlin: Rename ec.c to more specific ite.c
by Felix Held (Code Review) 30 Mar '22

30 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62677 ) Change subject: ec/starlabs/merlin: Rename ec.c to more specific ite.c ...................................................................... ec/starlabs/merlin: Rename ec.c to more specific ite.c Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I0bac5e4c101792dd4c6a0d4a1ae4a4c7fcd837d5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62677 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/ec/starlabs/merlin/Makefile.inc R src/ec/starlabs/merlin/ite.c 2 files changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved diff --git a/src/ec/starlabs/merlin/Makefile.inc b/src/ec/starlabs/merlin/Makefile.inc index e6721f5..3445ef3 100644 --- a/src/ec/starlabs/merlin/Makefile.inc +++ b/src/ec/starlabs/merlin/Makefile.inc @@ -8,7 +8,7 @@ EC_VARIANT_DIR := $(call strip_quotes, $(CONFIG_EC_VARIANT_DIR)) CPPFLAGS_common += -I$(src)/ec/starlabs/merlin/variants/$(EC_VARIANT_DIR) -all-y += ec.c +all-y += ite.c ifeq ($(CONFIG_EC_STARLABS_NEED_ITE_BIN),y) ifeq ($(CONFIG_EC_STARLABS_ADD_ITE_BIN),y) diff --git a/src/ec/starlabs/merlin/ec.c b/src/ec/starlabs/merlin/ite.c similarity index 100% rename from src/ec/starlabs/merlin/ec.c rename to src/ec/starlabs/merlin/ite.c -- To view, visit https://review.coreboot.org/c/coreboot/+/62677 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0bac5e4c101792dd4c6a0d4a1ae4a4c7fcd837d5 Gerrit-Change-Number: 62677 Gerrit-PatchSet: 11 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: drivers/tpm: Force enable long IRQ pulses for Ti50 versions under 0.15.
by Paul Fagerburg (Code Review) 30 Mar '22

30 Mar '22

Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63160 ) Change subject: drivers/tpm: Force enable long IRQ pulses for Ti50 versions under 0.15. ...................................................................... drivers/tpm: Force enable long IRQ pulses for Ti50 versions under 0.15. Only Cr50 versions starting at 0.5.5 support long IRQ pulses, so this feature is enabled based on the value of the board_cfg register (see CB:61722). However, Ti50 versions below 0.0.15 don't support the board_cfg register, and trying to access it will cause I2C errors (see CB:63011). Also, all Ti50 versions only support long IRQ pulses. Therefore, add a workaround to force enable long IRQ pulses for boards using Ti50 versions under 0.0.15, instead of enabling it based on board_cfg. This workaround will be removed once all Ti50 stocks are updated to 0.0.15 or higher. BUG=b:225941781 TEST=Boot nivviks and nereid to OS with Ti50 0.0.14 and check there are none of these I2C errors: [ERROR] I2C stop bit not received [ERROR] cr50_i2c_read: Address write failed [ERROR] cr50_i2c_tis_status: Failed to read status Change-Id: Iaba71461d8ec79e8d6efddbd505339cdf1176485 Signed-off-by: Reka Norman <rekanorman(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63160 Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Kangheui Won <khwon(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/tpm/cr50.c 1 file changed, 8 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Kangheui Won: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/drivers/tpm/cr50.c b/src/drivers/tpm/cr50.c index 1d6c691..4ab01fb 100644 --- a/src/drivers/tpm/cr50.c +++ b/src/drivers/tpm/cr50.c @@ -142,6 +142,14 @@ bool cr50_is_long_interrupt_pulse_enabled(void) { + /* + * Ti50 FW versions under 0.15 don't support the board cfg register, + * and all Ti50 versions only support long IRQ pulses. + * TODO: Remove this after all Ti50 stocks uprev to 0.15 or above. + */ + if (CONFIG(MAINBOARD_NEEDS_I2C_TI50_WORKAROUND)) + return true; + return !!(cr50_get_board_cfg() & CR50_BOARD_CFG_100US_READY_PULSE); } -- To view, visit https://review.coreboot.org/c/coreboot/+/63160 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaba71461d8ec79e8d6efddbd505339cdf1176485 Gerrit-Change-Number: 63160 Gerrit-PatchSet: 4 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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