Meera Ravindranath has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61622 )
Change subject: mbgoogle/brya/{brya0/redrix}: Add SBU orientation property for Type C Mux
......................................................................
mbgoogle/brya/{brya0/redrix}: Add SBU orientation property for Type C Mux
BUG=b:214430691
Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com>
Change-Id: I6f7f9554b75f4d62298aac9938e66c71c3e7cee9
---
M src/mainboard/google/brya/variants/brya0/overridetree.cb
M src/mainboard/google/brya/variants/redrix/overridetree.cb
2 files changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/61622/1
diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb
index 1ef90bc..c35eb07 100644
--- a/src/mainboard/google/brya/variants/brya0/overridetree.cb
+++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb
@@ -631,6 +631,8 @@
chip drivers/intel/pmc_mux/conn
use usb2_port1 as usb2_port
use tcss_usb3_port1 as usb3_port
+ # SBU is fixed, HSL follows CC
+ register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
device generic 0 alias conn0 on end
end
chip drivers/intel/pmc_mux/conn
@@ -641,6 +643,8 @@
chip drivers/intel/pmc_mux/conn
use usb2_port3 as usb2_port
use tcss_usb3_port3 as usb3_port
+ # SBU is fixed, HSL follows CC
+ register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
device generic 2 alias conn2 on end
end
end
diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb
index 0cb0102..367cf88 100644
--- a/src/mainboard/google/brya/variants/redrix/overridetree.cb
+++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb
@@ -447,11 +447,15 @@
chip drivers/intel/pmc_mux/conn
use usb2_port1 as usb2_port
use tcss_usb3_port1 as usb3_port
+ # SBU is fixed, HSL follows CC
+ register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
device generic 0 alias conn0 on end
end
chip drivers/intel/pmc_mux/conn
use usb2_port3 as usb2_port
use tcss_usb3_port3 as usb3_port
+ # SBU is fixed, HSL follows CC
+ register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
device generic 1 alias conn1 on end
end
end
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61195 )
Change subject: soc/apollolake: Make IO decode / enable register configurable
......................................................................
Patch Set 5:
(1 comment)
File src/soc/intel/apollolake/bootblock/bootblock.c:
https://review.coreboot.org/c/coreboot/+/61195/comment/6c79fb21_18f48e70
PS3, Line 106: lpc_enable_fixed_io_ranges(io_enables);
> Done
Welp, looks like I read the code wrong. The original approach was fine.
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Change subject: soc/intel/common: Define enum cpu_perf_eff_type type for core types
......................................................................
Patch Set 4: Code-Review+2
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Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61587 )
Change subject: soc/intel/common: Remove GPIO PAD lock config override from mainboard
......................................................................
Patch Set 3: Code-Review+2
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Change subject: soc/intel/alderlake: Remove `soc_gpio_lock_config()` override function
......................................................................
Patch Set 2: Code-Review+2
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