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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61259 )
Change subject: soc/amd/cezanne: Turn off gpp clock request for disabled devices
......................................................................
Patch Set 20:
(3 comments)
Patchset:
PS20:
haven't done a full review yet
File src/soc/amd/cezanne/fch.c:
https://review.coreboot.org/c/coreboot/+/61259/comment/edfe1a03_1f53e106
PS20, Line 152: /*
: * The remapping of values is done so that the default of the enum used for the
: * devicetree settings is the clock being enabled, so that a missing devicetree
: * configuration for this will result in an always active clock and not an
: * inactive PCIe clock output.
: */
we should keep this comment, since what it points out isn't very obvious
https://review.coreboot.org/c/coreboot/+/61259/comment/4744bf9c_2df81b02
PS20, Line 21: #include "include/soc/platform_descriptors.h"
this should be #include <soc/platform_descriptors.h>
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Hello Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/61823
to look at the new patch set (#2).
Change subject: mb/google/var/{brya0, brya4es}: Use ACPI _PLD macro
......................................................................
mb/google/var/{brya0, brya4es}: Use ACPI _PLD macro
This patch uses ACPI _PLD macros for USB Type A and C ports.
BUG=b:216490477
TEST=emerge-brya coreboot
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I1940246fd88db29054f85c43672adc97dc90fa04
---
M src/mainboard/google/brya/variants/brya0/overridetree.cb
M src/mainboard/google/brya/variants/brya4es/overridetree.cb
2 files changed, 16 insertions(+), 96 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/61823/2
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61528 )
Change subject: mb/intel/adlrvp: Fix vbt loading error
......................................................................
mb/intel/adlrvp: Fix vbt loading error
When booting ADL RVP, coreboot is unable to load VBT binary as
makefile will rename VBT binary to "vbt.bin" when building
coreboot.rom.
The reason for having this function is that chromeOS has emerge
tool to streamline the VBT stitching process to support multiple
VBTs for different RVP boards; while we only need 1 vbt for generic
non-chromeOS usage. Hence add a chomeos kconfig to guard this.
TEST=Able to boot ADL RVP DDR5 with DP display.
Signed-off-by: Lean Sheng Tan <sheng.tan(a)9elements.com>
Change-Id: I5f6f9554b75f4d62198aac9938e65c71c3e7cee9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61528
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Reviewed-by: Subrata Banik <subratabanik(a)google.com>
---
M src/mainboard/intel/adlrvp/mainboard.c
1 file changed, 3 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Maulik V Vaghela: Looks good to me, approved
Subrata Banik: Looks good to me, approved
diff --git a/src/mainboard/intel/adlrvp/mainboard.c b/src/mainboard/intel/adlrvp/mainboard.c
index f929b10..d988fac 100644
--- a/src/mainboard/intel/adlrvp/mainboard.c
+++ b/src/mainboard/intel/adlrvp/mainboard.c
@@ -68,6 +68,9 @@
const char *mainboard_vbt_filename(void)
{
+ if (!CONFIG(CHROMEOS))
+ return "vbt.bin";
+
uint8_t sku_id = get_board_id();
switch (sku_id) {
case ADL_P_LP5_1:
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Gerrit-MessageType: merged
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/61801
to look at the new patch set (#3).
Change subject: acpi: Use ACPI macros to configure USB port _PLD object
......................................................................
acpi: Use ACPI macros to configure USB port _PLD object
This patch adds two ACPI macros for USB port A and C _PLD object
configuration as:
1. ACPI_PLD_TYPE_A
2. ACPI_PLD_TYPE_C
The configurable parameters are
- Panel, Port is exposed on which face of a panel.
- Horizontal, Horizontal position on the panel where the device
connection point resides.
- Group
- Token, Unique numerical value identifying a group.
- Position, Identifies this device connection point’s position
in the group (i.e. 1st, 2nd).
BUG=b:216490477
TEST=emerge-brya coreboot
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I245b17019b6d3c5e380c16cb3c9f4edc4dd10cc6
---
M src/include/acpi/acpi_pld.h
1 file changed, 18 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/61801/3
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