Attention is currently required from: Martin Roth - Personal, Patrick Rudolph.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52564 )
Change subject: [WIP]drivers/efi: Add UEFI variable store option support
......................................................................
Patch Set 2:
(16 comments)
File src/commonlib/bsd/include/commonlib/bsd/cb_err.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/28ea546d_9d034570
PS2, Line 29: CB_EFI_VS_NOT_FORMATED_INVALID = -107, /**< UEFI variable store not formated */
'FORMATED' may be misspelled - perhaps 'FORMATTED'?
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/e79e5d68_961c954f
PS2, Line 29: CB_EFI_VS_NOT_FORMATED_INVALID = -107, /**< UEFI variable store not formated */
'formated' may be misspelled - perhaps 'formatted'?
File src/drivers/efi/efi.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/69cf32c5_1f66bc71
PS2, Line 9: enum cb_err efi_fv_get_option(struct region_device *rdev, const char *name, void *dest, uint32_t *size);
line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/8b888006_accd8b22
PS2, Line 10: enum cb_err efi_fv_set_option(struct region_device *rdev, const char *name, void *data, size_t size);
line over 96 characters
File src/drivers/efi/efi.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/44557051_5314c67f
PS2, Line 82: if ( (fw_vol_hdr->Revision != EFI_FVH_REVISION)
that open brace { should be on the previous line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/5df5a906_5a4002bb
PS2, Line 82: if ( (fw_vol_hdr->Revision != EFI_FVH_REVISION)
space prohibited after that open parenthesis '('
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/6184cfa4_c6a63ab5
PS2, Line 147: return CB_EFI_VS_NOT_FORMATED_INVALID;
'FORMATED' may be misspelled - perhaps 'FORMATTED'?
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/34a2da07_696376c6
PS2, Line 235: !name ) {
space prohibited before that close parenthesis ')'
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/4906ccc3_53cb6dca
PS2, Line 250: if (rdev_readat(rdev, data, header_size + name_size, data_size) != data_size)
line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/6a30a138_53ee5a7f
PS2, Line 250: if (rdev_readat(rdev, data, header_size + name_size, data_size) != data_size)
Too many leading tabs - consider code refactoring
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/1aacdb5d_2704ee04
PS2, Line 275: enum cb_err efi_fv_get_option(struct region_device *rdev, const char *name, void *dest, uint32_t *size)
line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/f4dac5ff_51fb1ccc
PS2, Line 307: enum cb_err efi_fv_set_option(struct region_device *rdev, const char *name, void *data, size_t size)
line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/0980d364_57d200d7
PS2, Line 345: auth_hdr.Attributes = EFI_VARIABLE_NON_VOLATILE|EFI_VARIABLE_BOOTSERVICE_ACCESS|EFI_VARIABLE_RUNTIME_ACCESS;
line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/4989440b_ce366ba7
PS2, Line 357: if (rdev_writeat(rdev, &auth_hdr.State, offsetof(AUTHENTICATED_VARIABLE_HEADER, State),
line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/c0ee0360_66018b01
PS2, Line 369: hdr.Attributes = EFI_VARIABLE_NON_VOLATILE|EFI_VARIABLE_BOOTSERVICE_ACCESS|EFI_VARIABLE_RUNTIME_ACCESS;
line over 96 characters
File src/drivers/efi/option.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-140596):
https://review.coreboot.org/c/coreboot/+/52564/comment/66948c7d_40a4a663
PS2, Line 43: }
adding a line without newline at end of file
--
To view, visit https://review.coreboot.org/c/coreboot/+/52564
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I8079f71d29da5dc2db956fc68bef1486fe3906bb
Gerrit-Change-Number: 52564
Gerrit-PatchSet: 2
Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Reviewer: Martin Roth - Personal <martinroth(a)google.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Felix Singer <felixsinger(a)posteo.net>
Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Martin Roth - Personal <martinroth(a)google.com>
Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Comment-Date: Fri, 11 Feb 2022 12:56:48 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Attention is currently required from: Martin Roth - Personal, Patrick Rudolph.
Hello build bot (Jenkins), Martin Roth - Personal, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/52564
to look at the new patch set (#2).
Change subject: [WIP]drivers/efi: Add UEFI variable store option support
......................................................................
[WIP]drivers/efi: Add UEFI variable store option support
Add a driver to read UEFI variables stored in the SMMSTORE region.
This is particullary useful for EDK2 as payload and allows to reuse existing
tools to set/get options used by the firmware.
Test: Could enumerate all existing variables.
Change-Id: I8079f71d29da5dc2db956fc68bef1486fe3906bb
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/Kconfig
M src/commonlib/bsd/include/commonlib/bsd/cb_err.h
A src/drivers/efi/Kconfig
A src/drivers/efi/Makefile.inc
A src/drivers/efi/efi.c
A src/drivers/efi/efi.h
A src/drivers/efi/option.c
M src/drivers/smmstore/Makefile.inc
M src/drivers/smmstore/store.c
M src/include/smmstore.h
M src/vendorcode/intel/Makefile.inc
A src/vendorcode/intel/edk2/UDK2017/MdeModulePkg/Include/Guid/VariableFormat.h
A src/vendorcode/intel/edk2/option/option.h
13 files changed, 727 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/52564/2
--
To view, visit https://review.coreboot.org/c/coreboot/+/52564
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I8079f71d29da5dc2db956fc68bef1486fe3906bb
Gerrit-Change-Number: 52564
Gerrit-PatchSet: 2
Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Reviewer: Martin Roth - Personal <martinroth(a)google.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Felix Singer <felixsinger(a)posteo.net>
Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Martin Roth - Personal <martinroth(a)google.com>
Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-MessageType: newpatchset
Attention is currently required from: Caveh Jalali, Paul Menzel, Tim Wawrzynczak, Rizwan Qureshi, Edward O'Callaghan, Nick Vaccaro, Alex Levin, Patrick Rudolph.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61849 )
Change subject: soc/intel/fast_spi: Check SPI Cycle In-Progress prior start HW Seq
......................................................................
Patch Set 4:
(1 comment)
File src/soc/intel/common/block/fast_spi/fast_spi_flash.c:
https://review.coreboot.org/c/coreboot/+/61849/comment/02a0cba9_62e9b9a2
PS2, Line 142: printk(BIOS_INFO, "SPI Transaction in progress..\n");
> > This might be printed a lot of times? Also, it just a debug message? […]
Ack
--
To view, visit https://review.coreboot.org/c/coreboot/+/61849
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4d35058244a73e77f6204c4d04d09bae9e5ac62c
Gerrit-Change-Number: 61849
Gerrit-PatchSet: 4
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Alex Levin <levinale(a)chromium.org>
Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org>
Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com>
Gerrit-Attention: Alex Levin <levinale(a)chromium.org>
Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Comment-Date: Fri, 11 Feb 2022 12:52:03 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>
Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-MessageType: comment
Attention is currently required from: Caveh Jalali, Paul Menzel, Tim Wawrzynczak, Rizwan Qureshi, Edward O'Callaghan, Nick Vaccaro, Alex Levin, Patrick Rudolph.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61849 )
Change subject: soc/intel/fast_spi: Check SPI Cycle In-Progress prior start HW Seq
......................................................................
Patch Set 3:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/61849/comment/83d7a89b_59572643
PS2, Line 8:
> Is there an actual problem, or just to confirm to the datasheet?
It's fix IMO, we are seeing some failure and figured out SPI driver is missing one important sync.
https://review.coreboot.org/c/coreboot/+/61849/comment/f1c99628_e7bd46c5
PS2, Line 20: Added
> Add
Ack
https://review.coreboot.org/c/coreboot/+/61849/comment/c9082c67_d3a7ae80
PS2, Line 22:
> Tested how?
Ack
File src/soc/intel/common/block/fast_spi/fast_spi_flash.c:
https://review.coreboot.org/c/coreboot/+/61849/comment/568d27d3_59aaf92e
PS2, Line 142: printk(BIOS_INFO, "SPI Transaction in progress..\n");
> This might be printed a lot of times? Also, it just a debug message?
Isn't that good way to know if SPI bus is *real* busy using a debug msg ? This might be rear but still relevant ?
--
To view, visit https://review.coreboot.org/c/coreboot/+/61849
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4d35058244a73e77f6204c4d04d09bae9e5ac62c
Gerrit-Change-Number: 61849
Gerrit-PatchSet: 3
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Alex Levin <levinale(a)chromium.org>
Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org>
Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com>
Gerrit-Attention: Alex Levin <levinale(a)chromium.org>
Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Comment-Date: Fri, 11 Feb 2022 12:49:52 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-MessageType: comment
Attention is currently required from: Subrata Banik, Caveh Jalali, Tim Wawrzynczak, Rizwan Qureshi, Edward O'Callaghan, Nick Vaccaro, Alex Levin, Patrick Rudolph.
Hello build bot (Jenkins), Caveh Jalali, Tim Wawrzynczak, Rizwan Qureshi, Edward O'Callaghan, Nick Vaccaro, Alex Levin, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/61849
to look at the new patch set (#3).
Change subject: soc/intel/fast_spi: Check SPI Cycle In-Progress prior start HW Seq
......................................................................
soc/intel/fast_spi: Check SPI Cycle In-Progress prior start HW Seq
As per EDS, SPI controller sets the HSFSTS.bit5 (SCIP) when software
sets the Flash Cycle Go (FGO) bit in the Hardware Sequencing Flash
Control register.
This bit remains set until the cycle completes on the SPI interface.
Hardware automatically sets and clears this bit so that software can
determine when read data is valid and/or when it is safe to begin
programming the next command.
Software must initiate the next SPI transaction when this bit is 0.
Add non-blocking mechanism with `5sec` timeout to report back error
if current SPI transaction is failing due to on-going SPI access.
BUG=b:215255210
TEST=Able to boot brya and verified SPI read/write is successful.
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I4d35058244a73e77f6204c4d04d09bae9e5ac62c
---
M src/soc/intel/common/block/fast_spi/fast_spi_flash.c
1 file changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/61849/3
--
To view, visit https://review.coreboot.org/c/coreboot/+/61849
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4d35058244a73e77f6204c4d04d09bae9e5ac62c
Gerrit-Change-Number: 61849
Gerrit-PatchSet: 3
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Alex Levin <levinale(a)chromium.org>
Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org>
Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Subrata Banik <subratabanik(a)google.com>
Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com>
Gerrit-Attention: Alex Levin <levinale(a)chromium.org>
Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-MessageType: newpatchset
Attention is currently required from: Sean Rhodes.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61859 )
Change subject: drivers/smmstore/store.c: Fix static assertion for memory mapped SOCs
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> If the address is aligned in FMAP, then it won't be aligned when its memory-mapped and problems ensue.
>
> APL and GLK will memory map the BIOS region (BP1 + BP2) at (0x100000000 - sizeof(BIOS)). And NvStorage has to be the last section.
>
>
> An example, using this:
> https://review.coreboot.org/c/coreboot/+/60980/49/src/mainboard/starlabs/li…
>
> If you align SMMStore in FMAP at 0x690000, it will be memory mapped at 0xFFF41000 and doesn't work.
How things are memory mapped is irrelevant here. Is the runtime check failing? Then that check is wrong and it should check for the write offset and not the read offset.
--
To view, visit https://review.coreboot.org/c/coreboot/+/61859
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I902abd97c0d81ee7c13fa32e57279c8e55c36122
Gerrit-Change-Number: 61859
Gerrit-PatchSet: 1
Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems>
Gerrit-Comment-Date: Fri, 11 Feb 2022 12:48:57 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems>
Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-MessageType: comment
Attention is currently required from: Arthur Heymans, Patrick Rudolph, Elyes Haouas.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61845 )
Change subject: sb/intel/i82801gx/azalia.c: Fix read on 16bits register
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/61845/comment/e51a1f94_44bc46f6
PS3, Line 10: bits
bit
File src/southbridge/intel/i82801gx/azalia.c:
https://review.coreboot.org/c/coreboot/+/61845/comment/be49d86c_9fccd499
PS3, Line 17: const u16 codec_mask = (1 << CONFIG_AZALIA_MAX_CODECS) - 1;
Why this form and not 0xf?
--
To view, visit https://review.coreboot.org/c/coreboot/+/61845
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I530aa21d5a26ade0bc071351ac609c84bd8eb2cb
Gerrit-Change-Number: 61845
Gerrit-PatchSet: 3
Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr>
Gerrit-Comment-Date: Fri, 11 Feb 2022 12:41:43 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Attention is currently required from: Subrata Banik, Caveh Jalali, Tim Wawrzynczak, Rizwan Qureshi, Edward O'Callaghan, Nick Vaccaro, Alex Levin, Patrick Rudolph.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61849 )
Change subject: soc/intel/fast_spi: Check SPI Cycle In-Progress prior start HW Seq
......................................................................
Patch Set 2:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/61849/comment/9507cbdf_2dea34e5
PS2, Line 8:
Is there an actual problem, or just to confirm to the datasheet?
https://review.coreboot.org/c/coreboot/+/61849/comment/3884444f_6d202b7a
PS2, Line 20: Added
Add
https://review.coreboot.org/c/coreboot/+/61849/comment/7ce5d04f_aaba5e37
PS2, Line 22:
Tested how?
File src/soc/intel/common/block/fast_spi/fast_spi_flash.c:
https://review.coreboot.org/c/coreboot/+/61849/comment/a8c02d2a_5902b789
PS2, Line 142: printk(BIOS_INFO, "SPI Transaction in progress..\n");
This might be printed a lot of times? Also, it just a debug message?
--
To view, visit https://review.coreboot.org/c/coreboot/+/61849
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4d35058244a73e77f6204c4d04d09bae9e5ac62c
Gerrit-Change-Number: 61849
Gerrit-PatchSet: 2
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Alex Levin <levinale(a)chromium.org>
Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org>
Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Subrata Banik <subratabanik(a)google.com>
Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com>
Gerrit-Attention: Alex Levin <levinale(a)chromium.org>
Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Comment-Date: Fri, 11 Feb 2022 12:39:22 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Attention is currently required from: Bao Zheng, Jason Glenesk, Raul Rangel, Zheng Bao, Avinash Alevoor, Felix Held.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61837 )
Change subject: soc/amd/cezanne: Add options to Kconfig to give a SPL table
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/61837/comment/5ed4643b_8d437497
PS2, Line 7: Add options to Kconfig to give a SPL table
Maybe:
> Allow to specify SPL table path in Kconfig
--
To view, visit https://review.coreboot.org/c/coreboot/+/61837
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4a5ee335ea8808b595dc65ebafd15baedfbdd06e
Gerrit-Change-Number: 61837
Gerrit-PatchSet: 2
Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com>
Gerrit-Reviewer: Avinash Alevoor
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: Zheng Bao
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com>
Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Attention: Zheng Bao
Gerrit-Attention: Avinash Alevoor
Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Comment-Date: Fri, 11 Feb 2022 12:35:50 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Attention is currently required from: Bao Zheng, Jason Glenesk, Raul Rangel, Zheng Bao, Avinash Alevoor, Felix Held.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61837 )
Change subject: soc/amd/cezanne: Add options to Kconfig to give a SPL table
......................................................................
Patch Set 2:
(1 comment)
File src/soc/amd/cezanne/Kconfig:
https://review.coreboot.org/c/coreboot/+/61837/comment/b0c04ecb_72e8d571
PS2, Line 384: Have a mainboard specific SPL table file
Please extend, how that file can be created/obtained.
--
To view, visit https://review.coreboot.org/c/coreboot/+/61837
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4a5ee335ea8808b595dc65ebafd15baedfbdd06e
Gerrit-Change-Number: 61837
Gerrit-PatchSet: 2
Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com>
Gerrit-Reviewer: Avinash Alevoor
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: Zheng Bao
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com>
Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Attention: Zheng Bao
Gerrit-Attention: Avinash Alevoor
Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Comment-Date: Fri, 11 Feb 2022 12:34:27 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment