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Change subject: soc/mediatek/mt8188: Disable input-gating for big-core SRAM
......................................................................
soc/mediatek/mt8188: Disable input-gating for big-core SRAM
The input-gating is an experimental feature (but unfortunately default
enabled) and would lead to crash on MT8188, so we have to disable it
in the firmware stage.
BUG=b:233720142
TEST=CPUfreq in kernel test pass.
Change-Id: Ifd68fe9362587955cdb8598c4cc5c2d0eefe53ca
Signed-off-by: Liju-Clr Chen <liju-clr.chen(a)mediatek.com>
---
M src/soc/mediatek/mt8188/Makefile.inc
A src/soc/mediatek/mt8188/cpu_inputgating.c
A src/soc/mediatek/mt8188/include/soc/cpu_inputgating.h
M src/soc/mediatek/mt8188/soc.c
4 files changed, 45 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/69089/10
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Hello Hung-Te Lin, build bot (Jenkins), Rex-BC Chen, Yidi Lin, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
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Change subject: soc/mediatek/mt8188: Fix AP hang when enabling cpufreq-hw driver
......................................................................
soc/mediatek/mt8188: Fix AP hang when enabling cpufreq-hw driver
When enabling cpufreq-hw driver, it is required for MCUPM to access
secure register. Therefore, we enable sideband to allow MCUPM to
access the secure registers.
BUG=b:236331463
TEST=It works well after boot to login shell.
Change-Id: I67b08c38a31a7eae1bc59543a5148a78b61456d6
Signed-off-by: Liju-Clr Chen <liju-clr.chen(a)mediatek.com>
---
M src/soc/mediatek/mt8188/devapc.c
M src/soc/mediatek/mt8188/include/soc/devapc.h
2 files changed, 23 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/69088/10
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I'd like you to reexamine a change. Please visit
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Change subject: Revert "soc/mediatek/mt8188: Allow CPUfreq hardware to access MCUPM registers"
......................................................................
Revert "soc/mediatek/mt8188: Allow CPUfreq hardware to access MCUPM registers"
This reverts commit a8172c329fe309f3b5b409c1a59a227186400dd4.
In the aforementioned patch, we allowed MCUPM to access secure
registers and set the domain to DOMAIN_2.
Additional attribute settings are also required when a hardware is
set to a specific domain. Otherwise, there would be violation between
hardware. Since MT8188 is in bring-up stage, we simply enable access
register permission for the DOMAIN_0 by default. So remove the wrong
setting for MCUPM, SCP and SSPM.
We will complete DEVAPC setting when the settings are confirmed.
Change-Id: I5d9809f6e84b8d10bc2e6f2ea5a442e676ad3bf9
Signed-off-by: Liju-Clr Chen <liju-clr.chen(a)mediatek.com>
---
M src/soc/mediatek/mt8188/devapc.c
M src/soc/mediatek/mt8188/include/soc/devapc.h
2 files changed, 23 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/69139/5
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Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69127 )
Change subject: vendorcode/amd/agesa: Drop unused common code
......................................................................
Patch Set 6: Code-Review+2
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Change subject: vendorcode/amd/agesa/family16: Drop unused platform
......................................................................
Patch Set 6: Code-Review+2
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EricKY Cheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68649 )
Change subject: soc/amd/mendocino: Enhance DPTC_INPUT to support 13 DPTC thermal parameters
......................................................................
Patch Set 17:
(1 comment)
Patchset:
PS17:
Hi Tim,
Did you mean that I don't replace vrm parameters with throttle label?
I have updated the modification.
Please help to provide more detail if I have misunderstanding on your suggestion.
BR,
Eric KY Cheng
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Change subject: {cpu/nb}/amd/family15tn: Remove platform
......................................................................
Patch Set 9: Code-Review+2
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