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Change subject: Documentation/drivers: Update section on touchscreen runtime detection
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Patch Set 2: Code-Review+2
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Change subject: mb/google/guybrush: Use detect vs probed flag for touchscreens
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Patch Set 1: Code-Review+2
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Change subject: mb/google/guybrush: Implement touchscreen power sequencing
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Patch Set 1: Code-Review+2
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Change subject: mb/google/guybrush: Rename pcie_gpio_table to romstage_gpio_table
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Change subject: mb/google/guybrush: rename baseboard GPIO table getter for clarity
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Change subject: soc/intel/alderlake: Allow channel 0 for memory-down
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Patch Set 5:
(1 comment)
Patchset:
PS4:
> Cursed idea: Add MEM_TOPO_MIXED_BACKWARDS or something like that?
After rebasing the changes it is working again for me.
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Change subject: drivers/ipmi/ocp: add PCIe SEL support
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Patch Set 8: Code-Review+2
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Change subject: 3rdparty/intel-microcode: Use microcode-20220510 release
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Change subject: src/include/smbios: Add definition for smbios type 4 and type 9
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Patch Set 1: Code-Review+1
(2 comments)
File src/include/smbios.h:
https://review.coreboot.org/c/coreboot/+/68902/comment/013829a1_2d0ade99
PS1, Line 487: #define SMBIOS_PROCESSOR_FAMILY_XEON 0xb3
Where is this define used? Does it really belong in here?
https://review.coreboot.org/c/coreboot/+/68902/comment/ad93c2bd_b4159665
PS1, Line 488: #define PROCESSOR_64BIT_CAPABLE BIT(2)
: #define PROCESSOR_MULTI_CORE BIT(3)
: #define PROCESSOR_POWER_PERFORMANCE_CONTROL BIT(7)
Hmmm, let's not use `BIT()` for consistency with existing macros
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