coreboot-gerrit November 2022

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[S] Change in coreboot[master]: cpu/x86/mp_init.c: Fix the logic to add AP cpus
by Arthur Heymans (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Bill XIE, Paul Menzel. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69215 ) Change subject: cpu/x86/mp_init.c: Fix the logic to add AP cpus ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > I think the proper way to fix this is to remove the fake LAPIC, as it causes other problems. Also another way to go about this is to skip disabled ones as the fake 0xacac always is. CB:59316 should take care of that. -- To view, visit https://review.coreboot.org/c/coreboot/+/69215 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1075bc52091e619ef79cbeab0a0f6b57cff1d708 Gerrit-Change-Number: 69215 Gerrit-PatchSet: 4 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 07 Nov 2022 09:46:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: src/include/smbios: Add definition for smbios type 4 and type 9
by Shuming Chu (Shuming) (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Paul Menzel, Shuming Chu (Shuming), Angel Pons, Tim Chu. Hello build bot (Jenkins), Jonathan Zhang, Paul Menzel, Angel Pons, Angel Pons, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68902 to look at the new patch set (#3). Change subject: src/include/smbios: Add definition for smbios type 4 and type 9 ...................................................................... src/include/smbios: Add definition for smbios type 4 and type 9 Add definition for smbios type 4 and type 9 Signed-off-by: Tim Chu <Tim.Chu(a)quantatw.com> Change-Id: I559995b0204f8e5bdeef2c0f8b394f9011d72240 --- M src/include/smbios.h 1 file changed, 23 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/68902/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I559995b0204f8e5bdeef2c0f8b394f9011d72240 Gerrit-Change-Number: 68902 Gerrit-PatchSet: 3 Gerrit-Owner: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: cpu/intel/model_206ax: Remove fake lapic device
by Arthur Heymans (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Arthur Heymans, Tristan Corrick, Angel Pons, Alexander Couzens, Evgeny Zinoviev, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59316 ) Change subject: cpu/intel/model_206ax: Remove fake lapic device ...................................................................... Patch Set 3: (1 comment) File src/cpu/intel/model_206ax/acpi.c: https://review.coreboot.org/c/coreboot/+/59316/comment/7c717b4d_f880a85f PS2, Line 100: config_of(config_of_lapic()) > Needs update? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id3b1c4ca027e2905535e137691c3e3e60417dbf3 Gerrit-Change-Number: 59316 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 07 Nov 2022 09:46:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: nb/intel/x4x: Hook up PCI domain and CPU bus ops to devicetree
by Arthur Heymans (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Stefan Ott, Angel Pons, Alexander Couzens. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69295 ) Change subject: nb/intel/x4x: Hook up PCI domain and CPU bus ops to devicetree ...................................................................... nb/intel/x4x: Hook up PCI domain and CPU bus ops to devicetree Change-Id: I0a7b3167392c152da6459dfc202ef11b2e61400a Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/acer/g43t-am3/devicetree.cb M src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/devicetree.cb M src/mainboard/asrock/g41c-gs/variants/g41c-gs/devicetree.cb M src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb M src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb M src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb M src/mainboard/asus/p5qc/variants/p5q/devicetree.cb M src/mainboard/asus/p5qc/variants/p5q_pro/devicetree.cb M src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb M src/mainboard/asus/p5qc/variants/p5qc/devicetree.cb M src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb M src/mainboard/asus/p5ql-em/devicetree.cb M src/mainboard/asus/p5qpl-am/devicetree.cb M src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb M src/mainboard/asus/p5qpl-am/variants/p5qpl-am/overridetree.cb M src/mainboard/foxconn/g41s-k/devicetree.cb M src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb M src/mainboard/foxconn/g41s-k/variants/g41s-k/overridetree.cb M src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb M src/mainboard/intel/dg41wv/devicetree.cb M src/mainboard/intel/dg43gt/devicetree.cb M src/mainboard/lenovo/thinkcentre_a58/devicetree.cb M src/northbridge/intel/x4x/northbridge.c 23 files changed, 92 insertions(+), 52 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/69295/1 diff --git a/src/mainboard/acer/g43t-am3/devicetree.cb b/src/mainboard/acer/g43t-am3/devicetree.cb index a713f34..713ac40 100644 --- a/src/mainboard/acer/g43t-am3/devicetree.cb +++ b/src/mainboard/acer/g43t-am3/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xacac off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain subsystemid 0x8086 0x0028 inherit device pci 0.0 on end # Host Bridge device pci 2.0 on end # Integrated graphics controller diff --git a/src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/devicetree.cb b/src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/devicetree.cb index ff050306..5d10628 100644 --- a/src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/devicetree.cb +++ b/src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xACAC off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit device pci 0.0 on # Host Bridge subsystemid 0x1849 0x2e30 diff --git a/src/mainboard/asrock/g41c-gs/variants/g41c-gs/devicetree.cb b/src/mainboard/asrock/g41c-gs/variants/g41c-gs/devicetree.cb index 89e6ebb..d0759e2 100644 --- a/src/mainboard/asrock/g41c-gs/variants/g41c-gs/devicetree.cb +++ b/src/mainboard/asrock/g41c-gs/variants/g41c-gs/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xACAC off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit device pci 0.0 on # Host Bridge subsystemid 0x1849 0x2e30 diff --git a/src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb b/src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb index c3c6b1b..818ceaa 100644 --- a/src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb +++ b/src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xACAC off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit device pci 0.0 on # Host Bridge subsystemid 0x1849 0x2e30 diff --git a/src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb b/src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb index 9d22761..9f4142b 100644 --- a/src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb +++ b/src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xACAC off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit device pci 0.0 on # Host Bridge subsystemid 0x1849 0x2e30 diff --git a/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb b/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb index 8693c01..e0df76b 100644 --- a/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb +++ b/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xACAC off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit device pci 0.0 on # Host Bridge subsystemid 0x1849 0x2e30 diff --git a/src/mainboard/asus/p5qc/variants/p5q/devicetree.cb b/src/mainboard/asus/p5qc/variants/p5q/devicetree.cb index 9057ed7..c452672 100644 --- a/src/mainboard/asus/p5qc/variants/p5q/devicetree.cb +++ b/src/mainboard/asus/p5qc/variants/p5q/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xACAC off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain device pci 0.0 on end # Host Bridge device pci 1.0 on end # PEG device pci 6.0 off end # PEG 2 diff --git a/src/mainboard/asus/p5qc/variants/p5q_pro/devicetree.cb b/src/mainboard/asus/p5qc/variants/p5q_pro/devicetree.cb index bc9dff6..b0452d4 100644 --- a/src/mainboard/asus/p5qc/variants/p5q_pro/devicetree.cb +++ b/src/mainboard/asus/p5qc/variants/p5q_pro/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xacac off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain device pci 0.0 on end # Host Bridge device pci 1.0 on end # PEG device pci 2.0 off end # Integrated graphics controller diff --git a/src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb b/src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb index 01de13f..8390bc0 100644 --- a/src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb +++ b/src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xacac off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain device pci 0.0 on end # Host Bridge device pci 1.0 on end # PEG device pci 2.0 off end # Integrated graphics controller diff --git a/src/mainboard/asus/p5qc/variants/p5qc/devicetree.cb b/src/mainboard/asus/p5qc/variants/p5qc/devicetree.cb index 1b50903..70e82e8 100644 --- a/src/mainboard/asus/p5qc/variants/p5qc/devicetree.cb +++ b/src/mainboard/asus/p5qc/variants/p5qc/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xacac off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain device pci 0.0 on end # Host Bridge device pci 1.0 on end # PEG device pci 2.0 off end # Integrated graphics controller diff --git a/src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb b/src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb index 01de13f..8390bc0 100644 --- a/src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb +++ b/src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xacac off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain device pci 0.0 on end # Host Bridge device pci 1.0 on end # PEG device pci 2.0 off end # Integrated graphics controller diff --git a/src/mainboard/asus/p5ql-em/devicetree.cb b/src/mainboard/asus/p5ql-em/devicetree.cb index 242ea5a..a839b9d 100644 --- a/src/mainboard/asus/p5ql-em/devicetree.cb +++ b/src/mainboard/asus/p5ql-em/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xacac off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain device pci 0.0 on # Host Bridge subsystemid 0x1043 0x8336 end diff --git a/src/mainboard/asus/p5qpl-am/devicetree.cb b/src/mainboard/asus/p5qpl-am/devicetree.cb index 1cbee74..82b1c61 100644 --- a/src/mainboard/asus/p5qpl-am/devicetree.cb +++ b/src/mainboard/asus/p5qpl-am/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xacac off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain device pci 0.0 on end # Host Bridge device pci 1.0 on end # PEG device pci 2.0 on end # Integrated graphics controller diff --git a/src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb b/src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb index da43d4d..3642f5e 100644 --- a/src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb +++ b/src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain subsystemid 0x1043 0x8179 inherit chip southbridge/intel/i82801gx # Southbridge device pci 1f.0 on # ISA bridge diff --git a/src/mainboard/asus/p5qpl-am/variants/p5qpl-am/overridetree.cb b/src/mainboard/asus/p5qpl-am/variants/p5qpl-am/overridetree.cb index 5efb749..ea93f8b 100644 --- a/src/mainboard/asus/p5qpl-am/variants/p5qpl-am/overridetree.cb +++ b/src/mainboard/asus/p5qpl-am/variants/p5qpl-am/overridetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain subsystemid 0x1043 0x836d inherit chip southbridge/intel/i82801gx # Southbridge device pci 1f.0 on # ISA bridge diff --git a/src/mainboard/foxconn/g41s-k/devicetree.cb b/src/mainboard/foxconn/g41s-k/devicetree.cb index 9bde4b2..578f13d 100644 --- a/src/mainboard/foxconn/g41s-k/devicetree.cb +++ b/src/mainboard/foxconn/g41s-k/devicetree.cb @@ -1,7 +1,8 @@ ## SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xACAC off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain device pci 0.0 on end # Host Bridge device pci 1.0 on end # PEG device pci 2.0 on end # Integrated graphics controller diff --git a/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb b/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb index 96e11e3..edd386f 100644 --- a/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb +++ b/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/x4x # Northbridge - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain subsystemid 0x105b 0x0dc0 inherit chip southbridge/intel/i82801gx # Southbridge device pci 1f.0 on # ISA bridge diff --git a/src/mainboard/foxconn/g41s-k/variants/g41s-k/overridetree.cb b/src/mainboard/foxconn/g41s-k/variants/g41s-k/overridetree.cb index 156a981..bc55519 100644 --- a/src/mainboard/foxconn/g41s-k/variants/g41s-k/overridetree.cb +++ b/src/mainboard/foxconn/g41s-k/variants/g41s-k/overridetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/x4x # Northbridge - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain subsystemid 0x105b 0x0dda inherit end end diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb index 6328bc6..d216863 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb +++ b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xACAC off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit device pci 0.0 on # Host Bridge subsystemid 0x1458 0x5000 diff --git a/src/mainboard/intel/dg41wv/devicetree.cb b/src/mainboard/intel/dg41wv/devicetree.cb index 5f945c1..9e5c136 100644 --- a/src/mainboard/intel/dg41wv/devicetree.cb +++ b/src/mainboard/intel/dg41wv/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xACAC off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit device pci 0.0 on # Host Bridge subsystemid 0x8086 0x5756 diff --git a/src/mainboard/intel/dg43gt/devicetree.cb b/src/mainboard/intel/dg43gt/devicetree.cb index bb2456f..5e2eb9d 100644 --- a/src/mainboard/intel/dg43gt/devicetree.cb +++ b/src/mainboard/intel/dg43gt/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xacac off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain subsystemid 0x8086 0x0028 inherit device pci 0.0 on end # Host Bridge device pci 2.0 on end # Integrated graphics controller diff --git a/src/mainboard/lenovo/thinkcentre_a58/devicetree.cb b/src/mainboard/lenovo/thinkcentre_a58/devicetree.cb index e5d10d7..a4b9ac8 100644 --- a/src/mainboard/lenovo/thinkcentre_a58/devicetree.cb +++ b/src/mainboard/lenovo/thinkcentre_a58/devicetree.cb @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on # APIC cluster + device cpu_cluster 0 on + ops x4x_cpu_bus_ops # APIC cluster chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -9,7 +10,8 @@ device lapic 0xACAC off end end end - device domain 0 on # PCI domain + device domain 0 on + ops x4x_pci_domain_ops # PCI domain subsystemid 0x17aa 0x304f inherit device pci 0.0 on end # Host Bridge device pci 1.0 on end # PEG diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index ac276b6..e114435 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -144,7 +144,7 @@ pci_write_config8(dev, D0F0_SMRAM, smram); } -static struct device_operations pci_domain_ops = { +static struct device_operations x4x_pci_domain_ops = { .read_resources = mch_domain_read_resources, .set_resources = mch_domain_set_resources, .init = mch_domain_init, @@ -154,21 +154,12 @@ .acpi_name = northbridge_acpi_name, }; -static struct device_operations cpu_bus_ops = { +static struct device_operations x4x_cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, .init = mp_cpu_bus_init, }; -static void enable_dev(struct device *dev) -{ - /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_DOMAIN) - dev->ops = &pci_domain_ops; - else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) - dev->ops = &cpu_bus_ops; -} - static void hide_pci_fn(const int dev_bit_base, const struct device *dev) { if (!dev || dev->enabled) @@ -201,6 +192,5 @@ struct chip_operations northbridge_intel_x4x_ops = { CHIP_NAME("Intel 4-Series Northbridge") - .enable_dev = enable_dev, .init = x4x_init, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/69295 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0a7b3167392c152da6459dfc202ef11b2e61400a Gerrit-Change-Number: 69295 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: nb/intel/i945: Hook up PCI domain and CPU bus ops to devicetree
by Arthur Heymans (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Alexander Couzens, Evgeny Zinoviev. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69294 ) Change subject: nb/intel/i945: Hook up PCI domain and CPU bus ops to devicetree ...................................................................... nb/intel/i945: Hook up PCI domain and CPU bus ops to devicetree Change-Id: I4f30f5275d38c3eecf54d008b3edbf68071ab10d Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/apple/macbook21/devicetree.cb M src/mainboard/asus/p5gc-mx/devicetree.cb M src/mainboard/getac/p470/devicetree.cb M src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb M src/mainboard/ibase/mb899/devicetree.cb M src/mainboard/intel/d945gclf/devicetree.cb M src/mainboard/kontron/986lcd-m/devicetree.cb M src/mainboard/lenovo/t60/devicetree.cb M src/mainboard/lenovo/t60/variants/t60/overridetree.cb M src/mainboard/lenovo/t60/variants/z61t/overridetree.cb M src/mainboard/lenovo/x60/devicetree.cb M src/mainboard/roda/rk886ex/devicetree.cb M src/northbridge/intel/i945/northbridge.c 13 files changed, 34 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/69294/1 diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb index bcce778..358fcf4 100644 --- a/src/mainboard/apple/macbook21/devicetree.cb +++ b/src/mainboard/apple/macbook21/devicetree.cb @@ -14,6 +14,7 @@ register "gpu_panel_power_cycle_delay" = "2" device cpu_cluster 0 on + ops i945_cpu_bus_ops chip cpu/intel/socket_m device lapic 0 on end end @@ -22,6 +23,7 @@ register "pci_mmio_size" = "768" device domain 0 on + ops i945_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x8086 0x7270 end diff --git a/src/mainboard/asus/p5gc-mx/devicetree.cb b/src/mainboard/asus/p5gc-mx/devicetree.cb index 172f65f..ad9b961 100644 --- a/src/mainboard/asus/p5gc-mx/devicetree.cb +++ b/src/mainboard/asus/p5gc-mx/devicetree.cb @@ -3,6 +3,7 @@ chip northbridge/intel/i945 device cpu_cluster 0 on + ops i945_cpu_bus_ops chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -12,6 +13,7 @@ end device domain 0 on + ops i945_pci_domain_ops device pci 00.0 on # host bridge subsystemid 0x1458 0x5000 end diff --git a/src/mainboard/getac/p470/devicetree.cb b/src/mainboard/getac/p470/devicetree.cb index 9a91b81..345bbd8 100644 --- a/src/mainboard/getac/p470/devicetree.cb +++ b/src/mainboard/getac/p470/devicetree.cb @@ -6,6 +6,7 @@ register "gfx.did" = "{ 0x80000100, 0x80000410, 0x80000320, 0x80000410, 0x00000005 }" device cpu_cluster 0 on + ops i945_cpu_bus_ops chip cpu/intel/socket_m device lapic 0 on end end @@ -14,6 +15,7 @@ register "pci_mmio_size" = "768" device domain 0 on + ops i945_pci_domain_ops device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port device pci 02.0 on end # vga controller diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb b/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb index c0f198f..28af26f 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb @@ -3,6 +3,7 @@ chip northbridge/intel/i945 device cpu_cluster 0 on + ops i945_cpu_bus_ops chip cpu/intel/socket_LGA775 device lapic 0 on end end @@ -14,6 +15,7 @@ register "pci_mmio_size" = "768" device domain 0 on + ops i945_pci_domain_ops device pci 00.0 on # host bridge subsystemid 0x1458 0x5000 end diff --git a/src/mainboard/ibase/mb899/devicetree.cb b/src/mainboard/ibase/mb899/devicetree.cb index 12104e4..1b59fcc 100644 --- a/src/mainboard/ibase/mb899/devicetree.cb +++ b/src/mainboard/ibase/mb899/devicetree.cb @@ -3,6 +3,7 @@ register "gfx" = "GMA_STATIC_DISPLAYS(0)" device cpu_cluster 0 on + ops i945_cpu_bus_ops chip cpu/intel/socket_m device lapic 0 on end end @@ -11,6 +12,7 @@ register "pci_mmio_size" = "768" device domain 0 on + ops i945_pci_domain_ops device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port device pci 02.0 on end # vga controller diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb index 669122f..0238e04 100644 --- a/src/mainboard/intel/d945gclf/devicetree.cb +++ b/src/mainboard/intel/d945gclf/devicetree.cb @@ -3,6 +3,7 @@ chip northbridge/intel/i945 device cpu_cluster 0 on + ops i945_cpu_bus_ops chip cpu/intel/socket_441 device lapic 0 on end end @@ -11,6 +12,7 @@ register "pci_mmio_size" = "768" device domain 0 on + ops i945_pci_domain_ops subsystemid 0x8086 0x464c inherit device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb index bd0db6d..90da56c 100644 --- a/src/mainboard/kontron/986lcd-m/devicetree.cb +++ b/src/mainboard/kontron/986lcd-m/devicetree.cb @@ -3,6 +3,7 @@ register "gfx" = "GMA_STATIC_DISPLAYS(0)" device cpu_cluster 0 on + ops i945_cpu_bus_ops chip cpu/intel/socket_m device lapic 0 on end end @@ -11,6 +12,7 @@ register "pci_mmio_size" = "768" device domain 0 on + ops i945_pci_domain_ops device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe x16 bridge device pci 02.0 on end # GMA950 iGPU + VGA diff --git a/src/mainboard/lenovo/t60/devicetree.cb b/src/mainboard/lenovo/t60/devicetree.cb index 7709a87..c77af6b 100644 --- a/src/mainboard/lenovo/t60/devicetree.cb +++ b/src/mainboard/lenovo/t60/devicetree.cb @@ -14,6 +14,7 @@ register "gpu_panel_power_cycle_delay" = "2" device cpu_cluster 0 on + ops i945_cpu_bus_ops chip cpu/intel/socket_m device lapic 0 on end end @@ -22,6 +23,7 @@ register "pci_mmio_size" = "768" device domain 0 on + ops i945_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2015 end diff --git a/src/mainboard/lenovo/t60/variants/t60/overridetree.cb b/src/mainboard/lenovo/t60/variants/t60/overridetree.cb index c58884a..cd9f45a 100644 --- a/src/mainboard/lenovo/t60/variants/t60/overridetree.cb +++ b/src/mainboard/lenovo/t60/variants/t60/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/i945 device domain 0 on + ops i945_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2015 end diff --git a/src/mainboard/lenovo/t60/variants/z61t/overridetree.cb b/src/mainboard/lenovo/t60/variants/z61t/overridetree.cb index 00f3f19..99839d4 100644 --- a/src/mainboard/lenovo/t60/variants/z61t/overridetree.cb +++ b/src/mainboard/lenovo/t60/variants/z61t/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/i945 device domain 0 on + ops i945_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2017 end diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb index 8620062..d56ec51 100644 --- a/src/mainboard/lenovo/x60/devicetree.cb +++ b/src/mainboard/lenovo/x60/devicetree.cb @@ -14,6 +14,7 @@ register "gpu_panel_power_cycle_delay" = "2" device cpu_cluster 0 on + ops i945_cpu_bus_ops chip cpu/intel/socket_m device lapic 0 on end end @@ -22,6 +23,7 @@ register "pci_mmio_size" = "768" device domain 0 on + ops i945_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2017 end diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb index 6b9dbd9..4023af80 100644 --- a/src/mainboard/roda/rk886ex/devicetree.cb +++ b/src/mainboard/roda/rk886ex/devicetree.cb @@ -5,6 +5,7 @@ register "gfx" = "GMA_STATIC_DISPLAYS(0)" device cpu_cluster 0 on + ops i945_cpu_bus_ops chip cpu/intel/socket_m device lapic 0 on end end @@ -13,6 +14,7 @@ register "pci_mmio_size" = "768" device domain 0 on + ops i945_pci_domain_ops subsystemid 0x4352 0x6886 inherit device pci 00.0 on end # host bridge # auto detection: diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index 3c5603c..45129f7 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -122,7 +122,7 @@ pci_write_config8(dev, SMRAM, smram); } -static struct device_operations pci_domain_ops = { +static struct device_operations i945_pci_domain_ops = { .read_resources = mch_domain_read_resources, .set_resources = mch_domain_set_resources, .scan_bus = pci_domain_scan_bus, @@ -155,22 +155,12 @@ .devices = pci_device_ids, }; -static struct device_operations cpu_bus_ops = { +static struct device_operations i945_cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, .init = mp_cpu_bus_init, }; -static void enable_dev(struct device *dev) -{ - /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_DOMAIN) - dev->ops = &pci_domain_ops; - else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) - dev->ops = &cpu_bus_ops; -} - struct chip_operations northbridge_intel_i945_ops = { CHIP_NAME("Intel i945 Northbridge") - .enable_dev = enable_dev, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/69294 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f30f5275d38c3eecf54d008b3edbf68071ab10d Gerrit-Change-Number: 69294 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: nb/intel/gm45: Hook up PCI domain and CPU bus ops to devicetree
by Arthur Heymans (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Stefan Ott, Alexander Couzens. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69293 ) Change subject: nb/intel/gm45: Hook up PCI domain and CPU bus ops to devicetree ...................................................................... nb/intel/gm45: Hook up PCI domain and CPU bus ops to devicetree Change-Id: I4a49f37e6fe0cb04c8112baf36fd8d01ab218045 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/lenovo/t400/devicetree.cb M src/mainboard/lenovo/x200/devicetree.cb M src/mainboard/roda/rk9/devicetree.cb M src/northbridge/intel/gm45/northbridge.c 4 files changed, 18 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/69293/1 diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb index 670b488..b50e28d 100644 --- a/src/mainboard/lenovo/t400/devicetree.cb +++ b/src/mainboard/lenovo/t400/devicetree.cb @@ -9,6 +9,7 @@ register "gpu_panel_power_cycle_delay" = "3" # T4: 200ms device cpu_cluster 0 on + ops gm45_cpu_bus_ops chip cpu/intel/socket_p device lapic 0 on end end @@ -28,6 +29,7 @@ register "pci_mmio_size" = "2048" device domain 0 on + ops gm45_pci_domain_ops device pci 00.0 on subsystemid 0x17aa 0x20e0 end # host bridge diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb index dd631a7..f335624 100644 --- a/src/mainboard/lenovo/x200/devicetree.cb +++ b/src/mainboard/lenovo/x200/devicetree.cb @@ -9,6 +9,7 @@ register "gpu_panel_power_cycle_delay" = "3" # T4: 200ms device cpu_cluster 0 on + ops gm45_cpu_bus_ops chip cpu/intel/socket_BGA956 device lapic 0 on end end @@ -28,6 +29,7 @@ register "pci_mmio_size" = "2048" device domain 0 on + ops gm45_pci_domain_ops device pci 00.0 on subsystemid 0x17aa 0x20e0 end # host bridge diff --git a/src/mainboard/roda/rk9/devicetree.cb b/src/mainboard/roda/rk9/devicetree.cb index cc5d763..7e53df8 100644 --- a/src/mainboard/roda/rk9/devicetree.cb +++ b/src/mainboard/roda/rk9/devicetree.cb @@ -2,6 +2,7 @@ # IGD Displays register "gfx" = "GMA_STATIC_DISPLAYS(0)" device cpu_cluster 0 on + ops gm45_cpu_bus_ops chip cpu/intel/socket_BGA956 device lapic 0 on end end @@ -21,6 +22,7 @@ register "pci_mmio_size" = "2048" device domain 0 on + ops gm45_pci_domain_ops subsystemid 0x4352 0x8986 device pci 00.0 on end # host bridge device pci 02.0 on # VGA diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index df5526c..846ca95 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -200,7 +200,7 @@ set_above_4g_pci(dev); } -static struct device_operations pci_domain_ops = { +static struct device_operations gm45_pci_domain_ops = { .read_resources = mch_domain_read_resources, .set_resources = mch_domain_set_resources, .init = mch_domain_init, @@ -210,22 +210,12 @@ .acpi_name = northbridge_acpi_name, }; -static struct device_operations cpu_bus_ops = { +static struct device_operations gm45_cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, .init = mp_cpu_bus_init, }; -static void enable_dev(struct device *dev) -{ - /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_DOMAIN) { - dev->ops = &pci_domain_ops; - } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { - dev->ops = &cpu_bus_ops; - } -} - static void gm45_init(void *const chip_info) { int dev, fn, bit_base; @@ -265,6 +255,5 @@ struct chip_operations northbridge_intel_gm45_ops = { CHIP_NAME("Intel GM45 Northbridge") - .enable_dev = enable_dev, .init = gm45_init, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/69293 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4a49f37e6fe0cb04c8112baf36fd8d01ab218045 Gerrit-Change-Number: 69293 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-MessageType: newchange

1 0

[L] Change in coreboot[master]: cpu/intel/sandybridge: Use enum for ACPI C states
by Arthur Heymans (Code Review) 07 Nov '22

07 Nov '22

1 0

[M] Change in coreboot[master]: nb/intel/sandybridge: Hook up CPU bus and PCI domain ops to devicetree
by Arthur Heymans (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Angel Pons, Alexander Couzens, Evgeny Zinoviev. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69291 ) Change subject: nb/intel/sandybridge: Hook up CPU bus and PCI domain ops to devicetree ...................................................................... nb/intel/sandybridge: Hook up CPU bus and PCI domain ops to devicetree The following commands were used to do this: $ for tree in $(find -name *.cb -exec grep -l sandybridge {} \;); do \ sed -i 's/cpu_cluster 0 on/cpu_cluster 0 on\n\t\tops \ sandybridge_cpu_bus_ops/' $tree; done $ for tree in $(find -name *.cb -exec grep -l sandybridge {} \;); do \ sed -i 's/domain 0 on/domain 0 on\n\t\tops sandybridge_pci_domain_ops/' \ $tree; done Change-Id: I718d9dbc184c8bca38f452efea3202901018cb04 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/apple/macbookair4_2/devicetree.cb M src/mainboard/asrock/b75pro3-m/devicetree.cb M src/mainboard/asrock/h77pro4-m/devicetree.cb M src/mainboard/asus/h61-series/devicetree.cb M src/mainboard/asus/h61-series/variants/h61m-cs/overridetree.cb M src/mainboard/asus/h61-series/variants/p8h61-m_lx/overridetree.cb M src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/overridetree.cb M src/mainboard/asus/h61-series/variants/p8h61-m_pro/overridetree.cb M src/mainboard/asus/h61-series/variants/p8h61-m_pro_cm6630/overridetree.cb M src/mainboard/asus/maximus_iv_gene-z/devicetree.cb M src/mainboard/asus/p8x7x-series/devicetree.cb M src/mainboard/asus/p8x7x-series/variants/p8c_ws/overridetree.cb M src/mainboard/asus/p8x7x-series/variants/p8h77-v/overridetree.cb M src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb M src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/overridetree.cb M src/mainboard/asus/p8x7x-series/variants/p8z77-v/overridetree.cb M src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/overridetree.cb M src/mainboard/biostar/th61-itx/devicetree.cb M src/mainboard/compulab/intense_pc/devicetree.cb M src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb M src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb M src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb M src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb M src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb M src/mainboard/gigabyte/ga-h61m-series/devicetree.cb M src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-ds2/overridetree.cb M src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-ds2v/overridetree.cb M src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-s2pv/overridetree.cb M src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61ma-d3v/overridetree.cb M src/mainboard/google/butterfly/devicetree.cb M src/mainboard/google/link/devicetree.cb M src/mainboard/google/parrot/devicetree.cb M src/mainboard/google/stout/devicetree.cb M src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb M src/mainboard/hp/snb_ivb_laptops/devicetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb M src/mainboard/hp/z220_series/devicetree.cb M src/mainboard/hp/z220_series/variants/z220_cmt_workstation/overridetree.cb M src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb M src/mainboard/intel/dcp847ske/devicetree.cb M src/mainboard/intel/emeraldlake2/devicetree.cb M src/mainboard/kontron/ktqm77/devicetree.cb M src/mainboard/lenovo/l520/devicetree.cb M src/mainboard/lenovo/s230u/devicetree.cb M src/mainboard/lenovo/t420/devicetree.cb M src/mainboard/lenovo/t420s/devicetree.cb M src/mainboard/lenovo/t430/devicetree.cb M src/mainboard/lenovo/t430s/devicetree.cb M src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb M src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb M src/mainboard/lenovo/t520/devicetree.cb M src/mainboard/lenovo/t520/variants/t520/overridetree.cb M src/mainboard/lenovo/t520/variants/w520/overridetree.cb M src/mainboard/lenovo/t530/devicetree.cb M src/mainboard/lenovo/t530/variants/t530/overridetree.cb M src/mainboard/lenovo/t530/variants/w530/overridetree.cb M src/mainboard/lenovo/x131e/devicetree.cb M src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb M src/mainboard/lenovo/x220/devicetree.cb M src/mainboard/lenovo/x220/variants/x1/overridetree.cb M src/mainboard/lenovo/x220/variants/x220/overridetree.cb M src/mainboard/lenovo/x230/devicetree.cb M src/mainboard/lenovo/x230/variants/x230/overridetree.cb M src/mainboard/lenovo/x230/variants/x230s/overridetree.cb M src/mainboard/msi/ms7707/devicetree.cb M src/mainboard/roda/rv11/variants/rv11/devicetree.cb M src/mainboard/roda/rv11/variants/rw11/devicetree.cb M src/mainboard/samsung/lumpy/devicetree.cb M src/mainboard/samsung/stumpy/devicetree.cb M src/mainboard/sapphire/pureplatinumh61/devicetree.cb M src/mainboard/supermicro/x9sae/devicetree.cb M src/mainboard/supermicro/x9scl/devicetree.cb M src/northbridge/intel/sandybridge/northbridge.c 81 files changed, 142 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/69291/1 diff --git a/src/mainboard/apple/macbookair4_2/devicetree.cb b/src/mainboard/apple/macbookair4_2/devicetree.cb index 6ea033e..b44c2d4 100644 --- a/src/mainboard/apple/macbookair4_2/devicetree.cb +++ b/src/mainboard/apple/macbookair4_2/devicetree.cb @@ -14,6 +14,7 @@ register "gpu_panel_power_up_delay" = "2000" register "gpu_pch_backlight" = "0x13121312" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -24,6 +25,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH register "docking_supported" = "0" register "gen1_dec" = "0x000c0681" diff --git a/src/mainboard/asrock/b75pro3-m/devicetree.cb b/src/mainboard/asrock/b75pro3-m/devicetree.cb index 0f7d0a8..cd91fa2 100644 --- a/src/mainboard/asrock/b75pro3-m/devicetree.cb +++ b/src/mainboard/asrock/b75pro3-m/devicetree.cb @@ -14,6 +14,7 @@ register "gpu_panel_power_up_delay" = "0" register "gpu_pch_backlight" = "0x00000000" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -23,6 +24,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops device pci 00.0 on subsystemid 0x1849 0x0150 end diff --git a/src/mainboard/asrock/h77pro4-m/devicetree.cb b/src/mainboard/asrock/h77pro4-m/devicetree.cb index 86468c1..00ffeac 100644 --- a/src/mainboard/asrock/h77pro4-m/devicetree.cb +++ b/src/mainboard/asrock/h77pro4-m/devicetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -11,6 +12,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x1849 0x0100 end diff --git a/src/mainboard/asus/h61-series/devicetree.cb b/src/mainboard/asus/h61-series/devicetree.cb index 32f0cd4..e1a8f02 100644 --- a/src/mainboard/asus/h61-series/devicetree.cb +++ b/src/mainboard/asus/h61-series/devicetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -11,6 +12,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops device pci 00.0 on end # Host bridge device pci 01.0 on end # PEG device pci 02.0 on end # iGPU diff --git a/src/mainboard/asus/h61-series/variants/h61m-cs/overridetree.cb b/src/mainboard/asus/h61-series/variants/h61m-cs/overridetree.cb index 89ef419..7649169 100644 --- a/src/mainboard/asus/h61-series/variants/h61m-cs/overridetree.cb +++ b/src/mainboard/asus/h61-series/variants/h61m-cs/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1043 0x844d inherit chip southbridge/intel/bd82x6x register "gen1_dec" = "0x000c0291" diff --git a/src/mainboard/asus/h61-series/variants/p8h61-m_lx/overridetree.cb b/src/mainboard/asus/h61-series/variants/p8h61-m_lx/overridetree.cb index aa9f8c8..b508ca9 100644 --- a/src/mainboard/asus/h61-series/variants/p8h61-m_lx/overridetree.cb +++ b/src/mainboard/asus/h61-series/variants/p8h61-m_lx/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1043 0x844d inherit chip southbridge/intel/bd82x6x register "gen1_dec" = "0x00000295" # Super I/O HWM diff --git a/src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/overridetree.cb b/src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/overridetree.cb index 5d9635c..36ef8cd 100644 --- a/src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/overridetree.cb +++ b/src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1043 0x844d inherit chip southbridge/intel/bd82x6x register "gen1_dec" = "0x000c0291" diff --git a/src/mainboard/asus/h61-series/variants/p8h61-m_pro/overridetree.cb b/src/mainboard/asus/h61-series/variants/p8h61-m_pro/overridetree.cb index d726131..deeb6a8 100644 --- a/src/mainboard/asus/h61-series/variants/p8h61-m_pro/overridetree.cb +++ b/src/mainboard/asus/h61-series/variants/p8h61-m_pro/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x register "gen1_dec" = "0x000c0291" # HWM diff --git a/src/mainboard/asus/h61-series/variants/p8h61-m_pro_cm6630/overridetree.cb b/src/mainboard/asus/h61-series/variants/p8h61-m_pro_cm6630/overridetree.cb index 7882bf0..d1df0eb 100644 --- a/src/mainboard/asus/h61-series/variants/p8h61-m_pro_cm6630/overridetree.cb +++ b/src/mainboard/asus/h61-series/variants/p8h61-m_pro_cm6630/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x register "gen1_dec" = "0x000c0291" # HWM diff --git a/src/mainboard/asus/maximus_iv_gene-z/devicetree.cb b/src/mainboard/asus/maximus_iv_gene-z/devicetree.cb index ca09d2f..32b1727 100644 --- a/src/mainboard/asus/maximus_iv_gene-z/devicetree.cb +++ b/src/mainboard/asus/maximus_iv_gene-z/devicetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -12,6 +13,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1043 0x844d inherit device pci 00.0 on end # Host bridge diff --git a/src/mainboard/asus/p8x7x-series/devicetree.cb b/src/mainboard/asus/p8x7x-series/devicetree.cb index 9710118..2511e65 100644 --- a/src/mainboard/asus/p8x7x-series/devicetree.cb +++ b/src/mainboard/asus/p8x7x-series/devicetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -11,6 +12,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops device pci 00.0 on end # Host bridge device pci 01.0 on end # PCIEX16_1 device pci 02.0 on end # iGPU diff --git a/src/mainboard/asus/p8x7x-series/variants/p8c_ws/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8c_ws/overridetree.cb index 4de539b..2c3eec5 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8c_ws/overridetree.cb +++ b/src/mainboard/asus/p8x7x-series/variants/p8c_ws/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops device pci 01.1 on end # PCIEX16_2 (electrical x8) device pci 06.0 on end # PCIEX16_3 (electrical x4) subsystemid 0x1043 0x84ca inherit diff --git a/src/mainboard/asus/p8x7x-series/variants/p8h77-v/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8h77-v/overridetree.cb index f20b49c..0b6ebca 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8h77-v/overridetree.cb +++ b/src/mainboard/asus/p8x7x-series/variants/p8h77-v/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1043 0x84ca inherit chip southbridge/intel/bd82x6x register "gen1_dec" = "0x000c0291" diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb index 9659ed1..08793aa 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb +++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1043 0x84ca inherit chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH register "gen1_dec" = "0x000c0291" diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/overridetree.cb index 0162547..bcaca92 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/overridetree.cb +++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1043 0x84ca inherit chip southbridge/intel/bd82x6x register "gen1_dec" = "0x000c0291" diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-v/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8z77-v/overridetree.cb index 77484c7..8334be0 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8z77-v/overridetree.cb +++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-v/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1043 0x84ca inherit device pci 01.1 on end # PCIEX_16_2 chip southbridge/intel/bd82x6x diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/overridetree.cb index 6be23fa..316c15a 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/overridetree.cb +++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1043 0x84ca inherit chip southbridge/intel/bd82x6x register "gen1_dec" = "0x000c0291" diff --git a/src/mainboard/biostar/th61-itx/devicetree.cb b/src/mainboard/biostar/th61-itx/devicetree.cb index 35c3ae34..c37b665 100644 --- a/src/mainboard/biostar/th61-itx/devicetree.cb +++ b/src/mainboard/biostar/th61-itx/devicetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -11,6 +12,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1565 0x3108 inherit device pci 00.0 on end # Host bridge diff --git a/src/mainboard/compulab/intense_pc/devicetree.cb b/src/mainboard/compulab/intense_pc/devicetree.cb index 6979615..1155ee9 100644 --- a/src/mainboard/compulab/intense_pc/devicetree.cb +++ b/src/mainboard/compulab/intense_pc/devicetree.cb @@ -7,6 +7,7 @@ register "gpu_dp_d_hotplug" = "4" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # FIXME: check all registers register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -16,6 +17,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x8086 0x2010 end diff --git a/src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb b/src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb index e614f1e..47c6f51 100644 --- a/src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb +++ b/src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/sandybridge device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -10,6 +11,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops device pci 00.0 on end # Host bridge Host bridge device pci 01.0 on # PEG1 (blue slot1) diff --git a/src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb b/src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb index bfe453f..68b5c00 100644 --- a/src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb +++ b/src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1028 0x052c inherit chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH register "sata_port_map" = "0x7" diff --git a/src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb b/src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb index 81133ee..db4a98a 100644 --- a/src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb +++ b/src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1028 0x053a inherit chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb index 7ca9a8b..54b4625 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb +++ b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb @@ -1,6 +1,7 @@ chip northbridge/intel/sandybridge device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -12,6 +13,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1458 0x5000 inherit device pci 00.0 on # Host bridge subsystemid 0x1458 0x5000 diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb index b496fe1..ea8da51 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb +++ b/src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH device pci 16.0 off end # Management Engine Interface 1 register "xhci_overcurrent_mapping" = "0x00000c03" diff --git a/src/mainboard/gigabyte/ga-h61m-series/devicetree.cb b/src/mainboard/gigabyte/ga-h61m-series/devicetree.cb index 3f07202..762bfb1 100644 --- a/src/mainboard/gigabyte/ga-h61m-series/devicetree.cb +++ b/src/mainboard/gigabyte/ga-h61m-series/devicetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -11,6 +12,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1458 0x5000 inherit device pci 00.0 on end # Host bridge diff --git a/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-ds2/overridetree.cb b/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-ds2/overridetree.cb index 3de7954..d9eada0 100644 --- a/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-ds2/overridetree.cb +++ b/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-ds2/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH diff --git a/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-ds2v/overridetree.cb b/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-ds2v/overridetree.cb index b6bdaa4..3db3a48 100644 --- a/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-ds2v/overridetree.cb +++ b/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-ds2v/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH diff --git a/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-s2pv/overridetree.cb b/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-s2pv/overridetree.cb index c0908c1..02fe8f1 100644 --- a/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-s2pv/overridetree.cb +++ b/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-s2pv/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH diff --git a/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61ma-d3v/overridetree.cb b/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61ma-d3v/overridetree.cb index dd2d900..4aa5c2a 100644 --- a/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61ma-d3v/overridetree.cb +++ b/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61ma-d3v/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH diff --git a/src/mainboard/google/butterfly/devicetree.cb b/src/mainboard/google/butterfly/devicetree.cb index c79526e..dcfaebd 100644 --- a/src/mainboard/google/butterfly/devicetree.cb +++ b/src/mainboard/google/butterfly/devicetree.cb @@ -21,6 +21,7 @@ register "max_mem_clock_mhz" = "666" # DDR3-1333 device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -33,6 +34,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops device pci 00.0 on end # host bridge device pci 01.0 off end # PCIe Bridge for discrete graphics device pci 02.0 on end # vga controller diff --git a/src/mainboard/google/link/devicetree.cb b/src/mainboard/google/link/devicetree.cb index 49c3476..8ff8429 100644 --- a/src/mainboard/google/link/devicetree.cb +++ b/src/mainboard/google/link/devicetree.cb @@ -20,6 +20,7 @@ register "max_mem_clock_mhz" = "666" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -32,6 +33,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1ae0 0xc000 inherit device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller diff --git a/src/mainboard/google/parrot/devicetree.cb b/src/mainboard/google/parrot/devicetree.cb index 6850cf2..0e09348 100644 --- a/src/mainboard/google/parrot/devicetree.cb +++ b/src/mainboard/google/parrot/devicetree.cb @@ -20,6 +20,7 @@ register "max_mem_clock_mhz" = "666" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -32,6 +33,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb index b38adaf..7669e4b 100644 --- a/src/mainboard/google/stout/devicetree.cb +++ b/src/mainboard/google/stout/devicetree.cb @@ -20,6 +20,7 @@ register "max_mem_clock_mhz" = "666" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -34,6 +35,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1ae0 0xc000 inherit device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller diff --git a/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb b/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb index 98e48ef..071c541 100644 --- a/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb +++ b/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb @@ -7,6 +7,7 @@ register "gpu_dp_d_hotplug" = "0" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -17,6 +18,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x103c 0x1495 inherit device pci 00.0 on end # Host bridge Host bridge diff --git a/src/mainboard/hp/snb_ivb_laptops/devicetree.cb b/src/mainboard/hp/snb_ivb_laptops/devicetree.cb index 2bfbacd..2b4e372 100644 --- a/src/mainboard/hp/snb_ivb_laptops/devicetree.cb +++ b/src/mainboard/hp/snb_ivb_laptops/devicetree.cb @@ -16,6 +16,7 @@ register "gpu_panel_power_up_delay" = "300" register "gpu_pch_backlight" = "0x02880288" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -25,6 +26,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops device pci 00.0 on end # Host bridge diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb index d69a21e..3121e84 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb +++ b/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb @@ -5,6 +5,7 @@ register "gpu_pch_backlight" = "0x02880288" device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x103c 0x162b inherit device pci 01.0 off end # PEG diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb index d89492f..2376340 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb +++ b/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb @@ -5,6 +5,7 @@ register "gpu_panel_power_backlight_off_delay" = "2300" register "gpu_pch_backlight" = "0x0d9c0d9c" device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x103c 0x17df inherit device pci 01.0 off end # PCIe Bridge for discrete graphics diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb index d911112..055c2c5 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb +++ b/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb @@ -5,6 +5,7 @@ register "gpu_panel_power_backlight_off_delay" = "2000" register "gpu_pch_backlight" = "0x02880288" device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x103c 0x162a inherit device pci 01.0 off end # PCIe Bridge for discrete graphics diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb index 02dc6a4..b0464b6 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb +++ b/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb @@ -5,6 +5,7 @@ register "gpu_panel_power_backlight_off_delay" = "2000" register "gpu_pch_backlight" = "0x02880288" device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x103c 0x161c inherit device pci 01.0 on end # PCIe Bridge for discrete graphics diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb index 729db13..a0e0244 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb +++ b/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb @@ -5,6 +5,7 @@ register "gpu_panel_power_backlight_off_delay" = "2000" register "gpu_pch_backlight" = "0x0d9c0d9c" device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x103c 0x179b inherit device pci 01.0 on end # PCIe Bridge for discrete graphics diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb index 7244acd..27618e0 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb +++ b/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x103c 0x176c inherit device pci 01.0 on # PCIe Bridge for discrete graphics diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb index 1eb9c4c..c8f9e15 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb +++ b/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb @@ -5,6 +5,7 @@ register "gpu_panel_power_backlight_off_delay" = "2000" register "gpu_pch_backlight" = "0x0d9c0d9c" device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x103c 0x18df inherit device pci 01.0 off end # PCIe Bridge for discrete graphics diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb index 3289588..5004768 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb +++ b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb @@ -4,6 +4,7 @@ register "gpu_cpu_backlight" = "0x0000014a" device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x103c 0x1621 inherit device pci 01.0 off end # PEG diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb index 68b6daa..2fb7077 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb +++ b/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb @@ -5,6 +5,7 @@ register "gpu_panel_power_backlight_off_delay" = "2000" register "gpu_pch_backlight" = "0x02880288" device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x103c 0x18f8 inherit device pci 01.0 off end # PCIe Bridge for discrete graphics diff --git a/src/mainboard/hp/z220_series/devicetree.cb b/src/mainboard/hp/z220_series/devicetree.cb index bcacf71..ccc39ab 100644 --- a/src/mainboard/hp/z220_series/devicetree.cb +++ b/src/mainboard/hp/z220_series/devicetree.cb @@ -7,6 +7,7 @@ register "gpu_dp_d_hotplug" = "0" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -17,6 +18,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x103c 0x1791 inherit device pci 00.0 on end # Host bridge Host bridge diff --git a/src/mainboard/hp/z220_series/variants/z220_cmt_workstation/overridetree.cb b/src/mainboard/hp/z220_series/variants/z220_cmt_workstation/overridetree.cb index 55bdaac..3194b85 100644 --- a/src/mainboard/hp/z220_series/variants/z220_cmt_workstation/overridetree.cb +++ b/src/mainboard/hp/z220_series/variants/z220_cmt_workstation/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x103c 0x1791 inherit device pci 06.0 on end # Extra x4 port on north bridge chip southbridge/intel/bd82x6x diff --git a/src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb b/src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb index c31bf33..da3f839 100644 --- a/src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb +++ b/src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x103c 0x1791 inherit chip southbridge/intel/bd82x6x diff --git a/src/mainboard/intel/dcp847ske/devicetree.cb b/src/mainboard/intel/dcp847ske/devicetree.cb index f7821d0..4daf8e2 100644 --- a/src/mainboard/intel/dcp847ske/devicetree.cb +++ b/src/mainboard/intel/dcp847ske/devicetree.cb @@ -12,6 +12,7 @@ register "gpu_dp_b_hotplug" = "0x06" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -23,6 +24,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops device pci 00.0 on end # Host bridge device pci 01.0 off end # PCIe Bridge for discrete graphics device pci 02.0 on end # Internal graphics VGA controller diff --git a/src/mainboard/intel/emeraldlake2/devicetree.cb b/src/mainboard/intel/emeraldlake2/devicetree.cb index 170dbaa..fb91629 100644 --- a/src/mainboard/intel/emeraldlake2/devicetree.cb +++ b/src/mainboard/intel/emeraldlake2/devicetree.cb @@ -12,6 +12,7 @@ register "gpu_dp_b_hotplug" = "0x06" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -24,6 +25,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller diff --git a/src/mainboard/kontron/ktqm77/devicetree.cb b/src/mainboard/kontron/ktqm77/devicetree.cb index 31bee5d..fe6ed3b 100644 --- a/src/mainboard/kontron/ktqm77/devicetree.cb +++ b/src/mainboard/kontron/ktqm77/devicetree.cb @@ -3,6 +3,7 @@ register "gfx" = "GMA_STATIC_DISPLAYS(0)" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -15,6 +16,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops device pci 00.0 on end # host bridge device pci 01.0 on end # PCIe Bridge x16 device pci 02.0 on end # vga controller diff --git a/src/mainboard/lenovo/l520/devicetree.cb b/src/mainboard/lenovo/l520/devicetree.cb index 6c2dabe..bfaca73 100644 --- a/src/mainboard/lenovo/l520/devicetree.cb +++ b/src/mainboard/lenovo/l520/devicetree.cb @@ -13,6 +13,7 @@ register "gpu_pch_backlight" = "0x00000000" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -23,6 +24,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x21dd inherit device pci 00.0 on end # Host bridge diff --git a/src/mainboard/lenovo/s230u/devicetree.cb b/src/mainboard/lenovo/s230u/devicetree.cb index f7d65ca..afa8d27 100644 --- a/src/mainboard/lenovo/s230u/devicetree.cb +++ b/src/mainboard/lenovo/s230u/devicetree.cb @@ -12,6 +12,7 @@ register "gpu_panel_power_up_delay" = "600" register "gpu_pch_backlight" = "0x041e041e" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -21,6 +22,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x2205 inherit device pci 00.0 on end # Host bridge Host bridge diff --git a/src/mainboard/lenovo/t420/devicetree.cb b/src/mainboard/lenovo/t420/devicetree.cb index c934f5f..fdba94a 100644 --- a/src/mainboard/lenovo/t420/devicetree.cb +++ b/src/mainboard/lenovo/t420/devicetree.cb @@ -16,6 +16,7 @@ register "gpu_pch_backlight" = "0x06100610" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -28,6 +29,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x21ce inherit device pci 00.0 on end # host bridge diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb index 1d6adaf..400a072 100644 --- a/src/mainboard/lenovo/t420s/devicetree.cb +++ b/src/mainboard/lenovo/t420s/devicetree.cb @@ -16,6 +16,7 @@ register "gpu_pch_backlight" = "0x06100610" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -28,6 +29,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x21d2 inherit device pci 00.0 on end # host bridge diff --git a/src/mainboard/lenovo/t430/devicetree.cb b/src/mainboard/lenovo/t430/devicetree.cb index 141faa9..38bffcf 100644 --- a/src/mainboard/lenovo/t430/devicetree.cb +++ b/src/mainboard/lenovo/t430/devicetree.cb @@ -15,6 +15,7 @@ register "gpu_pch_backlight" = "0x11551155" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # FIXME: check all registers register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -25,6 +26,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x21f3 inherit chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb index 739d01d..a8d849f 100644 --- a/src/mainboard/lenovo/t430s/devicetree.cb +++ b/src/mainboard/lenovo/t430s/devicetree.cb @@ -15,6 +15,7 @@ register "gpu_pch_backlight" = "0x11551155" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -27,6 +28,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x21fb inherit device pci 00.0 on end # host bridge diff --git a/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb b/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb index 4250665..7e47e06 100644 --- a/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb +++ b/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH # Enable hotplug on Port 5 for Thunderbolt controller register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 1, 0, 0, 0 }" diff --git a/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb b/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb index fcd137f..e808891 100644 --- a/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb +++ b/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb @@ -13,6 +13,7 @@ register "gpu_cpu_backlight" = "0x03d2" device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x2208 inherit device pci 01.0 off end # PCIe Bridge for discrete graphics diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb index 9c75231..bc9bc53 100644 --- a/src/mainboard/lenovo/t520/devicetree.cb +++ b/src/mainboard/lenovo/t520/devicetree.cb @@ -16,6 +16,7 @@ register "gpu_pch_backlight" = "0x06100610" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -28,6 +29,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x21cf inherit device pci 00.0 on end # host bridge diff --git a/src/mainboard/lenovo/t520/variants/t520/overridetree.cb b/src/mainboard/lenovo/t520/variants/t520/overridetree.cb index cba2b7d..33ad442b 100644 --- a/src/mainboard/lenovo/t520/variants/t520/overridetree.cb +++ b/src/mainboard/lenovo/t520/variants/t520/overridetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH device pci 1e.0 off end # PCI-2-PCI bridge device pci 1f.0 on # LPC bridge diff --git a/src/mainboard/lenovo/t520/variants/w520/overridetree.cb b/src/mainboard/lenovo/t520/variants/w520/overridetree.cb index 3e1c90ee..574959e 100644 --- a/src/mainboard/lenovo/t520/variants/w520/overridetree.cb +++ b/src/mainboard/lenovo/t520/variants/w520/overridetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH device pci 1c.6 on end # PCIe Port #7 USB 3.0 end diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb index 5cfa207..cba284a 100644 --- a/src/mainboard/lenovo/t530/devicetree.cb +++ b/src/mainboard/lenovo/t530/devicetree.cb @@ -16,6 +16,7 @@ register "gpu_pch_backlight" = "0x11551155" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -28,6 +29,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x21f6 inherit device pci 00.0 on end # Host bridge diff --git a/src/mainboard/lenovo/t530/variants/t530/overridetree.cb b/src/mainboard/lenovo/t530/variants/t530/overridetree.cb index 78f7b9b..dc08f9d 100644 --- a/src/mainboard/lenovo/t530/variants/t530/overridetree.cb +++ b/src/mainboard/lenovo/t530/variants/t530/overridetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH device pci 1f.0 on # PCI-LPC bridge chip ec/lenovo/h8 diff --git a/src/mainboard/lenovo/t530/variants/w530/overridetree.cb b/src/mainboard/lenovo/t530/variants/w530/overridetree.cb index 115bc1f..b9704672 100644 --- a/src/mainboard/lenovo/t530/variants/w530/overridetree.cb +++ b/src/mainboard/lenovo/t530/variants/w530/overridetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops device pci 02.0 on # Internal graphics VGA controller subsystemid 0x17aa 0x21f5 end diff --git a/src/mainboard/lenovo/x131e/devicetree.cb b/src/mainboard/lenovo/x131e/devicetree.cb index f28212e..21e7652 100644 --- a/src/mainboard/lenovo/x131e/devicetree.cb +++ b/src/mainboard/lenovo/x131e/devicetree.cb @@ -15,6 +15,7 @@ register "gpu_pch_backlight" = "0x11551155" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -27,6 +28,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x21fe inherit device pci 00.0 on end # Host bridge diff --git a/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb b/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb index cbf1141..eb6544f 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb +++ b/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb @@ -13,6 +13,7 @@ register "gpu_pch_backlight" = "0x11551155" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -25,6 +26,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x21f9 inherit device pci 00.0 on end # host bridge diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb index 923c88b..56c5d22 100644 --- a/src/mainboard/lenovo/x220/devicetree.cb +++ b/src/mainboard/lenovo/x220/devicetree.cb @@ -16,6 +16,7 @@ register "gpu_pch_backlight" = "0x06100610" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -28,6 +29,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x21db inherit device pci 00.0 on end # host bridge diff --git a/src/mainboard/lenovo/x220/variants/x1/overridetree.cb b/src/mainboard/lenovo/x220/variants/x1/overridetree.cb index d236139..f6ee357 100644 --- a/src/mainboard/lenovo/x220/variants/x1/overridetree.cb +++ b/src/mainboard/lenovo/x220/variants/x1/overridetree.cb @@ -13,6 +13,7 @@ register "gpu_pch_backlight" = "0x13121312" device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x21e8 inherit chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH diff --git a/src/mainboard/lenovo/x220/variants/x220/overridetree.cb b/src/mainboard/lenovo/x220/variants/x220/overridetree.cb index 8e939fd..597e16e 100644 --- a/src/mainboard/lenovo/x220/variants/x220/overridetree.cb +++ b/src/mainboard/lenovo/x220/variants/x220/overridetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH device pci 1f.0 on #LPC bridge chip ec/lenovo/h8 diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb index 30a7916..e71a2d4 100644 --- a/src/mainboard/lenovo/x230/devicetree.cb +++ b/src/mainboard/lenovo/x230/devicetree.cb @@ -16,6 +16,7 @@ register "gpu_pch_backlight" = "0x11551155" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -28,6 +29,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x21fa inherit device pci 00.0 on end # host bridge diff --git a/src/mainboard/lenovo/x230/variants/x230/overridetree.cb b/src/mainboard/lenovo/x230/variants/x230/overridetree.cb index 978d017..88507c4 100644 --- a/src/mainboard/lenovo/x230/variants/x230/overridetree.cb +++ b/src/mainboard/lenovo/x230/variants/x230/overridetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/sandybridge device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH register "docking_supported" = "1" register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }" diff --git a/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb b/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb index 1c0efd3..1990fe4 100644 --- a/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb +++ b/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb @@ -12,6 +12,7 @@ register "gpu_panel_power_up_delay" = "2000" # 200ms device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x17aa 0x2209 inherit chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH # X230s does not support docking diff --git a/src/mainboard/msi/ms7707/devicetree.cb b/src/mainboard/msi/ms7707/devicetree.cb index 8e5df58..5147562 100644 --- a/src/mainboard/msi/ms7707/devicetree.cb +++ b/src/mainboard/msi/ms7707/devicetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/sandybridge device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -9,6 +10,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1462 0x7707 inherit device pci 00.0 on end # Host bridge diff --git a/src/mainboard/roda/rv11/variants/rv11/devicetree.cb b/src/mainboard/roda/rv11/variants/rv11/devicetree.cb index 6cb77e3..f3490a0 100644 --- a/src/mainboard/roda/rv11/variants/rv11/devicetree.cb +++ b/src/mainboard/roda/rv11/variants/rv11/devicetree.cb @@ -18,6 +18,7 @@ register "gpu_pch_backlight" = "0x002e0000" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -30,6 +31,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller diff --git a/src/mainboard/roda/rv11/variants/rw11/devicetree.cb b/src/mainboard/roda/rv11/variants/rw11/devicetree.cb index 2291f61..b0a7f1a 100644 --- a/src/mainboard/roda/rv11/variants/rw11/devicetree.cb +++ b/src/mainboard/roda/rv11/variants/rw11/devicetree.cb @@ -18,6 +18,7 @@ register "gpu_pch_backlight" = "0x13120000" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -30,6 +31,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb index 1aab76d..18352e2 100644 --- a/src/mainboard/samsung/lumpy/devicetree.cb +++ b/src/mainboard/samsung/lumpy/devicetree.cb @@ -20,6 +20,7 @@ register "max_mem_clock_mhz" = "666" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -32,6 +33,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops ioapic_irq 4 INTA 0x10 ioapic_irq 4 INTB 0x11 ioapic_irq 4 INTC 0x12 diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb index 90ed429..6beebbc 100644 --- a/src/mainboard/samsung/stumpy/devicetree.cb +++ b/src/mainboard/samsung/stumpy/devicetree.cb @@ -12,6 +12,7 @@ register "max_mem_clock_mhz" = "666" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # Magic APIC ID to locate this chip device lapic 0 on end @@ -24,6 +25,7 @@ end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x1ae0 0xc000 inherit device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller diff --git a/src/mainboard/sapphire/pureplatinumh61/devicetree.cb b/src/mainboard/sapphire/pureplatinumh61/devicetree.cb index d5f6fda..97d97df 100644 --- a/src/mainboard/sapphire/pureplatinumh61/devicetree.cb +++ b/src/mainboard/sapphire/pureplatinumh61/devicetree.cb @@ -2,6 +2,7 @@ chip northbridge/intel/sandybridge device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -11,6 +12,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH register "gen1_dec" = "0x000c0291" register "gen2_dec" = "0x000c0a01" diff --git a/src/mainboard/supermicro/x9sae/devicetree.cb b/src/mainboard/supermicro/x9sae/devicetree.cb index 05a187e..2ea79c8 100644 --- a/src/mainboard/supermicro/x9sae/devicetree.cb +++ b/src/mainboard/supermicro/x9sae/devicetree.cb @@ -7,6 +7,7 @@ register "gpu_dp_d_hotplug" = "4" register "gpu_panel_power_cycle_delay" = "4" device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -16,6 +17,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x15d9 0x0644 inherit device pci 00.0 on end # Host bridge diff --git a/src/mainboard/supermicro/x9scl/devicetree.cb b/src/mainboard/supermicro/x9scl/devicetree.cb index 284d8f3..e143981 100644 --- a/src/mainboard/supermicro/x9scl/devicetree.cb +++ b/src/mainboard/supermicro/x9scl/devicetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/sandybridge device cpu_cluster 0 on + ops sandybridge_cpu_bus_ops chip cpu/intel/model_206ax # FIXME: check all registers register "acpi_c1" = "1" register "acpi_c2" = "3" @@ -9,6 +10,7 @@ end end device domain 0 on + ops sandybridge_pci_domain_ops subsystemid 0x15d9 0x0624 inherit device pci 00.0 on end # Host bridge device pci 01.0 on end # PEG diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 521044b..ad85d68 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -52,7 +52,7 @@ return NULL; } -static struct device_operations pci_domain_ops = { +struct device_operations sandybridge_pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, .scan_bus = pci_domain_scan_bus, @@ -412,23 +412,12 @@ .devices = pci_device_ids, }; -static struct device_operations cpu_bus_ops = { +struct device_operations sandybridge_cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, .init = mp_cpu_bus_init, }; -static void enable_dev(struct device *dev) -{ - /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_DOMAIN) { - dev->ops = &pci_domain_ops; - } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { - dev->ops = &cpu_bus_ops; - } -} - struct chip_operations northbridge_intel_sandybridge_ops = { CHIP_NAME("Intel SandyBridge/IvyBridge integrated Northbridge") - .enable_dev = enable_dev, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/69291 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I718d9dbc184c8bca38f452efea3202901018cb04 Gerrit-Change-Number: 69291 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: nb/intel/ironlake: Hook up PCI domain and CPU ops to devicetree
by Arthur Heymans (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Stefan Ott, Alexander Couzens. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69290 ) Change subject: nb/intel/ironlake: Hook up PCI domain and CPU ops to devicetree ...................................................................... nb/intel/ironlake: Hook up PCI domain and CPU ops to devicetree Change-Id: I9dd254eddc12966154776d8a2d43f002567e758f Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/lenovo/t410/devicetree.cb M src/mainboard/lenovo/x201/devicetree.cb M src/mainboard/packardbell/ms2290/devicetree.cb M src/northbridge/intel/ironlake/northbridge.c 4 files changed, 18 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/69290/1 diff --git a/src/mainboard/lenovo/t410/devicetree.cb b/src/mainboard/lenovo/t410/devicetree.cb index 63f4af2..2fa4294 100644 --- a/src/mainboard/lenovo/t410/devicetree.cb +++ b/src/mainboard/lenovo/t410/devicetree.cb @@ -18,12 +18,14 @@ register "gpu_pch_backlight" = "0x061a061a" device cpu_cluster 0 on + ops ironlake_cpu_bus_init chip cpu/intel/model_2065x device lapic 0 on end end end device domain 0 on + ops ironlake_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2193 end diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb index effe4ef..17f8af7 100644 --- a/src/mainboard/lenovo/x201/devicetree.cb +++ b/src/mainboard/lenovo/x201/devicetree.cb @@ -19,12 +19,14 @@ register "gpu_pch_backlight" = "0x061a061a" device cpu_cluster 0 on + ops ironlake_cpu_bus_init chip cpu/intel/model_2065x device lapic 0 on end end end device domain 0 on + ops ironlake_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2193 end diff --git a/src/mainboard/packardbell/ms2290/devicetree.cb b/src/mainboard/packardbell/ms2290/devicetree.cb index 57d2dd7..ad52f21 100644 --- a/src/mainboard/packardbell/ms2290/devicetree.cb +++ b/src/mainboard/packardbell/ms2290/devicetree.cb @@ -19,12 +19,14 @@ register "gpu_pch_backlight" = "0x061a061a" device cpu_cluster 0 on + ops ironlake_cpu_bus_init chip cpu/intel/model_2065x device lapic 0 on end end end device domain 0 on + ops ironlake_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x1025 0x0379 end diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c index fbad6d4..4935ea9 100644 --- a/src/northbridge/intel/ironlake/northbridge.c +++ b/src/northbridge/intel/ironlake/northbridge.c @@ -75,7 +75,7 @@ } #endif -static struct device_operations pci_domain_ops = { +struct device_operations ironlake_pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, .scan_bus = pci_domain_scan_bus, @@ -217,24 +217,13 @@ .devices = pci_device_ids, }; -static struct device_operations cpu_bus_ops = { +struct device_operations ironlake_cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, .init = mp_cpu_bus_init, }; -static void enable_dev(struct device *dev) -{ - /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_DOMAIN) { - dev->ops = &pci_domain_ops; - } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { - dev->ops = &cpu_bus_ops; - } -} - struct chip_operations northbridge_intel_ironlake_ops = { CHIP_NAME("Intel Ironlake integrated Northbridge") - .enable_dev = enable_dev, .init = ironlake_init, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/69290 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9dd254eddc12966154776d8a2d43f002567e758f Gerrit-Change-Number: 69290 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: nb/intel/haswell: Hook up PCI domain and CPU cluster ops to devicetree
by Arthur Heymans (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Angel Pons, Alexander Couzens. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69289 ) Change subject: nb/intel/haswell: Hook up PCI domain and CPU cluster ops to devicetree ...................................................................... nb/intel/haswell: Hook up PCI domain and CPU cluster ops to devicetree Change-Id: I955274bc6bda587201f130762c0735c36f5501d1 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/asrock/b85m_pro4/devicetree.cb M src/mainboard/asrock/h81m-hds/devicetree.cb M src/mainboard/google/beltino/devicetree.cb M src/mainboard/google/slippy/devicetree.cb M src/mainboard/hp/folio_9480m/devicetree.cb M src/mainboard/intel/baskingridge/devicetree.cb M src/mainboard/lenovo/haswell/variants/t440p/devicetree.cb M src/mainboard/lenovo/haswell/variants/w541/devicetree.cb M src/mainboard/msi/h81m-p33/devicetree.cb M src/mainboard/supermicro/x10slm-f/devicetree.cb M src/northbridge/intel/haswell/northbridge.c 11 files changed, 32 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/69289/1 diff --git a/src/mainboard/asrock/b85m_pro4/devicetree.cb b/src/mainboard/asrock/b85m_pro4/devicetree.cb index 43a65f8..f24dbf1 100644 --- a/src/mainboard/asrock/b85m_pro4/devicetree.cb +++ b/src/mainboard/asrock/b85m_pro4/devicetree.cb @@ -4,6 +4,7 @@ register "gpu_ddi_e_connected" = "1" device cpu_cluster 0 on + ops haswell_cpy_bus_ops chip cpu/intel/haswell device lapic 0 on end device lapic 0xacac off end @@ -11,6 +12,7 @@ end device domain 0 on + ops haswell_pci_domain_ops subsystemid 0x1849 0x0c00 inherit device pci 00.0 on end # Host bridge diff --git a/src/mainboard/asrock/h81m-hds/devicetree.cb b/src/mainboard/asrock/h81m-hds/devicetree.cb index 7b08af9..ccdcaa4 100644 --- a/src/mainboard/asrock/h81m-hds/devicetree.cb +++ b/src/mainboard/asrock/h81m-hds/devicetree.cb @@ -4,6 +4,7 @@ register "gpu_ddi_e_connected" = "1" device cpu_cluster 0 on + ops haswell_cpy_bus_ops chip cpu/intel/haswell device lapic 0 on end device lapic 0xacac off end @@ -11,6 +12,7 @@ end device domain 0 on + ops haswell_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x1849 0x0c00 end diff --git a/src/mainboard/google/beltino/devicetree.cb b/src/mainboard/google/beltino/devicetree.cb index 8eada25..bb57c44 100644 --- a/src/mainboard/google/beltino/devicetree.cb +++ b/src/mainboard/google/beltino/devicetree.cb @@ -14,6 +14,7 @@ register "usb_xhci_on_resume" = "true" device cpu_cluster 0 on + ops haswell_cpy_bus_ops chip cpu/intel/haswell device lapic 0 on end # Magic APIC ID to locate this chip @@ -22,6 +23,7 @@ end device domain 0 on + ops haswell_pci_domain_ops subsystemid 0x1ae0 0xc000 inherit device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller diff --git a/src/mainboard/google/slippy/devicetree.cb b/src/mainboard/google/slippy/devicetree.cb index d989545..d09d7a1 100644 --- a/src/mainboard/google/slippy/devicetree.cb +++ b/src/mainboard/google/slippy/devicetree.cb @@ -16,6 +16,7 @@ register "usb_xhci_on_resume" = "true" device cpu_cluster 0 on + ops haswell_cpu_bus_ops chip cpu/intel/haswell device lapic 0 on end # Magic APIC ID to locate this chip @@ -24,6 +25,7 @@ end device domain 0 on + ops haswell_pci_domain_ops device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller device pci 03.0 on end # mini-hd audio diff --git a/src/mainboard/hp/folio_9480m/devicetree.cb b/src/mainboard/hp/folio_9480m/devicetree.cb index fca4f16..fad17f0 100644 --- a/src/mainboard/hp/folio_9480m/devicetree.cb +++ b/src/mainboard/hp/folio_9480m/devicetree.cb @@ -14,12 +14,14 @@ }" register "usb_xhci_on_resume" = "true" device cpu_cluster 0 on + ops haswell_cpy_bus_ops chip cpu/intel/haswell device lapic 0 on end device lapic 0xacac off end end end device domain 0 on + ops haswell_pci_domain_ops subsystemid 0x103c 0x22da inherit device pci 00.0 on end # Host bridge device pci 02.0 on end # Internal graphics VGA controller diff --git a/src/mainboard/intel/baskingridge/devicetree.cb b/src/mainboard/intel/baskingridge/devicetree.cb index 37cff88..fb4e466 100644 --- a/src/mainboard/intel/baskingridge/devicetree.cb +++ b/src/mainboard/intel/baskingridge/devicetree.cb @@ -12,6 +12,7 @@ register "gpu_dp_b_hotplug" = "0x06" device cpu_cluster 0 on + ops haswell_cpy_bus_ops chip cpu/intel/haswell device lapic 0 on end # Magic APIC ID to locate this chip @@ -20,6 +21,7 @@ end device domain 0 on + ops haswell_pci_domain_ops device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller diff --git a/src/mainboard/lenovo/haswell/variants/t440p/devicetree.cb b/src/mainboard/lenovo/haswell/variants/t440p/devicetree.cb index c8772cc..9f5c8ac 100644 --- a/src/mainboard/lenovo/haswell/variants/t440p/devicetree.cb +++ b/src/mainboard/lenovo/haswell/variants/t440p/devicetree.cb @@ -14,12 +14,14 @@ }" register "ec_present" = "true" device cpu_cluster 0 on + ops haswell_cpy_bus_ops chip cpu/intel/haswell device lapic 0 on end device lapic 0xacac off end end end device domain 0 on + ops haswell_pci_domain_ops subsystemid 0x17aa 0x220e inherit device pci 00.0 on end # Host bridge diff --git a/src/mainboard/lenovo/haswell/variants/w541/devicetree.cb b/src/mainboard/lenovo/haswell/variants/w541/devicetree.cb index ae720e8..5dc9f1a 100644 --- a/src/mainboard/lenovo/haswell/variants/w541/devicetree.cb +++ b/src/mainboard/lenovo/haswell/variants/w541/devicetree.cb @@ -14,12 +14,14 @@ }" register "ec_present" = "true" device cpu_cluster 0 on + ops haswell_cpy_bus_ops chip cpu/intel/haswell device lapic 0 on end device lapic 0xacac off end end end device domain 0 on + ops haswell_pci_domain_ops subsystemid 0x17aa 0x2211 inherit device pci 00.0 on end # Host bridge diff --git a/src/mainboard/msi/h81m-p33/devicetree.cb b/src/mainboard/msi/h81m-p33/devicetree.cb index e079770..081b1ecd 100644 --- a/src/mainboard/msi/h81m-p33/devicetree.cb +++ b/src/mainboard/msi/h81m-p33/devicetree.cb @@ -3,12 +3,14 @@ chip northbridge/intel/haswell register "gpu_ddi_e_connected" = "1" device cpu_cluster 0 on + ops haswell_cpy_bus_ops chip cpu/intel/haswell device lapic 0 on end device lapic 0xacac off end end end device domain 0 on + ops haswell_pci_domain_ops subsystemid 0x1462 0x7817 inherit device pci 00.0 on end # Host bridge device pci 01.0 on end # PEG diff --git a/src/mainboard/supermicro/x10slm-f/devicetree.cb b/src/mainboard/supermicro/x10slm-f/devicetree.cb index 6cd3ab7..2d1e8189 100644 --- a/src/mainboard/supermicro/x10slm-f/devicetree.cb +++ b/src/mainboard/supermicro/x10slm-f/devicetree.cb @@ -3,6 +3,7 @@ chip northbridge/intel/haswell device cpu_cluster 0 on + ops haswell_cpy_bus_ops chip cpu/intel/haswell device lapic 0 on end device lapic 0xacac off end @@ -10,6 +11,7 @@ end device domain 0 on + ops haswell_pci_domain_ops subsystemid 0x15d9 0x0803 inherit device pci 00.0 on end # Host bridge diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index e84ba76..e11eb1c 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -34,7 +34,7 @@ return NULL; } -static struct device_operations pci_domain_ops = { +struct device_operations haswell_pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, .scan_bus = pci_domain_scan_bus, @@ -557,23 +557,12 @@ .devices = mc_pci_device_ids, }; -static struct device_operations cpu_bus_ops = { +struct device_operations haswell_cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, .init = mp_cpu_bus_init, }; -static void enable_dev(struct device *dev) -{ - /* Set the operations if it is a special bus type. */ - if (dev->path.type == DEVICE_PATH_DOMAIN) { - dev->ops = &pci_domain_ops; - } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { - dev->ops = &cpu_bus_ops; - } -} - struct chip_operations northbridge_intel_haswell_ops = { CHIP_NAME("Intel Haswell integrated Northbridge") - .enable_dev = enable_dev, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/69289 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I955274bc6bda587201f130762c0735c36f5501d1 Gerrit-Change-Number: 69289 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-MessageType: newchange

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coreboot-gerrit November 2022