coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/skyrim/var/winterhold: Enable Dynamic DPTC config
by EricKY Cheng (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Raul Rangel, Jason Nien, Jon Murphy, Martin Roth, Moises Garcia, Eric Peers, Karthikeyan Ramasubramanian. EricKY Cheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69024 ) Change subject: mb/google/skyrim/var/winterhold: Enable Dynamic DPTC config ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: Hi all, Move this CL to the end of the relation chain BR Eric KY Cheng -- To view, visit https://review.coreboot.org/c/coreboot/+/69024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I957511c44278a7cffb7cb5d7e099eb13232b6a1a Gerrit-Change-Number: 69024 Gerrit-PatchSet: 6 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nelson Ye <nelson_ye(a)compal.corp-partner.google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Comment-Date: Mon, 07 Nov 2022 07:54:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Use index 0x10 instead of 0 for IOE P2SB
by build bot (Jenkins) (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal, Ivy Jian, Eric Lai. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69041 ) Change subject: soc/intel/meteorlake: Use index 0x10 instead of 0 for IOE P2SB ...................................................................... Patch Set 7: Verified-1 (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162613): https://review.coreboot.org/c/coreboot/+/69041/comment/4da2c42d_f87bd968 PS7, Line 6: Possible long commit subject (prefer a maximum 65 characters) -- To view, visit https://review.coreboot.org/c/coreboot/+/69041 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I44caac73e245f536f3a22baafa1a6a0370e1dd37 Gerrit-Change-Number: 69041 Gerrit-PatchSet: 7 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Mon, 07 Nov 2022 07:14:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/craask: Add wifi sar table
by Tyler Wang (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Tarun Tuli, Kangheui Won, Reka Norman, Tim Wawrzynczak, Nick Vaccaro. Tyler Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68660 ) Change subject: mb/google/nissa/var/craask: Add wifi sar table ...................................................................... Patch Set 8: (4 comments) This change is ready for review. File src/mainboard/google/brya/variants/craask/overridetree.cb: https://review.coreboot.org/c/coreboot/+/68660/comment/e25618bb_98f904c5 PS7, Line 23: 16 > 15? Done, thanks. https://review.coreboot.org/c/coreboot/+/68660/comment/35b11c58_728c029c PS7, Line 25: UN_USED > UNUSED Done, thanks. File src/mainboard/google/brya/variants/craask/variants.c: PS7: > Please rename this to `variant. […] Done, thanks. https://review.coreboot.org/c/coreboot/+/68660/comment/dc92a989_e9838723 PS7, Line 19: WIFI_SAR_CBFS_DEFAULT_FILENAME > This file won't exist. […] Update patch set 8, please help to review. Thanks! -- To view, visit https://review.coreboot.org/c/coreboot/+/68660 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5c92f0ab53ece12a97068f09241e5298909116aa Gerrit-Change-Number: 68660 Gerrit-PatchSet: 8 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cathy Chen <cathy_chen(a)quanta.corp-partner.google.com> Gerrit-CC: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Mon, 07 Nov 2022 07:02:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Reka Norman <rekanorman(a)chromium.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Use index 0x10 instead of 0 for IOE P2SB
by build bot (Jenkins) (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal, Ivy Jian, Eric Lai. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69041 ) Change subject: soc/intel/meteorlake: Use index 0x10 instead of 0 for IOE P2SB ...................................................................... Patch Set 6: Verified+1 (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162612): https://review.coreboot.org/c/coreboot/+/69041/comment/21442d34_0e8e321a PS6, Line 6: Possible long commit subject (prefer a maximum 65 characters) -- To view, visit https://review.coreboot.org/c/coreboot/+/69041 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I44caac73e245f536f3a22baafa1a6a0370e1dd37 Gerrit-Change-Number: 69041 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Mon, 07 Nov 2022 06:56:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel: Use `PWRMBASE` over static `Index 0` for PMC
by Subrata Banik (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Tarun Tuli, Kapil Porwal, Arthur Heymans, Lean Sheng Tan, Werner Zeh. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69227 ) Change subject: soc/intel: Use `PWRMBASE` over static `Index 0` for PMC ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > The PMC bar is set up in booblock/pch.c for these SoCs (meteorlkae seems to have it in soc_die.c) and here PWRMBASE is used (whihc is 0x10 so matching the BAR0 define). > Should we synchronize these two defines to stay consistent? So either use PWRMBASE in this patch or push another one to fix it in pch.c. > WDYT? Thanks for the suggestion. -- To view, visit https://review.coreboot.org/c/coreboot/+/69227 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iee2523876a8045e70effd5824afc327d1113038b Gerrit-Change-Number: 69227 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Mon, 07 Nov 2022 06:55:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel: Use `PWRMBASE` over static `Index 0` for PMC
by Subrata Banik (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal, Arthur Heymans, Lean Sheng Tan. Hello build bot (Jenkins), Tarun Tuli, Kapil Porwal, Arthur Heymans, Lean Sheng Tan, Werner Zeh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69227 to look at the new patch set (#3). Change subject: soc/intel: Use `PWRMBASE` over static `Index 0` for PMC ...................................................................... soc/intel: Use `PWRMBASE` over static `Index 0` for PMC This patch replaces static index 0 for PMC read resources with PCI configuration offset 0x10 (PWRMBASE). TEST=Able to build and boot Google, Rex to OS. Without this change: [SPEW ] PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0 With this change: [SPEW ] PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 10 Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: Iee2523876a8045e70effd5824afc327d1113038b --- M src/soc/intel/alderlake/pmc.c M src/soc/intel/cannonlake/pmc.c M src/soc/intel/elkhartlake/pmc.c M src/soc/intel/jasperlake/pmc.c M src/soc/intel/meteorlake/pmc.c M src/soc/intel/tigerlake/pmc.c 6 files changed, 35 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/69227/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/69227 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iee2523876a8045e70effd5824afc327d1113038b Gerrit-Change-Number: 69227 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: util/sconfig: Expose apic devices
by Arthur Heymans (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Arthur Heymans, Raul Rangel, Nico Huber, Furquan Shaikh, Martin L Roth. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59313 ) Change subject: util/sconfig: Expose apic devices ...................................................................... Patch Set 2: Code-Review-2 (1 comment) Patchset: PS2: The apicid of the bsp is not 0 on some hardware. -- To view, visit https://review.coreboot.org/c/coreboot/+/59313 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I800f089998f4a9be2216ed997cec5cedeb63f3db Gerrit-Change-Number: 59313 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Mon, 07 Nov 2022 06:42:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: cbfstool: Fix possible memory leak
by Shahina Shaik (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: V Sowmya, Shahina Shaik, Haribalaraman Ramasubramanian, Sridhar Siricilla, Balaji Manigandan, Yu-Ping Wu. Shahina Shaik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69220 ) Change subject: cbfstool: Fix possible memory leak ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69220 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01c4643d1e671d9bd9971ac6db8031634fffd61e Gerrit-Change-Number: 69220 Gerrit-PatchSet: 5 Gerrit-Owner: Shahina Shaik <shahina.shaik(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shahina Shaik <shahina.shaik(a)intel.corp-partner.google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Shahina Shaik <shahina.shaik(a)intel.com> Gerrit-Attention: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 07 Nov 2022 06:42:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: cpu/x86/mp_init.c: Fix the logic to add AP cpus
by Arthur Heymans (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: Bill XIE, Paul Menzel. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69215 ) Change subject: cpu/x86/mp_init.c: Fix the logic to add AP cpus ...................................................................... Patch Set 4: Code-Review-1 (1 comment) Patchset: PS4: I think the proper way to fix this is to remove the fake LAPIC, as it causes other problems. Also another way to go about this is to skip disabled ones as the fake 0xacac always is. -- To view, visit https://review.coreboot.org/c/coreboot/+/69215 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1075bc52091e619ef79cbeab0a0f6b57cff1d708 Gerrit-Change-Number: 69215 Gerrit-PatchSet: 4 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 07 Nov 2022 06:39:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: cbfstool: Fix possible memory leak
by Shahina Shaik (Code Review) 07 Nov '22

07 Nov '22

Attention is currently required from: V Sowmya, Shahina Shaik, Haribalaraman Ramasubramanian, Sridhar Siricilla, Balaji Manigandan, Yu-Ping Wu. Shahina Shaik has uploaded a new patch set (#5) to the change originally created by Shahina Shaik. ( https://review.coreboot.org/c/coreboot/+/69220 ) Change subject: cbfstool: Fix possible memory leak ...................................................................... cbfstool: Fix possible memory leak Handle the possible memory leak scenario. Foundby=klocwork BUG=NONE TEST=Boot to OS on Nivviks Change-Id: I01c4643d1e671d9bd9971ac6db8031634fffd61e Signed-off-by: Shaik Shahina <shahina.shaik(a)intel.com> --- M util/cbfstool/cbfstool.c M util/cbfstool/common.c 2 files changed, 24 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/69220/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/69220 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01c4643d1e671d9bd9971ac6db8031634fffd61e Gerrit-Change-Number: 69220 Gerrit-PatchSet: 5 Gerrit-Owner: Shahina Shaik <shahina.shaik(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shahina Shaik <shahina.shaik(a)intel.corp-partner.google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Shahina Shaik <shahina.shaik(a)intel.com> Gerrit-Attention: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2022