coreboot-gerrit November 2022

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[M] Change in coreboot[master]: cpu/*: Drop PARALLEL_MP leftovers
by Kyösti Mälkki (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Arthur Heymans. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69361 ) Change subject: cpu/*: Drop PARALLEL_MP leftovers ...................................................................... Patch Set 1: (1 comment) File src/mainboard/emulation/qemu-i440fx/northbridge.c: https://review.coreboot.org/c/coreboot/+/69361/comment/7462e237_8cc1b722 PS1, Line 257: initialize_cpus(dev->link_list); Less than obvious change, if correct. -- To view, visit https://review.coreboot.org/c/coreboot/+/69361 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c46c36390f116f8f8920c06e539075e60c7118c Gerrit-Change-Number: 69361 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 08 Nov 2022 06:06:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/xeon_sp: Move SMBIOS type 4 override functions from mainboa...
by Shuming Chu (Shuming) (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Jonathan Zhang, Johnny Lin, Christian Walter, Jingle Hsu, Arthur Heymans. Hello Jingle Hsu, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/69363 to review the following change. Change subject: soc/intel/xeon_sp: Move SMBIOS type 4 override functions from mainboard to soc ...................................................................... soc/intel/xeon_sp: Move SMBIOS type 4 override functions from mainboard to soc Move SMBIOS type 4 override functions from mainboard to soc so that all xeon family cpus share same functions without implementing again. Tested=On OCP Deltalake, dmidecode -t 4 shows expected info. Signed-off-by: JingleHsuWiwynn <jingle_hsu(a)wiwynn.com> Change-Id: I17df8de67bc2f5e89ea04da36efb2480a7e73174 --- M src/mainboard/ocp/deltalake/ramstage.c M src/soc/intel/xeon_sp/ramstage.c 2 files changed, 27 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/69363/1 diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c index fb81e10..0fca920 100644 --- a/src/mainboard/ocp/deltalake/ramstage.c +++ b/src/mainboard/ocp/deltalake/ramstage.c @@ -327,17 +327,6 @@ t->bank_locator = smbios_add_string(t->eos, buf); } -unsigned int smbios_processor_family(struct cpuid_result res) -{ - return 0xb3; /* Xeon */ -} - -unsigned int smbios_processor_characteristics(void) -{ - /* 64-bit Capable, Multi-Core, Power/Performance Control */ - return 0x8c; /* BIT2 | BIT3 | BIT7 */ -} - static void mainboard_enable(struct device *dev) { dev->ops->get_smbios_strings = dl_oem_smbios_strings; diff --git a/src/soc/intel/xeon_sp/ramstage.c b/src/soc/intel/xeon_sp/ramstage.c index 68d5d46..ce60e98 100644 --- a/src/soc/intel/xeon_sp/ramstage.c +++ b/src/soc/intel/xeon_sp/ramstage.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <arch/cpu.h> #include <smbios.h> unsigned int smbios_cache_error_correction_type(u8 level) @@ -24,3 +25,13 @@ return SMBIOS_CACHE_OP_MODE_UNKNOWN; } } + +unsigned int smbios_processor_family(struct cpuid_result res) +{ + return SMBIOS_PROCESSOR_FAMILY_XEON; +} + +unsigned int smbios_processor_characteristics(void) +{ + return PROCESSOR_64BIT_CAPABLE|PROCESSOR_MULTI_CORE|PROCESSOR_POWER_PERFORMANCE_CONTROL; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/69363 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17df8de67bc2f5e89ea04da36efb2480a7e73174 Gerrit-Change-Number: 69363 Gerrit-PatchSet: 1 Gerrit-Owner: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: src/include/smbios: Add definition for smbios type 4 and type 9
by Shuming Chu (Shuming) (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Paul Menzel, Angel Pons. Hello build bot (Jenkins), Jonathan Zhang, Paul Menzel, Angel Pons, Angel Pons, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68902 to look at the new patch set (#4). Change subject: src/include/smbios: Add definition for smbios type 4 and type 9 ...................................................................... src/include/smbios: Add definition for smbios type 4 and type 9 Add definition for smbios type 4 and type 9 Signed-off-by: Tim Chu <Tim.Chu(a)quantatw.com> Change-Id: I559995b0204f8e5bdeef2c0f8b394f9011d72240 --- M src/include/smbios.h 1 file changed, 23 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/68902/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/68902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I559995b0204f8e5bdeef2c0f8b394f9011d72240 Gerrit-Change-Number: 68902 Gerrit-PatchSet: 4 Gerrit-Owner: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: cpu/x86/Kconfig.debug_cpu: Drop unused symbol
by Kyösti Mälkki (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Arthur Heymans. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69362 ) Change subject: cpu/x86/Kconfig.debug_cpu: Drop unused symbol ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69362 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b611773e596bea4788b05a3f58485fb3e002402 Gerrit-Change-Number: 69362 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 08 Nov 2022 05:58:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: Revert "mb/aopen/dxplplusu: Remove board"
by Arthur Heymans (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Angel Pons, Kyösti Mälkki, Elyes Haouas, Felix Held. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69339 ) Change subject: Revert "mb/aopen/dxplplusu: Remove board" ...................................................................... Patch Set 2: (1 comment) File src/cpu/intel/model_f2x/model_f2x_init.c: https://review.coreboot.org/c/coreboot/+/69339/comment/f7bad1ad_628f9cff PS2, Line 17: if (!intel_ht_sibling()) { : /* MTRRs are shared between threads */ : x86_setup_mtrrs(); : x86_mtrr_check(); : : /* Update the microcode */ : intel_update_microcode_from_cbfs(); : } : : /* Start up my CPU siblings */ : intel_sibling_init(cpu); This can be dropped if mp_ops has .pre_mp_ops: static void pre_mp_init(void) { const void *patch = intel_microcode_find(); intel_microcode_load_unlocked(patch); /* Setup MTRRs based on physical address size. */ x86_setup_mtrrs_with_detect(); x86_mtrr_check(); } .get_microcode_info: static void get_microcode_info(const void **microcode, int *parallel) { *microcode = intel_microcode_find(); *parallel = !intel_ht_supported(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/69339 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1cd02278240d1b5d006fb2a7730d3d86390f85b Gerrit-Change-Number: 69339 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 08 Nov 2022 05:57:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: cpu/x86/Kconfig.debug_cpu: Drop unused symbol
by Arthur Heymans (Code Review) 08 Nov '22

08 Nov '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69362 ) Change subject: cpu/x86/Kconfig.debug_cpu: Drop unused symbol ...................................................................... cpu/x86/Kconfig.debug_cpu: Drop unused symbol Change-Id: I2b611773e596bea4788b05a3f58485fb3e002402 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/Kconfig.debug_cpu 1 file changed, 10 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/69362/1 diff --git a/src/cpu/x86/Kconfig.debug_cpu b/src/cpu/x86/Kconfig.debug_cpu index 8e0c3e4..ddcb119 100644 --- a/src/cpu/x86/Kconfig.debug_cpu +++ b/src/cpu/x86/Kconfig.debug_cpu @@ -1,12 +1,5 @@ if ARCH_X86 -config HAVE_DEBUG_CAR - bool - -config DEBUG_CAR - bool "Output verbose Cache-as-RAM debug messages" - depends on HAVE_DEBUG_CAR - config DISPLAY_MTRRS bool "Display intermediate MTRR settings" -- To view, visit https://review.coreboot.org/c/coreboot/+/69362 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b611773e596bea4788b05a3f58485fb3e002402 Gerrit-Change-Number: 69362 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: cpu/*: Drop PARALLEL_MP leftovers
by Arthur Heymans (Code Review) 08 Nov '22

08 Nov '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69361 ) Change subject: cpu/*: Drop PARALLEL_MP leftovers ...................................................................... cpu/*: Drop PARALLEL_MP leftovers These symbols and codepaths are unused now so drop them. Change-Id: I7c46c36390f116f8f8920c06e539075e60c7118c Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- D src/cpu/intel/hyperthreading/Makefile.inc D src/cpu/intel/hyperthreading/intel_sibling.c M src/cpu/intel/model_f3x/model_f3x_init.c M src/cpu/x86/Kconfig.debug_cpu D src/include/cpu/intel/hyperthreading.h M src/mainboard/emulation/qemu-i440fx/northbridge.c 6 files changed, 13 insertions(+), 96 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/69361/1 diff --git a/src/cpu/intel/hyperthreading/Makefile.inc b/src/cpu/intel/hyperthreading/Makefile.inc deleted file mode 100644 index 8adbad9..0000000 --- a/src/cpu/intel/hyperthreading/Makefile.inc +++ /dev/null @@ -1 +0,0 @@ -ramstage-y += intel_sibling.c diff --git a/src/cpu/intel/hyperthreading/intel_sibling.c b/src/cpu/intel/hyperthreading/intel_sibling.c deleted file mode 100644 index 9fde031..0000000 --- a/src/cpu/intel/hyperthreading/intel_sibling.c +++ /dev/null @@ -1,65 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <arch/cpu.h> -#include <console/console.h> -#include <cpu/intel/hyperthreading.h> -#include <device/device.h> -#include <option.h> - -/* Intel hyper-threading requires serialized CPU init. */ - -static int first_time = 1; -static int disable_siblings = !CONFIG(LOGICAL_CPUS); - -void intel_sibling_init(struct device *cpu) -{ - unsigned int i, siblings; - struct cpuid_result result; - - /* On the bootstrap processor see if I want sibling cpus enabled */ - if (first_time) { - first_time = 0; - disable_siblings = get_uint_option("hyper_threading", disable_siblings); - } - result = cpuid(1); - /* Is hyperthreading supported */ - if (!(result.edx & (1 << 28))) - return; - - /* See how many sibling cpus we have */ - siblings = (result.ebx >> 16) & 0xff; - if (siblings < 1) - siblings = 1; - - printk(BIOS_DEBUG, "CPU: %u %d siblings\n", - cpu->path.apic.apic_id, - siblings); - - /* See if I am a sibling cpu */ - if (cpu->path.apic.apic_id & (siblings - 1)) { - if (disable_siblings) - cpu->enabled = 0; - return; - } - - /* I am the primary CPU start up my siblings */ - for (i = 1; i < siblings; i++) { - struct device_path cpu_path; - struct device *new; - /* Build the CPU device path */ - cpu_path.type = DEVICE_PATH_APIC; - cpu_path.apic.apic_id = cpu->path.apic.apic_id + i; - - /* Allocate new CPU device structure iff sibling CPU - * was not in static device tree. - */ - new = alloc_find_dev(cpu->bus, &cpu_path); - - if (!new) - continue; - - printk(BIOS_DEBUG, "CPU: %u has sibling %u\n", - cpu->path.apic.apic_id, - new->path.apic.apic_id); - } -} diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c index 198490f..ec75ced 100644 --- a/src/cpu/intel/model_f3x/model_f3x_init.c +++ b/src/cpu/intel/model_f3x/model_f3x_init.c @@ -12,19 +12,6 @@ { /* Turn on caching if we haven't already */ enable_cache(); - - if (!CONFIG(PARALLEL_MP) && !intel_ht_sibling()) { - /* MTRRs are shared between threads */ - x86_setup_mtrrs(); - x86_mtrr_check(); - - /* Update the microcode */ - intel_update_microcode_from_cbfs(); - } - - /* Start up my CPU siblings */ - if (!CONFIG(PARALLEL_MP)) - intel_sibling_init(cpu); }; static struct device_operations cpu_dev_ops = { diff --git a/src/cpu/x86/Kconfig.debug_cpu b/src/cpu/x86/Kconfig.debug_cpu index 7edb60f..8e0c3e4 100644 --- a/src/cpu/x86/Kconfig.debug_cpu +++ b/src/cpu/x86/Kconfig.debug_cpu @@ -10,8 +10,4 @@ config DISPLAY_MTRRS bool "Display intermediate MTRR settings" -config DEBUG_SMM_RELOCATION - bool "Debug SMM relocation code" - depends on HAVE_SMI_HANDLER && SMM_ASEG - endif # ARCH_X86 diff --git a/src/include/cpu/intel/hyperthreading.h b/src/include/cpu/intel/hyperthreading.h deleted file mode 100644 index 0613aa1..0000000 --- a/src/include/cpu/intel/hyperthreading.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef CPU_INTEL_HYPERTHREADING_H -#define CPU_INTEL_HYPERTHREADING_H - -struct device; -void intel_sibling_init(struct device *cpu); - -#endif /* CPU_INTEL_HYPERTHREADING_H */ diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c index 957837e..497d37c 100644 --- a/src/mainboard/emulation/qemu-i440fx/northbridge.c +++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c @@ -254,10 +254,7 @@ static void cpu_bus_init(struct device *dev) { - if (CONFIG(PARALLEL_MP)) - mp_cpu_bus_init(dev); - else - initialize_cpus(dev->link_list); + initialize_cpus(dev->link_list); } static void cpu_bus_scan(struct device *bus) -- To view, visit https://review.coreboot.org/c/coreboot/+/69361 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c46c36390f116f8f8920c06e539075e60c7118c Gerrit-Change-Number: 69361 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/guybrush: Use detect vs probed flag for touchscreens
by 9elements QA (Code Review) 08 Nov '22

08 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69199 ) Change subject: mb/google/guybrush: Use detect vs probed flag for touchscreens ...................................................................... Patch Set 2: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/134439 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/134438 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/134437 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/134436 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/134435 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/134434 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/134433 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/134432 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/134431 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/134430 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/134429 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/134428 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/134427 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/134426 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/134425 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/134424 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/69199 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib6a76b969d3a245eccde5352231eb7e36736f2e0 Gerrit-Change-Number: 69199 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Tue, 08 Nov 2022 05:26:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: Revert "mb/aopen/dxplplusu: Remove board"
by build bot (Jenkins) (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Angel Pons, Arthur Heymans, Elyes Haouas, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69339 ) Change subject: Revert "mb/aopen/dxplplusu: Remove board" ...................................................................... Patch Set 2: (18 comments) File src/mainboard/aopen/dxplplusu/acpi_tables.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/f6101f3e_aa1e43a4 PS2, Line 21: struct resource* res = NULL; "foo* bar" should be "foo *bar" File src/northbridge/intel/e7505/northbridge.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/4eeac422_ece98634 PS2, Line 72: if (dev->path.type == DEVICE_PATH_DOMAIN) { braces {} are not necessary for any arm of this statement Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/be91b867_366ff496 PS2, Line 75: else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { else should follow close brace '}' File src/northbridge/intel/e7505/raminit.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/05de35bd_825afdc0 PS2, Line 175: while (i--) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/31ea67de_95e2d79c PS2, Line 357: hw_err: labels should not be indented Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/d00e0a79_731be7c2 PS2, Line 696: BUG(); Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON() Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/2ff5fd43_8efca5cd PS2, Line 994: hw_err: labels should not be indented Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/64525b32_07b9c249 PS2, Line 1159: mem_controller *ctrl, need consistent spacing around '*' (ctx:WxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/19d1b5f2_7776977c PS2, Line 1189: if (!(dimm_mask & (1 << i))) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/bafd557d_ab4fb3c2 PS2, Line 1206: if (value != ERROR_SCHEME_ECC) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/35326c44_b75fd681 PS2, Line 1276: if (sdram_width.side1 == 4) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/56c00f5f_e9769093 PS2, Line 1280: if (sdram_width.side2 == 4) { braces {} are not necessary for single statement blocks File src/southbridge/intel/i82801dx/ac97.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/f8f393c1_876d2514 PS2, Line 85: if (! timeout) { space prohibited after that '!' (ctx:BxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/2ca9a76d_42d181d9 PS2, Line 85: if (! timeout) { braces {} are not necessary for single statement blocks File src/southbridge/intel/i82801dx/i82801dx.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/a1290244_65fb2425 PS2, Line 91: #define RTC_FAILED (1 <<2) need consistent spacing around '<<' (ctx:WxV) File src/southbridge/intel/i82801dx/i82801dx.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/e32f5308_55f2aa49 PS2, Line 55: if (!dev->enabled) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/8706aaf8_d5d477fb PS2, Line 58: if (new_disable_mask != cur_disable_mask) { braces {} are not necessary for single statement blocks File src/southbridge/intel/i82801dx/lpc.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162869): https://review.coreboot.org/c/coreboot/+/69339/comment/f209bf56_7f4f7657 PS2, Line 99: switch (pwr_on) { switch and case should be at the same indent -- To view, visit https://review.coreboot.org/c/coreboot/+/69339 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1cd02278240d1b5d006fb2a7730d3d86390f85b Gerrit-Change-Number: 69339 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 08 Nov 2022 05:23:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: Revert "mb/aopen/dxplplusu: Remove board"
by Kyösti Mälkki (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Angel Pons, Arthur Heymans, Elyes Haouas, Felix Held. Hello build bot (Jenkins), Angel Pons, Arthur Heymans, Elyes Haouas, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69339 to look at the new patch set (#2). Change subject: Revert "mb/aopen/dxplplusu: Remove board" ...................................................................... Revert "mb/aopen/dxplplusu: Remove board" This reverts commit eb76a455cd39ec59b7f2ba28baeec9538befd59e. PARALLEL_MP was working prior to board removal and no relevant SMI handlers were implemented. So NO_SMM choice is now selected. Change-Id: Ia1cd02278240d1b5d006fb2a7730d3d86390f85b Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/arch/x86/smbios.c M src/cpu/intel/Kconfig M src/cpu/intel/Makefile.inc A src/cpu/intel/model_f2x/Kconfig A src/cpu/intel/model_f2x/Makefile.inc A src/cpu/intel/model_f2x/model_f2x_init.c A src/cpu/intel/socket_mPGA604/Kconfig A src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/x86/Kconfig A src/mainboard/aopen/Kconfig A src/mainboard/aopen/Kconfig.name A src/mainboard/aopen/dxplplusu/Kconfig A src/mainboard/aopen/dxplplusu/Kconfig.name A src/mainboard/aopen/dxplplusu/Makefile.inc A src/mainboard/aopen/dxplplusu/acpi/e7505_pri.asl A src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl A src/mainboard/aopen/dxplplusu/acpi/i82801db.asl A src/mainboard/aopen/dxplplusu/acpi/p64h2.asl A src/mainboard/aopen/dxplplusu/acpi/power.asl A src/mainboard/aopen/dxplplusu/acpi/scsi.asl A src/mainboard/aopen/dxplplusu/acpi/superio.asl A src/mainboard/aopen/dxplplusu/acpi_tables.c A src/mainboard/aopen/dxplplusu/board_info.txt A src/mainboard/aopen/dxplplusu/bootblock.c A src/mainboard/aopen/dxplplusu/devicetree.cb A src/mainboard/aopen/dxplplusu/dsdt.asl A src/northbridge/intel/e7505/Kconfig A src/northbridge/intel/e7505/Makefile.inc A src/northbridge/intel/e7505/e7505.h A src/northbridge/intel/e7505/memmap.c A src/northbridge/intel/e7505/northbridge.c A src/northbridge/intel/e7505/raminit.c A src/northbridge/intel/e7505/raminit.h A src/northbridge/intel/e7505/romstage.c M src/southbridge/intel/common/smbus.c A src/southbridge/intel/i82801dx/Kconfig A src/southbridge/intel/i82801dx/Makefile.inc A src/southbridge/intel/i82801dx/ac97.c A src/southbridge/intel/i82801dx/bootblock.c A src/southbridge/intel/i82801dx/chip.h A src/southbridge/intel/i82801dx/early_smbus.c A src/southbridge/intel/i82801dx/fadt.c A src/southbridge/intel/i82801dx/i82801dx.c A src/southbridge/intel/i82801dx/i82801dx.h A src/southbridge/intel/i82801dx/ide.c A src/southbridge/intel/i82801dx/lpc.c A src/southbridge/intel/i82801dx/usb.c A src/southbridge/intel/i82801dx/usb2.c A src/southbridge/intel/i82870/82870.h A src/southbridge/intel/i82870/Kconfig A src/southbridge/intel/i82870/Makefile.inc A src/southbridge/intel/i82870/ioapic.c A src/southbridge/intel/i82870/pcibridge.c M src/superio/smsc/Makefile.inc A src/superio/smsc/lpc47m10x/Kconfig A src/superio/smsc/lpc47m10x/Makefile.inc A src/superio/smsc/lpc47m10x/early_serial.c A src/superio/smsc/lpc47m10x/lpc47m10x.h A src/superio/smsc/lpc47m10x/superio.c 59 files changed, 4,485 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/69339/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69339 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1cd02278240d1b5d006fb2a7730d3d86390f85b Gerrit-Change-Number: 69339 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2022