coreboot-gerrit November 2022

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[M] Change in coreboot[master]: cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_path
by Arthur Heymans (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Arthur Heymans, Angel Pons, Kyösti Mälkki. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64342 ) Change subject: cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_path ...................................................................... Patch Set 11: (5 comments) File src/arch/x86/cpu.c: https://review.coreboot.org/c/coreboot/+/64342/comment/e91da275_1d9a7f00 PS5, Line 224: return NULL; > Given the usage below, maybe it's best to die instead of returning NULL? How important is the CPU cl […] Done https://review.coreboot.org/c/coreboot/+/64342/comment/447ecb0a_73f98487 PS5, Line 233: cpu_cluster() > Can return NULL Done https://review.coreboot.org/c/coreboot/+/64342/comment/868b11c2_dda34117 PS5, Line 254: return dev->path.apic.initial_lapicid; > When there are `N` CPU devices (`0` to `N - 1`) and one calls this function with `N` as `logical_cpu […] Done File src/cpu/x86/lapic/lapic_cpu_init.c: https://review.coreboot.org/c/coreboot/+/64342/comment/f41f2367_2e3ab863 PS8, Line 255: cpu_add_map_entry(info->index); > > Where is `initial_lapicid` set? […] Done https://review.coreboot.org/c/coreboot/+/64342/comment/6babe4c6_3e4f6fb5 PS8, Line 396: cpu_add_map_entry(info->index); > Where is `initial_lapicid` set? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/64342 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d9f8d23c0b0e5c142f6907593428d8509e4e7bb Gerrit-Change-Number: 64342 Gerrit-PatchSet: 11 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Tue, 08 Nov 2022 06:38:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: [WIP]cpu/mp_init: Detect the number of CPUs are runtime
by Arthur Heymans (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Arthur Heymans, Kyösti Mälkki. Hello build bot (Jenkins), Kyösti Mälkki, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68893 to look at the new patch set (#11). Change subject: [WIP]cpu/mp_init: Detect the number of CPUs are runtime ...................................................................... [WIP]cpu/mp_init: Detect the number of CPUs are runtime On some systems the only way to find out what CPUs are are present is by in initializing them and seeing which one checks in. TESTED with qemu reporting a too high number of CPUs. Change-Id: Iafe9d3d4838dad46cd0c7b6d30b905cbd258f17f Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/Kconfig M src/cpu/x86/mp_init.c M src/cpu/x86/smm/smm_module_loader.c 3 files changed, 63 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/68893/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/68893 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iafe9d3d4838dad46cd0c7b6d30b905cbd258f17f Gerrit-Change-Number: 68893 Gerrit-PatchSet: 11 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: cpu/x86/topology: Add code to fill in topology on struct path
by Arthur Heymans (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Jonathan Zhang, Shuming Chu (Shuming), TangYiwei. Hello build bot (Jenkins), Jonathan Zhang, Shuming Chu (Shuming), TangYiwei, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69222 to look at the new patch set (#2). Change subject: cpu/x86/topology: Add code to fill in topology on struct path ...................................................................... cpu/x86/topology: Add code to fill in topology on struct path This is needed to generate MADT and SRAT where lapicid for threads need to be added last. Change-Id: I2210eb9b663dd90941a64132aa7154440dc7e5a9 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/Makefile.inc M src/cpu/x86/mp_init.c A src/cpu/x86/topology.c A src/include/cpu/x86/topology.h 4 files changed, 111 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/69222/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69222 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2210eb9b663dd90941a64132aa7154440dc7e5a9 Gerrit-Change-Number: 69222 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: TangYiwei Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_path
by Arthur Heymans (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Angel Pons, Arthur Heymans, Kyösti Mälkki. Hello build bot (Jenkins), Angel Pons, Elyes Haouas, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/64342 to look at the new patch set (#12). Change subject: cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_path ...................................................................... cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_path It's quite confusing to keep track of lapic ID inside the device struct and initial lapic ID inside an array. Change-Id: I4d9f8d23c0b0e5c142f6907593428d8509e4e7bb Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/x86/cpu.c M src/arch/x86/include/arch/cpu.h M src/cpu/x86/mp_init.c M src/device/cpu_device.c M src/include/cpu/cpu.h M src/include/device/path.h 6 files changed, 54 insertions(+), 50 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/64342/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/64342 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d9f8d23c0b0e5c142f6907593428d8509e4e7bb Gerrit-Change-Number: 64342 Gerrit-PatchSet: 12 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/google/brya/marasov: Update devicetree setting for marasov
by Subrata Banik (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Tarun Tuli, Frank Chu. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69364 ) Change subject: mb/google/brya/marasov: Update devicetree setting for marasov ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/brya/variants/marasov/overridetree.cb: https://review.coreboot.org/c/coreboot/+/69364/comment/d807d23f_4186e286 PS2, Line 14: end Are we planning to add an entry for UFS ``` field STORAGE 30 31 option STORAGE_EMMC 0 option STORAGE_NVME 1 option STORAGE_UFS 2 end ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/69364 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa4cb18b8e1a7b162f505ff12612ef808fb7061a Gerrit-Change-Number: 69364 Gerrit-PatchSet: 2 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Tue, 08 Nov 2022 06:37:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: Revert "mb/aopen/dxplplusu: Remove board"
by build bot (Jenkins) (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Angel Pons, Kyösti Mälkki, Elyes Haouas, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69339 ) Change subject: Revert "mb/aopen/dxplplusu: Remove board" ...................................................................... Patch Set 3: (10 comments) File src/northbridge/intel/e7505/northbridge.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162880): https://review.coreboot.org/c/coreboot/+/69339/comment/f961c427_0ab54e79 PS3, Line 72: if (dev->path.type == DEVICE_PATH_DOMAIN) { braces {} are not necessary for any arm of this statement File src/northbridge/intel/e7505/raminit.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162880): https://review.coreboot.org/c/coreboot/+/69339/comment/449bb3c9_15f3ad57 PS3, Line 175: while (i--) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162880): https://review.coreboot.org/c/coreboot/+/69339/comment/117892b7_45956a10 PS3, Line 696: BUG(); Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON() Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162880): https://review.coreboot.org/c/coreboot/+/69339/comment/84df1650_3711ae47 PS3, Line 1187: if (!(dimm_mask & (1 << i))) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162880): https://review.coreboot.org/c/coreboot/+/69339/comment/0c211f29_95587280 PS3, Line 1204: if (value != ERROR_SCHEME_ECC) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162880): https://review.coreboot.org/c/coreboot/+/69339/comment/2f7b214d_c35827de PS3, Line 1274: if (sdram_width.side1 == 4) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162880): https://review.coreboot.org/c/coreboot/+/69339/comment/1743db65_23e778d3 PS3, Line 1278: if (sdram_width.side2 == 4) { braces {} are not necessary for single statement blocks File src/southbridge/intel/i82801dx/i82801dx.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162880): https://review.coreboot.org/c/coreboot/+/69339/comment/55b534a4_40ac9a24 PS3, Line 55: if (!dev->enabled) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162880): https://review.coreboot.org/c/coreboot/+/69339/comment/faa83beb_99c18d74 PS3, Line 58: if (new_disable_mask != cur_disable_mask) { braces {} are not necessary for single statement blocks File src/southbridge/intel/i82801dx/lpc.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162880): https://review.coreboot.org/c/coreboot/+/69339/comment/273a8578_ca2b55e8 PS3, Line 99: switch (pwr_on) that open brace { should be on the previous line -- To view, visit https://review.coreboot.org/c/coreboot/+/69339 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1cd02278240d1b5d006fb2a7730d3d86390f85b Gerrit-Change-Number: 69339 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 08 Nov 2022 06:37:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: [WIP]aopen/dxplplusu: Enable SMM_ASEG
by build bot (Jenkins) (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Angel Pons, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61517 ) Change subject: [WIP]aopen/dxplplusu: Enable SMM_ASEG ...................................................................... Patch Set 2: (64 comments) File src/southbridge/intel/i82801dx/smihandler.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/77c0be38_07eb418e PS2, Line 45: if (pm1_sts & (1 << 15)) printk(BIOS_SPEW, "WAK "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/c0155082_5dbb17a3 PS2, Line 46: if (pm1_sts & (1 << 14)) printk(BIOS_SPEW, "PCIEXPWAK "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/95f18ad7_301f89fa PS2, Line 47: if (pm1_sts & (1 << 11)) printk(BIOS_SPEW, "PRBTNOR "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/29b13ce3_2a36782d PS2, Line 48: if (pm1_sts & (1 << 10)) printk(BIOS_SPEW, "RTC "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/e64f18b2_0003f7d4 PS2, Line 49: if (pm1_sts & (1 << 8)) printk(BIOS_SPEW, "PWRBTN "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/1cec1027_2982a547 PS2, Line 50: if (pm1_sts & (1 << 5)) printk(BIOS_SPEW, "GBL "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/f6ad8e3c_355f2ce4 PS2, Line 51: if (pm1_sts & (1 << 4)) printk(BIOS_SPEW, "BM "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/28be476b_40605e5e PS2, Line 52: if (pm1_sts & (1 << 0)) printk(BIOS_SPEW, "TMROF "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/6a9eea6c_c51b1dc7 PS2, Line 76: if (smi_sts & (1 << 26)) printk(BIOS_DEBUG, "SPI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/ac97a029_624e769a PS2, Line 77: if (smi_sts & (1 << 25)) printk(BIOS_DEBUG, "EL_SMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/950b3ab4_f4bb74e5 PS2, Line 78: if (smi_sts & (1 << 21)) printk(BIOS_DEBUG, "MONITOR "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/b3a77a19_7117ccee PS2, Line 79: if (smi_sts & (1 << 20)) printk(BIOS_DEBUG, "PCI_EXP_SMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/8e81da42_0aba544a PS2, Line 80: if (smi_sts & (1 << 18)) printk(BIOS_DEBUG, "INTEL_USB2 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/d6be71fa_9b7ff4a3 PS2, Line 81: if (smi_sts & (1 << 17)) printk(BIOS_DEBUG, "LEGACY_USB2 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/32df225b_08cdc24b PS2, Line 82: if (smi_sts & (1 << 16)) printk(BIOS_DEBUG, "SMBUS_SMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/a31de866_85d1eb90 PS2, Line 83: if (smi_sts & (1 << 15)) printk(BIOS_DEBUG, "SERIRQ_SMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/4ed9462a_c573237d PS2, Line 84: if (smi_sts & (1 << 14)) printk(BIOS_DEBUG, "PERIODIC "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/6d653ff0_848235ee PS2, Line 85: if (smi_sts & (1 << 13)) printk(BIOS_DEBUG, "TCO "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/3636599f_21acd656 PS2, Line 86: if (smi_sts & (1 << 12)) printk(BIOS_DEBUG, "DEVMON "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/6eae9070_c96dab7c PS2, Line 87: if (smi_sts & (1 << 11)) printk(BIOS_DEBUG, "MCSMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/7e312524_70a723e1 PS2, Line 88: if (smi_sts & (1 << 10)) printk(BIOS_DEBUG, "GPI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/d56d0eae_2c0379a7 PS2, Line 89: if (smi_sts & (1 << 9)) printk(BIOS_DEBUG, "GPE0 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/1a0ec7d1_c035d36c PS2, Line 90: if (smi_sts & (1 << 8)) printk(BIOS_DEBUG, "PM1 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/74b8d478_aa4f77cd PS2, Line 91: if (smi_sts & (1 << 6)) printk(BIOS_DEBUG, "SWSMI_TMR "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/025e8dc2_01668b31 PS2, Line 92: if (smi_sts & (1 << 5)) printk(BIOS_DEBUG, "APM "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/da488070_6f139912 PS2, Line 93: if (smi_sts & (1 << 4)) printk(BIOS_DEBUG, "SLP_SMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/e869a820_9d991958 PS2, Line 94: if (smi_sts & (1 << 3)) printk(BIOS_DEBUG, "LEGACY_USB "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/f58b3b38_4d9a8737 PS2, Line 95: if (smi_sts & (1 << 2)) printk(BIOS_DEBUG, "BIOS "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/fd49b890_391a7f39 PS2, Line 118: for (i=31; i>= 16; i--) { spaces required around that '=' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/9ed90c81_a74789e2 PS2, Line 118: for (i=31; i>= 16; i--) { spaces required around that '>=' (ctx:VxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/3addc6c8_4f0e42dc PS2, Line 119: if (gpe0_sts & (1 << i)) printk(BIOS_DEBUG, "GPIO%d ", (i-16)); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/aa57f84e_3832434e PS2, Line 121: if (gpe0_sts & (1 << 14)) printk(BIOS_DEBUG, "USB4 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/9a7eecbd_65891185 PS2, Line 122: if (gpe0_sts & (1 << 13)) printk(BIOS_DEBUG, "PME_B0 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/c93aecee_dde2067e PS2, Line 123: if (gpe0_sts & (1 << 12)) printk(BIOS_DEBUG, "USB3 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/edc8b98a_80e66b75 PS2, Line 124: if (gpe0_sts & (1 << 11)) printk(BIOS_DEBUG, "PME "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/d4ef0d79_b273515f PS2, Line 125: if (gpe0_sts & (1 << 10)) printk(BIOS_DEBUG, "EL_SCI/BATLOW "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/a5c6700a_5c3795a4 PS2, Line 126: if (gpe0_sts & (1 << 9)) printk(BIOS_DEBUG, "PCI_EXP "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/038eab4f_9ee21529 PS2, Line 127: if (gpe0_sts & (1 << 8)) printk(BIOS_DEBUG, "RI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/f75e0c15_041cbe1e PS2, Line 128: if (gpe0_sts & (1 << 7)) printk(BIOS_DEBUG, "SMB_WAK "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/85585502_f2c1f0d8 PS2, Line 129: if (gpe0_sts & (1 << 6)) printk(BIOS_DEBUG, "TCO_SCI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/1832cbd8_0735f1ed PS2, Line 130: if (gpe0_sts & (1 << 5)) printk(BIOS_DEBUG, "AC97 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/dc0ba6a3_d989c63c PS2, Line 131: if (gpe0_sts & (1 << 4)) printk(BIOS_DEBUG, "USB2 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/da75d6e1_9ceb599a PS2, Line 132: if (gpe0_sts & (1 << 3)) printk(BIOS_DEBUG, "USB1 "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/58bdbaa5_8414b041 PS2, Line 133: if (gpe0_sts & (1 << 2)) printk(BIOS_DEBUG, "HOT_PLUG "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/54487ad3_f5608ffe PS2, Line 134: if (gpe0_sts & (1 << 0)) printk(BIOS_DEBUG, "THRM "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/79419211_2c059649 PS2, Line 159: if (tco_sts & (1 << 20)) printk(BIOS_DEBUG, "SMLINK_SLV "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/a61a2200_b732b2ef PS2, Line 160: if (tco_sts & (1 << 18)) printk(BIOS_DEBUG, "BOOT "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/ea085342_1dd582cb PS2, Line 161: if (tco_sts & (1 << 17)) printk(BIOS_DEBUG, "SECOND_TO "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/efa4fb63_d59fa28b PS2, Line 162: if (tco_sts & (1 << 16)) printk(BIOS_DEBUG, "INTRD_DET "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/9d12ec0a_4bd5ad60 PS2, Line 163: if (tco_sts & (1 << 12)) printk(BIOS_DEBUG, "DMISERR "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/0dc3e24a_059c62c5 PS2, Line 164: if (tco_sts & (1 << 10)) printk(BIOS_DEBUG, "DMISMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/452f8229_89ff51f5 PS2, Line 165: if (tco_sts & (1 << 9)) printk(BIOS_DEBUG, "DMISCI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/22d63f29_f4ed9f49 PS2, Line 166: if (tco_sts & (1 << 8)) printk(BIOS_DEBUG, "BIOSWR "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/c97147b1_71a67ce5 PS2, Line 167: if (tco_sts & (1 << 7)) printk(BIOS_DEBUG, "NEWCENTURY "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/01e77c88_d2a704f9 PS2, Line 168: if (tco_sts & (1 << 3)) printk(BIOS_DEBUG, "TIMEOUT "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/5254419c_6efc7870 PS2, Line 169: if (tco_sts & (1 << 2)) printk(BIOS_DEBUG, "TCO_INT "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/9e235c08_57b66168 PS2, Line 170: if (tco_sts & (1 << 1)) printk(BIOS_DEBUG, "SW_TCO "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/2d800e49_296176f8 PS2, Line 171: if (tco_sts & (1 << 0)) printk(BIOS_DEBUG, "NMI2SMI "); trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/450ec3a5_59f0eed9 PS2, Line 247: case ACPI_S0: printk(BIOS_DEBUG, "SMI#: Entering S0 (On)\n"); break; trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/1c91ae44_48dc2fc5 PS2, Line 248: case ACPI_S1: printk(BIOS_DEBUG, "SMI#: Entering S1 (Assert STPCLK#)\n"); break; trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/9ce2c85a_c688d0af PS2, Line 254: case ACPI_S4: printk(BIOS_DEBUG, "SMI#: Entering S4 (Suspend-To-Disk)\n"); break; trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/c51da23b_30a933df PS2, Line 274: default: printk(BIOS_DEBUG, "SMI#: ERROR: SLP_TYP reserved\n"); break; trailing statements should be on next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/72f6f1a3_93d98989 PS2, Line 352: printk(BIOS_DEBUG, "GPI (mask %04x)\n",reg16); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162881): https://review.coreboot.org/c/coreboot/+/61517/comment/e464b926_9966852b PS2, Line 488: if (dump) { braces {} are not necessary for single statement blocks -- To view, visit https://review.coreboot.org/c/coreboot/+/61517 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If20a7092117612a1a9e25eb6ac480e105acd57d7 Gerrit-Change-Number: 61517 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 08 Nov 2022 06:37:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: [WIP]aopen/dxplplusu: Enable SMM_ASEG
by Kyösti Mälkki (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Angel Pons, Patrick Rudolph. Hello build bot (Jenkins), Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61517 to look at the new patch set (#2). Change subject: [WIP]aopen/dxplplusu: Enable SMM_ASEG ...................................................................... [WIP]aopen/dxplplusu: Enable SMM_ASEG TBD: Add SMI handlers Change-Id: If20a7092117612a1a9e25eb6ac480e105acd57d7 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/intel/model_f2x/Kconfig M src/cpu/intel/model_f2x/Makefile.inc M src/northbridge/intel/e7505/Kconfig M src/southbridge/intel/i82801dx/Makefile.inc A src/southbridge/intel/i82801dx/smihandler.c 5 files changed, 508 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/61517/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61517 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If20a7092117612a1a9e25eb6ac480e105acd57d7 Gerrit-Change-Number: 61517 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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[XL] Change in coreboot[master]: Revert "mb/aopen/dxplplusu: Remove board"
by Kyösti Mälkki (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Angel Pons, Kyösti Mälkki, Elyes Haouas, Felix Held. Hello build bot (Jenkins), Angel Pons, Arthur Heymans, Elyes Haouas, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69339 to look at the new patch set (#3). Change subject: Revert "mb/aopen/dxplplusu: Remove board" ...................................................................... Revert "mb/aopen/dxplplusu: Remove board" This reverts commit eb76a455cd39ec59b7f2ba28baeec9538befd59e and applies minor fixes to make it build again. PARALLEL_MP was working prior to board removal and no relevant SMI handlers were implemented. So NO_SMM choice is now selected. Change-Id: Ia1cd02278240d1b5d006fb2a7730d3d86390f85b Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/arch/x86/smbios.c M src/cpu/intel/Kconfig M src/cpu/intel/Makefile.inc A src/cpu/intel/model_f2x/Kconfig A src/cpu/intel/model_f2x/Makefile.inc A src/cpu/intel/model_f2x/model_f2x_init.c A src/cpu/intel/socket_mPGA604/Kconfig A src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/x86/Kconfig A src/mainboard/aopen/Kconfig A src/mainboard/aopen/Kconfig.name A src/mainboard/aopen/dxplplusu/Kconfig A src/mainboard/aopen/dxplplusu/Kconfig.name A src/mainboard/aopen/dxplplusu/Makefile.inc A src/mainboard/aopen/dxplplusu/acpi/e7505_pri.asl A src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl A src/mainboard/aopen/dxplplusu/acpi/i82801db.asl A src/mainboard/aopen/dxplplusu/acpi/p64h2.asl A src/mainboard/aopen/dxplplusu/acpi/power.asl A src/mainboard/aopen/dxplplusu/acpi/scsi.asl A src/mainboard/aopen/dxplplusu/acpi/superio.asl A src/mainboard/aopen/dxplplusu/acpi_tables.c A src/mainboard/aopen/dxplplusu/board_info.txt A src/mainboard/aopen/dxplplusu/bootblock.c A src/mainboard/aopen/dxplplusu/devicetree.cb A src/mainboard/aopen/dxplplusu/dsdt.asl A src/northbridge/intel/e7505/Kconfig A src/northbridge/intel/e7505/Makefile.inc A src/northbridge/intel/e7505/e7505.h A src/northbridge/intel/e7505/memmap.c A src/northbridge/intel/e7505/northbridge.c A src/northbridge/intel/e7505/raminit.c A src/northbridge/intel/e7505/raminit.h A src/northbridge/intel/e7505/romstage.c M src/southbridge/intel/common/smbus.c A src/southbridge/intel/i82801dx/Kconfig A src/southbridge/intel/i82801dx/Makefile.inc A src/southbridge/intel/i82801dx/ac97.c A src/southbridge/intel/i82801dx/bootblock.c A src/southbridge/intel/i82801dx/chip.h A src/southbridge/intel/i82801dx/early_smbus.c A src/southbridge/intel/i82801dx/fadt.c A src/southbridge/intel/i82801dx/i82801dx.c A src/southbridge/intel/i82801dx/i82801dx.h A src/southbridge/intel/i82801dx/ide.c A src/southbridge/intel/i82801dx/lpc.c A src/southbridge/intel/i82801dx/usb.c A src/southbridge/intel/i82801dx/usb2.c A src/southbridge/intel/i82870/82870.h A src/southbridge/intel/i82870/Kconfig A src/southbridge/intel/i82870/Makefile.inc A src/southbridge/intel/i82870/ioapic.c A src/southbridge/intel/i82870/pcibridge.c M src/superio/smsc/Makefile.inc A src/superio/smsc/lpc47m10x/Kconfig A src/superio/smsc/lpc47m10x/Makefile.inc A src/superio/smsc/lpc47m10x/early_serial.c A src/superio/smsc/lpc47m10x/lpc47m10x.h A src/superio/smsc/lpc47m10x/superio.c 59 files changed, 4,486 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/69339/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/69339 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1cd02278240d1b5d006fb2a7730d3d86390f85b Gerrit-Change-Number: 69339 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/google/brya/marasov: Update devicetree setting for marasov
by Derek Huang (Code Review) 08 Nov '22

08 Nov '22

Attention is currently required from: Tarun Tuli, Frank Chu. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69364 ) Change subject: mb/google/brya/marasov: Update devicetree setting for marasov ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69364 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa4cb18b8e1a7b162f505ff12612ef808fb7061a Gerrit-Change-Number: 69364 Gerrit-PatchSet: 2 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Tue, 08 Nov 2022 06:34:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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