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Change subject: mb/siemens/mc_ehl2: Provide I2C timing parameter for SSDT
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/69307/comment/9e511c0a_2163753c
PS1, Line 117: .scl_lcnt = 0x1f4,
> Never mind. […]
Ack
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Change subject: mb/siemens/mc_ehl2: Provide I2C timing parameter for SSDT
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Patch Set 1: Code-Review+2
(1 comment)
File src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/69307/comment/37322be2_4b539151
PS1, Line 117: .scl_lcnt = 0x1f4,
> I have used hex format to stay consistent with the siemens/mc_apl mainboards. […]
Never mind. It's fine :p
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Change subject: mb/google/var/marasov: Generate SPD ID for supported memory parts
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Patch Set 1: Code-Review+2
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Change subject: mb/google/brya/marasov: Update devicetree setting for marasov
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Patch Set 3: Code-Review+2
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Change subject: mem_chip_info: Update to new format
......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
@yupingso can you check if this work on corsola, and merge it before we lock down the RO?
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Change subject: mb/google/brya/marasov: Update devicetree setting for marasov
......................................................................
Patch Set 3: Code-Review+1
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Change subject: mb/google/brya/marasov: Update devicetree setting for marasov
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/google/brya/variants/marasov/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/69364/comment/c6df96d6_7871bb5e
PS2, Line 14: end
> Are we planning to add an entry for UFS […]
Done
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Change subject: mem_chip_info: Update to new format
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Patch Set 5:
(1 comment)
File src/commonlib/bsd/include/commonlib/bsd/mem_chip_info.h:
https://review.coreboot.org/c/coreboot/+/68871/comment/d32cd789_f1ee5fef
PS5, Line 16: 0
nit: current version is located at the reserve[1] in the old format, so actually we can't identify if the QC blob is running the old version. probably not a big problem anyway.
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Hello build bot (Jenkins), Tarun Tuli, Subrata Banik, Derek Huang, Kyle Lin,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya/marasov: Update devicetree setting for marasov
......................................................................
mb/google/brya/marasov: Update devicetree setting for marasov
update devicetree setting per the schematic
BUG=b:254365935
BRANCH=None
TEST=Built successfully
Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com>
Change-Id: Ifa4cb18b8e1a7b162f505ff12612ef808fb7061a
---
M src/mainboard/google/brya/variants/marasov/overridetree.cb
1 file changed, 258 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/69364/3
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