Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55570
to look at the new patch set (#8).
Change subject: [WIP] AGESA binaryPI: Use madt_ioapic_from_hw()
......................................................................
[WIP] AGESA binaryPI: Use madt_ioapic_from_hw()
Change-Id: Ic8ba395bc220fdb691118719f7b32dd7400931f4
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/northbridge/amd/pi/00730F01/acpi_tables.c
M src/northbridge/amd/pi/00730F01/northbridge.c
M src/northbridge/amd/pi/00730F01/state_machine.c
M src/southbridge/amd/pi/hudson/sm.c
4 files changed, 18 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/55570/8
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Gerrit-Branch: master
Gerrit-Change-Id: Ic8ba395bc220fdb691118719f7b32dd7400931f4
Gerrit-Change-Number: 55570
Gerrit-PatchSet: 8
Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
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Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson.
Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55571
to look at the new patch set (#8).
Change subject: [WIP] soc/amd: Use ioapic helper functions
......................................................................
[WIP] soc/amd: Use ioapic helper functions
Calling setup_ioapic() was only correct for the
IOAPIC routing GSI 0..15 that mimic legacy PIC IRQs.
Change-Id: Ifdacc61b72f461ec6bea334fa06651c09a9695d6
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/soc/amd/cezanne/acpi.c
M src/soc/amd/cezanne/root_complex.c
M src/soc/amd/common/block/lpc/lpc.c
M src/soc/amd/glinda/acpi.c
M src/soc/amd/glinda/root_complex.c
M src/soc/amd/mendocino/acpi.c
M src/soc/amd/mendocino/root_complex.c
M src/soc/amd/morgana/acpi.c
M src/soc/amd/morgana/root_complex.c
M src/soc/amd/picasso/acpi.c
M src/soc/amd/picasso/root_complex.c
M src/soc/amd/stoneyridge/acpi.c
M src/soc/amd/stoneyridge/northbridge.c
13 files changed, 37 insertions(+), 31 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/55571/8
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Gerrit-Change-Number: 55571
Gerrit-PatchSet: 8
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Hello Keith Hui, build bot (Jenkins), Branden Waldner, Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55314
to look at the new patch set (#9).
Change subject: sb,soc/intel: Use register_new_ioapic_gsi0()
......................................................................
sb,soc/intel: Use register_new_ioapic_gsi0()
Change-Id: I6b0e4021595fb160ae3bf798468f4505b460266f
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/soc/intel/broadwell/pch/lpc.c
M src/soc/intel/common/block/lpc/lpc_lib.c
M src/soc/intel/denverton_ns/lpc.c
M src/southbridge/intel/bd82x6x/lpc.c
M src/southbridge/intel/i82801dx/lpc.c
M src/southbridge/intel/i82801gx/lpc.c
M src/southbridge/intel/i82801ix/lpc.c
M src/southbridge/intel/i82801jx/lpc.c
M src/southbridge/intel/ibexpeak/lpc.c
M src/southbridge/intel/lynxpoint/lpc.c
10 files changed, 20 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/55314/9
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Gerrit-Change-Id: I6b0e4021595fb160ae3bf798468f4505b460266f
Gerrit-Change-Number: 55314
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Hello Lance Zhao, build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55313
to look at the new patch set (#9).
Change subject: arch/x86: Add register_new_ioapic()
......................................................................
arch/x86: Add register_new_ioapic()
Using this I/O APIC IDs will be assigned incrementally
in the order of calling. I/O APIC ID #0 is reserved for
the I/O APIC delivering GSI #0.
Change-Id: I6493dc3b4fa542e81f80bb0355eac6dad30b93ec
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/arch/x86/include/arch/ioapic.h
M src/arch/x86/ioapic.c
2 files changed, 29 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/55313/9
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Gerrit-Change-Number: 55313
Gerrit-PatchSet: 9
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Attention is currently required from: Angel Pons, Arthur Heymans, Felix Held.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69339 )
Change subject: Revert "mb/aopen/dxplplusu: Remove board"
......................................................................
Patch Set 5:
(2 comments)
File src/cpu/intel/model_f2x/model_f2x_init.c:
https://review.coreboot.org/c/coreboot/+/69339/comment/6dffed0d_dcab574e
PS2, Line 17: if (!intel_ht_sibling()) {
: /* MTRRs are shared between threads */
: x86_setup_mtrrs();
: x86_mtrr_check();
:
: /* Update the microcode */
: intel_update_microcode_from_cbfs();
: }
:
: /* Start up my CPU siblings */
: intel_sibling_init(cpu);
> Done but not tested
Ack
File src/mainboard/aopen/dxplplusu/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/69339/comment/f0f2491a_b32464b0
PS2, Line 6: chip cpu/intel/socket_mPGA604
: device lapic 0 on end
: device lapic 6 on end
: end
> > The parallel mp init does not need this anymore and it might even confuse it. […]
Done
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Gerrit-MessageType: comment
Attention is currently required from: Iman Bingi.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69328
to look at the new patch set (#10).
Change subject: payloads/cbflashrom: Add new payload CBFlashrom
......................................................................
payloads/cbflashrom: Add new payload CBFlashrom
Flashrom with Graphical User Interface.
Depends on libpayload and nuklear.
Features:
* Graphical menus with scrolling.
* Text rendering engine (atm only bitmap font)
* Support for keyboard and mouse
* Support for USB and PS/2 devices
* Support for FAT32 file system (USB drives)
* Works as ELF payload
* Works as Seabios secondary payload
* Runs in qemu and on real hardware
Shortcomings:
* Doesn't work in VGA text mode
* Untested
TODO:
* Test on as many hardware/platforms as possible
Change-Id: Ib523ae9eb002f14749942137e53add4986098314
Signed-off-by: Ben Adu-Boahen <imanbingy(a)gmail.com>
---
M payloads/Kconfig
A payloads/cbflashrom/.gitignore
A payloads/cbflashrom/Kconfig
A payloads/cbflashrom/Makefile
A payloads/cbflashrom/NuklearUI/NuklearCBFlashrom.c
A payloads/cbflashrom/NuklearUI/NuklearCBFlashrom.h
A payloads/cbflashrom/NuklearUI/NuklearCheckbox.c
A payloads/cbflashrom/NuklearUI/NuklearCheckbox.h
A payloads/cbflashrom/NuklearUI/NuklearCommon.h
A payloads/cbflashrom/NuklearUI/NuklearDataGrid.c
A payloads/cbflashrom/NuklearUI/NuklearDataGrid.h
A payloads/cbflashrom/NuklearUI/NuklearFieldFile.c
A payloads/cbflashrom/NuklearUI/NuklearFieldFile.h
A payloads/cbflashrom/NuklearUI/NuklearFieldHex.c
A payloads/cbflashrom/NuklearUI/NuklearFieldHex.h
A payloads/cbflashrom/NuklearUI/NuklearFileChooser.c
A payloads/cbflashrom/NuklearUI/NuklearFileChooser.h
A payloads/cbflashrom/NuklearUI/NuklearHex.c
A payloads/cbflashrom/NuklearUI/NuklearHex.h
A payloads/cbflashrom/NuklearUI/NuklearInput.c
A payloads/cbflashrom/NuklearUI/NuklearInput.h
A payloads/cbflashrom/NuklearUI/NuklearObject.c
A payloads/cbflashrom/NuklearUI/NuklearObject.h
A payloads/cbflashrom/NuklearUI/NuklearStyle.c
A payloads/cbflashrom/NuklearUI/NuklearStyle.h
A payloads/cbflashrom/NuklearUI/NuklearUI.h
A payloads/cbflashrom/arch/x86/cpuid.c
A payloads/cbflashrom/arch/x86/cpuid.h
A payloads/cbflashrom/arch/x86/memcpy.c
A payloads/cbflashrom/arch/x86/memcpy.h
A payloads/cbflashrom/cbflashrom.c
A payloads/cbflashrom/cbflashrom.h
A payloads/cbflashrom/flashrom/82802ab.c
A payloads/cbflashrom/flashrom/COPYING
A payloads/cbflashrom/flashrom/Doxyfile
A payloads/cbflashrom/flashrom/MAINTAINERS
A payloads/cbflashrom/flashrom/Makefile
A payloads/cbflashrom/flashrom/Makefile.include
A payloads/cbflashrom/flashrom/README
A payloads/cbflashrom/flashrom/amd_imc.c
A payloads/cbflashrom/flashrom/at45db.c
A payloads/cbflashrom/flashrom/atahpt.c
A payloads/cbflashrom/flashrom/atavia.c
A payloads/cbflashrom/flashrom/bitbang_spi.c
A payloads/cbflashrom/flashrom/board_enable.c
A payloads/cbflashrom/flashrom/buspirate_spi.c
A payloads/cbflashrom/flashrom/cbtable.c
A payloads/cbflashrom/flashrom/ch341a_spi.c
A payloads/cbflashrom/flashrom/chipset_enable.c
A payloads/cbflashrom/flashrom/cli_common.c
A payloads/cbflashrom/flashrom/cli_output.c
A payloads/cbflashrom/flashrom/custom_baud.c
A payloads/cbflashrom/flashrom/dediprog.c
A payloads/cbflashrom/flashrom/developerbox_spi.c
A payloads/cbflashrom/flashrom/digilent_spi.c
A payloads/cbflashrom/flashrom/dirtyjtag_spi.c
A payloads/cbflashrom/flashrom/dmi.c
A payloads/cbflashrom/flashrom/drkaiser.c
A payloads/cbflashrom/flashrom/edi.c
A payloads/cbflashrom/flashrom/en29lv640b.c
A payloads/cbflashrom/flashrom/flashchips.c
A payloads/cbflashrom/flashrom/flashrom.8.tmpl
A payloads/cbflashrom/flashrom/flashrom.c
A payloads/cbflashrom/flashrom/fmap.c
A payloads/cbflashrom/flashrom/ft2232_spi.c
A payloads/cbflashrom/flashrom/gfxnvidia.c
A payloads/cbflashrom/flashrom/helpers.c
A payloads/cbflashrom/flashrom/helpers_fileio.c
A payloads/cbflashrom/flashrom/hwaccess_physmap.c
A payloads/cbflashrom/flashrom/hwaccess_x86_io.c
A payloads/cbflashrom/flashrom/hwaccess_x86_msr.c
A payloads/cbflashrom/flashrom/ich_descriptors.c
A payloads/cbflashrom/flashrom/ichspi.c
A payloads/cbflashrom/flashrom/include/chipdrivers.h
A payloads/cbflashrom/flashrom/include/coreboot_tables.h
A payloads/cbflashrom/flashrom/include/custom_baud.h
A payloads/cbflashrom/flashrom/include/edi.h
A payloads/cbflashrom/flashrom/include/ene.h
A payloads/cbflashrom/flashrom/include/flash.h
A payloads/cbflashrom/flashrom/include/flashchips.h
A payloads/cbflashrom/flashrom/include/fmap.h
A payloads/cbflashrom/flashrom/include/hwaccess_physmap.h
A payloads/cbflashrom/flashrom/include/hwaccess_x86_io.h
A payloads/cbflashrom/flashrom/include/hwaccess_x86_msr.h
A payloads/cbflashrom/flashrom/include/i2c_helper.h
A payloads/cbflashrom/flashrom/include/ich_descriptors.h
A payloads/cbflashrom/flashrom/include/layout.h
A payloads/cbflashrom/flashrom/include/libflashrom.h
A payloads/cbflashrom/flashrom/include/platform.h
A payloads/cbflashrom/flashrom/include/platform/pci.h
A payloads/cbflashrom/flashrom/include/platform/swap.h
A payloads/cbflashrom/flashrom/include/programmer.h
A payloads/cbflashrom/flashrom/include/spi.h
A payloads/cbflashrom/flashrom/include/usb_device.h
A payloads/cbflashrom/flashrom/include/writeprotect.h
A payloads/cbflashrom/flashrom/internal.c
A payloads/cbflashrom/flashrom/internal.h
A payloads/cbflashrom/flashrom/it8212.c
A payloads/cbflashrom/flashrom/it87spi.c
A payloads/cbflashrom/flashrom/jedec.c
A payloads/cbflashrom/flashrom/jlink_spi.c
A payloads/cbflashrom/flashrom/known_boards.c
A payloads/cbflashrom/flashrom/layout.c
A payloads/cbflashrom/flashrom/libflashrom.c
A payloads/cbflashrom/flashrom/libflashrom.map
A payloads/cbflashrom/flashrom/mcp6x_spi.c
A payloads/cbflashrom/flashrom/meson.build
A payloads/cbflashrom/flashrom/meson_options.txt
A payloads/cbflashrom/flashrom/mstarddc_spi.c
A payloads/cbflashrom/flashrom/nic3com.c
A payloads/cbflashrom/flashrom/nicintel.c
A payloads/cbflashrom/flashrom/nicintel_eeprom.c
A payloads/cbflashrom/flashrom/nicintel_spi.c
A payloads/cbflashrom/flashrom/nicnatsemi.c
A payloads/cbflashrom/flashrom/nicrealtek.c
A payloads/cbflashrom/flashrom/ogp_spi.c
A payloads/cbflashrom/flashrom/opaque.c
A payloads/cbflashrom/flashrom/parade_lspcon.c
A payloads/cbflashrom/flashrom/parallel.c
A payloads/cbflashrom/flashrom/pcidev.c
A payloads/cbflashrom/flashrom/pickit2_spi.c
A payloads/cbflashrom/flashrom/platform/endian_big.c
A payloads/cbflashrom/flashrom/platform/endian_little.c
A payloads/cbflashrom/flashrom/platform/memaccess.c
A payloads/cbflashrom/flashrom/platform/meson.build
A payloads/cbflashrom/flashrom/pony_spi.c
A payloads/cbflashrom/flashrom/processor_enable.c
A payloads/cbflashrom/flashrom/programmer.c
A payloads/cbflashrom/flashrom/programmer_table.c
A payloads/cbflashrom/flashrom/raiden_debug_spi.c
A payloads/cbflashrom/flashrom/rayer_spi.c
A payloads/cbflashrom/flashrom/realtek_mst_i2c_spi.c
A payloads/cbflashrom/flashrom/s25f.c
A payloads/cbflashrom/flashrom/satamv.c
A payloads/cbflashrom/flashrom/satasii.c
A payloads/cbflashrom/flashrom/sb600spi.c
A payloads/cbflashrom/flashrom/serprog.c
A payloads/cbflashrom/flashrom/sfdp.c
A payloads/cbflashrom/flashrom/spi.c
A payloads/cbflashrom/flashrom/spi25.c
A payloads/cbflashrom/flashrom/spi25_statusreg.c
A payloads/cbflashrom/flashrom/spi95.c
A payloads/cbflashrom/flashrom/sst28sf040.c
A payloads/cbflashrom/flashrom/sst49lfxxxc.c
A payloads/cbflashrom/flashrom/sst_fwhub.c
A payloads/cbflashrom/flashrom/stlinkv3_spi.c
A payloads/cbflashrom/flashrom/stm50.c
A payloads/cbflashrom/flashrom/test_build.sh
A payloads/cbflashrom/flashrom/udelay.c
A payloads/cbflashrom/flashrom/usb_device.c
A payloads/cbflashrom/flashrom/usbblaster_spi.c
A payloads/cbflashrom/flashrom/usbdev.c
A payloads/cbflashrom/flashrom/w29ee011.c
A payloads/cbflashrom/flashrom/w39.c
A payloads/cbflashrom/flashrom/wbsio_spi.c
A payloads/cbflashrom/flashrom/writeprotect.c
A payloads/cbflashrom/flashrom/writeprotect_ranges.c
A payloads/cbflashrom/fsys/usbstorage.c
A payloads/cbflashrom/fsys/usbstorage.h
A payloads/cbflashrom/gfx/gfx.c
A payloads/cbflashrom/gfx/gfx.h
A payloads/cbflashrom/gfx/splash.c
A payloads/cbflashrom/gfx/splash.h
A payloads/cbflashrom/lang/en.c
A payloads/cbflashrom/lang/lang.c
A payloads/cbflashrom/lang/lang.h
A payloads/cbflashrom/libftdi/LICENSE
A payloads/cbflashrom/libftdi/src/ftdi.c
A payloads/cbflashrom/libftdi/src/ftdi.h
A payloads/cbflashrom/libftdi/src/ftdi_i.h
A payloads/cbflashrom/libftdi/src/ftdi_stream.c
A payloads/cbflashrom/libjaylink/buffer.c
A payloads/cbflashrom/libjaylink/core.c
A payloads/cbflashrom/libjaylink/device.c
A payloads/cbflashrom/libjaylink/discovery.c
A payloads/cbflashrom/libjaylink/discovery_usb.c
A payloads/cbflashrom/libjaylink/emucom.c
A payloads/cbflashrom/libjaylink/error.c
A payloads/cbflashrom/libjaylink/fileio.c
A payloads/cbflashrom/libjaylink/jtag.c
A payloads/cbflashrom/libjaylink/libjaylink-internal.h
A payloads/cbflashrom/libjaylink/libjaylink.h
A payloads/cbflashrom/libjaylink/list.c
A payloads/cbflashrom/libjaylink/log.c
A payloads/cbflashrom/libjaylink/strutil.c
A payloads/cbflashrom/libjaylink/swd.c
A payloads/cbflashrom/libjaylink/swo.c
A payloads/cbflashrom/libjaylink/target.c
A payloads/cbflashrom/libjaylink/transport.c
A payloads/cbflashrom/libjaylink/transport_usb.c
A payloads/cbflashrom/libjaylink/util.c
A payloads/cbflashrom/libusb/libusb.c
A payloads/cbflashrom/libusb/libusb.h
A payloads/cbflashrom/logo/cbui.png
A payloads/cbflashrom/lp.config
A payloads/cbflashrom/util/buffers.c
A payloads/cbflashrom/util/buffers.h
A payloads/cbflashrom/util/vector.c
A payloads/cbflashrom/util/vector.h
199 files changed, 92,851 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/69328/10
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ib523ae9eb002f14749942137e53add4986098314
Gerrit-Change-Number: 69328
Gerrit-PatchSet: 10
Gerrit-Owner: Iman Bingi <imanbingy(a)gmail.com>
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Attention is currently required from: Tarun Tuli, Kangheui Won, Reka Norman, Ren Kuo, Tim Wawrzynczak, Tyler Wang, Vidya Gopalakrishnan, Peter Ou.
Vidya Gopalakrishnan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68523 )
Change subject: mb/google/nissa/var/craask: Modify DPTF related settings
......................................................................
Patch Set 6:
(1 comment)
File src/mainboard/google/brya/variants/craask/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/68523/comment/bb25235b_3761ac6c
PS3, Line 154: .time_window_min = 28 * MSECS_PER_SEC,
> Thanks Tyler. […]
MSECS_PER_SEC value is 1000, so the above interprets to 1000 msec. Actula value is 976 us = ~1ms.
This can be changed as below
.pl2 = {
.min_power = 25000,
.max_power = 25000,
.time_window_min = 1,
.time_window_max = 1,
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Change subject: commonlib/fsp_relocate: Fix Coverity Issues
......................................................................
Patch Set 3:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68637/comment/8a5da800_8261b938
PS1, Line 9: Recently committed change 1df1cf9 resulted in some Coverity
> Instead of "https://review.coreboot. […]
Done
Commit Message:
https://review.coreboot.org/c/coreboot/+/68637/comment/1eda071d_e184ddca
PS2, Line 7: commonlib/fsp_relocate: Fix Coverity Issues
> For the summary/title it’s not important what tool found an issue. […]
Ack
https://review.coreboot.org/c/coreboot/+/68637/comment/a422ebe3_60b07d4f
PS2, Line 9: Recently committed change 1df1cf9 resulted in some Coverity
: reported issues. This change attempts to fix the static
: analysis issues reported. The issues were reported as
: comments in https://review.coreboot.org/c/coreboot/+/66819
: I have looked at all Coverity fixes before my change using
: git log --oneline | grep -i coverity and then detailed
: git diffs for all coverity changes. However none of them
: had the same coverity errors reported as were reported
: for my changes. I do not have the manner to run coverity
: on my own to test my changes against coverity tests.
:
: TESTED=
: This code is tested with Intel CooperLake-SP FSP version
: 2.2.0.33A for DeltaLake boot
> Please reflow for 72 characters per line.
Done
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