coreboot-gerrit November 2022

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[S] Change in coreboot[master]: sb,soc/intel: Use register_new_ioapic_gsi0()
by Arthur Heymans (Code Review) 10 Nov '22

10 Nov '22

Attention is currently required from: Keith Hui, Jeff Daly, Branden Waldner, Vanessa Eusebio, Kyösti Mälkki, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55314 ) Change subject: sb,soc/intel: Use register_new_ioapic_gsi0() ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55314 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b0e4021595fb160ae3bf798468f4505b460266f Gerrit-Change-Number: 55314 Gerrit-PatchSet: 9 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Branden Waldner <scruffy99(a)gmail.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Keith Hui <buurin(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Branden Waldner <scruffy99(a)gmail.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 10 Nov 2022 16:21:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: sb,soc/intel: Use acpi_create_madt_ioapic_from_hw()
by Arthur Heymans (Code Review) 10 Nov '22

10 Nov '22

Attention is currently required from: Kyösti Mälkki, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55311 ) Change subject: sb,soc/intel: Use acpi_create_madt_ioapic_from_hw() ...................................................................... Patch Set 10: Code-Review+2 (1 comment) File src/soc/intel/common/block/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/55311/comment/617808ae_92e721bd PS10, Line 98: if (ioapic_entries) { : for (int i = 0; i < ioapic_entries; i++) { : current += acpi_create_madt_ioapic( : (void *)current, : ioapic_table[i].id, : ioapic_table[i].addr, : ioapic_table[i].gsi_base); : } : } else { Note to self: the only uses xeon_sp code and it could really be improved. -- To view, visit https://review.coreboot.org/c/coreboot/+/55311 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9fd9cf230ce21674d1c24b40f310e5558e65be25 Gerrit-Change-Number: 55311 Gerrit-PatchSet: 10 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 10 Nov 2022 16:19:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: arch/x86: Add register_new_ioapic()
by Arthur Heymans (Code Review) 10 Nov '22

10 Nov '22

Attention is currently required from: Angel Pons, Kyösti Mälkki. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55313 ) Change subject: arch/x86: Add register_new_ioapic() ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55313 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6493dc3b4fa542e81f80bb0355eac6dad30b93ec Gerrit-Change-Number: 55313 Gerrit-PatchSet: 9 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Thu, 10 Nov 2022 16:13:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: ACPI: Add acpi_create_madt_ioapic_from_hw()
by Arthur Heymans (Code Review) 10 Nov '22

10 Nov '22

Attention is currently required from: Angel Pons, Kyösti Mälkki, Felix Held. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55310 ) Change subject: ACPI: Add acpi_create_madt_ioapic_from_hw() ...................................................................... Patch Set 10: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55310 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia173582eaad305000f958c5d207e9efaa06d8750 Gerrit-Change-Number: 55310 Gerrit-PatchSet: 10 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 10 Nov 2022 16:11:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: include/cpu/msr.h: transform into an union
by Raul Rangel (Code Review) 10 Nov '22

10 Nov '22

Attention is currently required from: Martin Roth, Arthur Heymans. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68572 ) Change subject: include/cpu/msr.h: transform into an union ...................................................................... Patch Set 3: (1 comment) File src/include/cpu/x86/msr_access.h: https://review.coreboot.org/c/coreboot/+/68572/comment/144388c4_8b4f99aa PS3, Line 10: struct { : unsigned int lo; : unsigned int hi; : }; : uint64_t raw; Does this handle endianness correctly? -- To view, visit https://review.coreboot.org/c/coreboot/+/68572 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1b026cd3807fd68d805051a74b3d31fcde1c5626 Gerrit-Change-Number: 68572 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 10 Nov 2022 16:03:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/amd/chausie/ec.c: Enable WLAN
by Felix Held (Code Review) 10 Nov '22

10 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69319 ) Change subject: mb/amd/chausie/ec.c: Enable WLAN ...................................................................... mb/amd/chausie/ec.c: Enable WLAN Enable WLAN power and deassert the various radio disables. TEST=boot chausie Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: I2d21905001fa776c0d5c864d83dcd697e3febe0a Reviewed-on: https://review.coreboot.org/c/coreboot/+/69319 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Jason Glenesk <jason.glenesk(a)gmail.com> --- M src/mainboard/amd/chausie/ec.c 1 file changed, 44 insertions(+), 12 deletions(-) Approvals: build bot (Jenkins): Verified Jason Glenesk: Looks good to me, approved diff --git a/src/mainboard/amd/chausie/ec.c b/src/mainboard/amd/chausie/ec.c index 78465fa..fb96a4c 100644 --- a/src/mainboard/amd/chausie/ec.c +++ b/src/mainboard/amd/chausie/ec.c @@ -7,27 +7,35 @@ #define CHAUSIE_EC_DATA 0x662 #define EC_GPIO_3_ADDR 0xA3 -#define EC_GPIO_LOM_RESET_AUX BIT(1) +#define EC_GPIO_LOM_RESET_AUX BIT(1) #define EC_GPIO_7_ADDR 0xA7 -#define EC_GPIO_DT_PWREN BIT(2) -#define EC_GPIO_WWAN_MODULE_RST BIT(5) +#define EC_GPIO_DT_PWREN BIT(2) +#define EC_GPIO_WWAN_MODULE_RST BIT(5) #define EC_GPIO_8_ADDR 0xA8 -#define EC_GPIO_SMBUS0_EN BIT(0) +#define EC_GPIO_SMBUS0_EN BIT(0) #define EC_GPIO_A_ADDR 0xAA -#define EC_GPIO_WWAN_PWREN BIT(3) -#define EC_GPIO_M2_SSD0_PWREN BIT(6) -#define EC_GPIO_LOM_PWREN BIT(7) +#define EC_GPIO_WWAN_PWREN BIT(3) +#define EC_GPIO_WLAN_PWREN BIT(4) +#define EC_GPIO_M2_SSD0_PWREN BIT(6) +#define EC_GPIO_LOM_PWREN BIT(7) + +#define EC_GPIO_B_ADDR 0xAB +#define EC_GPIO_WL_RADIO_DIS BIT(0) +#define EC_GPIO_BT_RADIO_DIS BIT(2) +#define EC_GPIO_GNSS_RADIO_DIS_N BIT(5) +#define EC_GPIO_MAIN_RADIO_DIS_N BIT(6) +#define EC_GPIO_WWAN_POWER_OFF_N BIT(7) #define EC_GPIO_C_ADDR 0xAC -#define EC_GPIO_DT_N_WLAN_SW BIT(1) -#define EC_GPIO_MP2_SEL BIT(2) -#define EC_GPIO_WWAN_N_LOM_SW BIT(3) +#define EC_GPIO_DT_N_WLAN_SW BIT(1) +#define EC_GPIO_MP2_SEL BIT(2) +#define EC_GPIO_WWAN_N_LOM_SW BIT(3) #define EC_SW02_ADDR 0xB7 -#define EC_SW02_MS BIT(7) +#define EC_SW02_MS BIT(7) static void configure_ec_gpio(void) { @@ -46,9 +54,16 @@ ec_write(EC_GPIO_8_ADDR, tmp); tmp = ec_read(EC_GPIO_A_ADDR); - tmp |= EC_GPIO_M2_SSD0_PWREN | EC_GPIO_LOM_PWREN | EC_GPIO_WWAN_PWREN; + tmp |= EC_GPIO_M2_SSD0_PWREN | EC_GPIO_LOM_PWREN; + tmp |= EC_GPIO_WLAN_PWREN | EC_GPIO_WWAN_PWREN; ec_write(EC_GPIO_A_ADDR, tmp); + tmp = ec_read(EC_GPIO_B_ADDR); + tmp |= EC_GPIO_GNSS_RADIO_DIS_N | EC_GPIO_MAIN_RADIO_DIS_N; + tmp |= EC_GPIO_WWAN_POWER_OFF_N; + tmp &= ~EC_GPIO_WL_RADIO_DIS & ~EC_GPIO_BT_RADIO_DIS; + ec_write(EC_GPIO_B_ADDR, tmp); + tmp = ec_read(EC_GPIO_C_ADDR); tmp |= EC_GPIO_WWAN_N_LOM_SW | EC_GPIO_MP2_SEL | EC_GPIO_DT_N_WLAN_SW; ec_write(EC_GPIO_C_ADDR, tmp); -- To view, visit https://review.coreboot.org/c/coreboot/+/69319 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d21905001fa776c0d5c864d83dcd697e3febe0a Gerrit-Change-Number: 69319 Gerrit-PatchSet: 3 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/amd/chausie: Correct naming of EC FW
by Felix Held (Code Review) 10 Nov '22

10 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69276 ) Change subject: mb/amd/chausie: Correct naming of EC FW ...................................................................... mb/amd/chausie: Correct naming of EC FW Change the EC FW CBFS filename prefix to a more accurate "ec/" TEST=build and boot chausie Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: Ib9ee24ca06b29c74cc0a91f9e4789df00ba1ba53 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69276 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Jason Glenesk <jason.glenesk(a)gmail.com> --- M src/mainboard/amd/chausie/Kconfig M src/mainboard/amd/chausie/Makefile.inc 2 files changed, 22 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Jason Glenesk: Looks good to me, approved diff --git a/src/mainboard/amd/chausie/Kconfig b/src/mainboard/amd/chausie/Kconfig index c4f7638..da0e0c4 100644 --- a/src/mainboard/amd/chausie/Kconfig +++ b/src/mainboard/amd/chausie/Kconfig @@ -76,7 +76,7 @@ depends on VBOOT_SLOTS_RW_AB || VBOOT_SLOTS_RW_A # Add the EFS and EC to the RO region only # This is a chausie-specific override of soc/amd/mendocino/Kconfig - default "apu/amdfw apu/ecfw" + default "apu/amdfw ec/ecfw" config CHROMEOS # Use default libpayload config diff --git a/src/mainboard/amd/chausie/Makefile.inc b/src/mainboard/amd/chausie/Makefile.inc index b1f93e4..3666db7 100644 --- a/src/mainboard/amd/chausie/Makefile.inc +++ b/src/mainboard/amd/chausie/Makefile.inc @@ -26,10 +26,10 @@ $(call int-subtract, 0xffffffff \ $(CONFIG_ROM_SIZE)) $(CONFIG_CHAUSIE_MCHP_FW_OFFSET) 1) -cbfs-files-y += apu/ecfw -apu/ecfw-file := $(CONFIG_CHAUSIE_MCHP_FW_FILE) -apu/ecfw-position := $(CHAUSIE_EC_POSITION) -apu/ecfw-type := raw +cbfs-files-y += ec/ecfw +ec/ecfw-file := $(CONFIG_CHAUSIE_MCHP_FW_FILE) +ec/ecfw-position := $(CHAUSIE_EC_POSITION) +ec/ecfw-type := raw else files_added:: warn_no_mchp -- To view, visit https://review.coreboot.org/c/coreboot/+/69276 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9ee24ca06b29c74cc0a91f9e4789df00ba1ba53 Gerrit-Change-Number: 69276 Gerrit-PatchSet: 2 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: use RPL FSP headers
by Felix Held (Code Review) 10 Nov '22

10 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69367 ) Change subject: mb/google/brya/var/marasov: use RPL FSP headers ...................................................................... mb/google/brya/var/marasov: use RPL FSP headers To support an RPL SKU on marasov, marasov must use the FSP for RPL. Select SOC_INTEL_RAPTORLAKE for marasov so that it will use the RPL FSP headers for marasov. BUG=b:254365935 BRANCH=None TEST=FW_NAME=marasov emerge-brya intel-rplfsp coreboot-private-files-baseboard-brya coreboot chromeos-bootimage Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com> Change-Id: I7874420c0fb51b9cc616cd979ffc9349c381602e Reviewed-on: https://review.coreboot.org/c/coreboot/+/69367 Reviewed-by: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/brya/Kconfig.name 1 file changed, 25 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Frank Chu: Looks good to me, but someone else must approve Subrata Banik: Looks good to me, approved diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 2102961..2d11e10 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -303,3 +303,4 @@ config BOARD_GOOGLE_MARASOV bool "-> Marasov" select BOARD_GOOGLE_BASEBOARD_BRYA + select SOC_INTEL_RAPTORLAKE -- To view, visit https://review.coreboot.org/c/coreboot/+/69367 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7874420c0fb51b9cc616cd979ffc9349c381602e Gerrit-Change-Number: 69367 Gerrit-PatchSet: 3 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/elkhartlake: Enable 'scan_bus' on TSN GbE
by Arthur Heymans (Code Review) 10 Nov '22

10 Nov '22

Attention is currently required from: Mario Scheithauer, Lean Sheng Tan. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69385 ) Change subject: soc/intel/elkhartlake: Enable 'scan_bus' on TSN GbE ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69385 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88050df2059ec7e0b27a132bca626eaef3d5dfb0 Gerrit-Change-Number: 69385 Gerrit-PatchSet: 5 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Thu, 10 Nov 2022 15:50:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: drivers/phy/m88e1512: Add new driver for Marvell PHY 88E1512
by Arthur Heymans (Code Review) 10 Nov '22

10 Nov '22

Attention is currently required from: Mario Scheithauer, Werner Zeh. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69384 ) Change subject: drivers/phy/m88e1512: Add new driver for Marvell PHY 88E1512 ...................................................................... Patch Set 5: (1 comment) File src/drivers/phy/m88e1512/m88e1512.c: https://review.coreboot.org/c/coreboot/+/69384/comment/0527ae38_b2e946f7 PS5, Line 16: : dev->ops = &m88e1512_ops; : } you can set ops directly in devicetrees now. -- To view, visit https://review.coreboot.org/c/coreboot/+/69384 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I24011860caa7bb206770f9779eb34b689293db10 Gerrit-Change-Number: 69384 Gerrit-PatchSet: 5 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Thu, 10 Nov 2022 15:50:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2022