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Change subject: nb/intel/ironlake: Work around unused variable warning
......................................................................
Patch Set 6:
(1 comment)
Patchset:
PS2:
> Let's keep the code, but mark the variable as unused and add a FIXME. […]
Done
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Change subject: nb/intel/ironlake: Work around unused variable warning
......................................................................
Patch Set 6: Code-Review+2
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Change subject: ec/clevo/it5570e: add driver for EC used on various Clevo laptops
......................................................................
Patch Set 12:
(4 comments)
File src/ec/clevo/it5570e/acpi/ec_queries.asl:
https://review.coreboot.org/c/coreboot/+/68791/comment/82d5b72e_8115f65b
PS4, Line 199: // L140MU only
> currently it's unknown what it does and when, so it's there for documentation only for now
Ack
File src/ec/clevo/it5570e/i2ec.h:
https://review.coreboot.org/c/coreboot/+/68791/comment/594e960b_834bf55e
PS4, Line 10: #define D2ADR 0x2e
> this is *not* the superio port but ITE specific "level-2 interface" behind the superio port. […]
Ah, thanks for the explanation. Would be good to clarify this
File src/ec/clevo/it5570e/i2ec.c:
https://review.coreboot.org/c/coreboot/+/68791/comment/a5feb566_6a115a69
PS4, Line 11: 0x2e
> which ones? this is the superio port. D2ADR is not. […]
OK, so it's not the same thing. It would be best to use the PNP infrastructure, see `<device/pnp_ops.h>`.
Also, there's three layers of abstractions: SIO port pair ---> D2ADR/D2DAT ---> I2EC ADDR/DATA registers ---> the actual data. Let's add some helper functions to make this a bit clearer:
```
uint8_t sio_d2_read(pnp_devfn_t dev, uint8_t addr)
{
pnp_write_config(dev, D2ADR, addr);
return pnp_read_config(dev, D2DAT);
}
void sio_d2_write(pnp_devfn_t dev, uint8_t addr, uint8_t val)
{
pnp_write_config(dev, D2ADR, addr);
pnp_write_config(dev, D2DAT, val);
}
uint8_t ec_d2i2ec_read(pnp_devfn_t dev, uint16_t addr)
{
sio_d2_write(dev, I2EC_ADDR_H, addr >> 4 & 0xff);
sio_d2_write(dev, I2EC_ADDR_L, addr >> 0 & 0xff);
return sio_d2_read(dev, I2EC_DATA);
}
void ec_d2i2ec_write(uint16_t addr, uint8_t val)
{
sio_d2_write(dev, I2EC_ADDR_H, addr >> 4 & 0xff);
sio_d2_write(dev, I2EC_ADDR_L, addr >> 0 & 0xff);
sio_d2_write(dev, I2EC_DATA, val);
}
```
File src/ec/clevo/it5570e/i2ec.c:
https://review.coreboot.org/c/coreboot/+/68791/comment/4e62a8e3_1520df78
PS12, Line 17: I2EC_ADDR_H
"Writing" (won't work because `outb(value, port)` arguments are backwards) 2 times to the same register? Is this correct?
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Change subject: drivers/phy/m88e1512: Provide functionality to customize LED status
......................................................................
Patch Set 9:
(1 comment)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163310):
https://review.coreboot.org/c/coreboot/+/69386/comment/1e6d8b6f_a9039382
PS9, Line 14: https://web.archive.org/web/20221109080111/https://www.marvell.com/content/…
Possible unwrapped commit description (prefer a maximum 72 chars per line)
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Change subject: drivers/usb/gadget.c: Add support for EHCI debug using the WCH CH347
......................................................................
Patch Set 4:
(1 comment)
File src/drivers/usb/gadget.c:
https://review.coreboot.org/c/coreboot/+/68264/comment/b4941768_4ed3097b
PS4, Line 215: } __packed;
> I guess what matters here is that those fields are in that order in a contiguous 7 byte area, and th […]
Ack
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Change subject: drivers/phy/m88e1512: Add new driver for Marvell PHY 88E1512
......................................................................
Patch Set 6:
(1 comment)
File src/drivers/phy/m88e1512/m88e1512.c:
https://review.coreboot.org/c/coreboot/+/69384/comment/1557ad5d_af15f2ba
PS5, Line 16:
: dev->ops = &m88e1512_ops;
: }
> you can set ops directly in devicetrees now.
Done. Thanks for the hint.
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Hello build bot (Jenkins), Werner Zeh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69434
to look at the new patch set (#2).
Change subject: mb/siemens/mc_ehl2: Enable Marvell PHY interrupt
......................................................................
mb/siemens/mc_ehl2: Enable Marvell PHY interrupt
On this mainboard Marvell PHY INTn is routed to LED[2] pin.
Change-Id: I28a78afdcf0599bb998f906ce8056a0586e24f33
Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com>
---
M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
1 file changed, 18 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/69434/2
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Change subject: drivers/phy/m88e1512: Add interrupt enable
......................................................................
drivers/phy/m88e1512: Add interrupt enable
INTn on Marvell PHY can be routed to LED[2] pin. This setting must be
made via LED Timer Control Register on page 3.
Change-Id: Ida1efbb604c382676b9d13ac8bf14de768f93637
Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com>
---
M src/drivers/phy/m88e1512/chip.h
M src/drivers/phy/m88e1512/m88e1512.c
M src/drivers/phy/m88e1512/m88e1512.h
3 files changed, 34 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/69433/2
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Hello build bot (Jenkins), Werner Zeh,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#10).
Change subject: mb/siemens/mc_ehl2: Enable Marvell PHY 88E1512 driver
......................................................................
mb/siemens/mc_ehl2: Enable Marvell PHY 88E1512 driver
This mainboard has three Marvel PHYs connected to the internal SOC GbE
controllers. The default LED status after HW reset of this PHYs shows a
different mode than what is needed. LED[2] is not connected on this
mainboard.
This patch sets the following LED status:
LED[0] - 7 = On - 1000 Mbps Link, Off - Else
LED[1] - 1 = On - Link, Blink - Activity, Off - No Link
LED[2] - not connected
TEST=Try different register values to verify LED feature.
Change-Id: I51d817bc720bf787279777f503efdc17dbb1274d
Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com>
---
M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/Kconfig
M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
2 files changed, 62 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/69387/10
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: drivers/phy/m88e1512: Provide functionality to customize LED status
......................................................................
drivers/phy/m88e1512: Provide functionality to customize LED status
For Marvel PHY it could be necessary to customize the shown LED status
at the connector. The LED status can be changed via Function Control
Register on page 3.
Link to the Marvell PHY 88E1512 datasheet:
https://web.archive.org/web/20221109080111/https://www.marvell.com/content/…
Change-Id: Ia71c43f4286f9201f03cb759252ebb405ab81904
Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com>
---
A src/drivers/phy/m88e1512/chip.h
M src/drivers/phy/m88e1512/m88e1512.c
A src/drivers/phy/m88e1512/m88e1512.h
3 files changed, 76 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/69386/9
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