coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[master]: payloads/coreinfo: Reformat code
by Elyes Haouas (Code Review) 13 Nov '22

13 Nov '22

Elyes Haouas has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/61952 ) Change subject: payloads/coreinfo: Reformat code ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/61952 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I575134a4070e08956f8e4dee7677349fd418f2ee Gerrit-Change-Number: 61952 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: abandon

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[S] Change in coreboot[master]: sb/intel/*/early_{pch,init}.c: Use ACPI_EN and GPIO_EN macros
by Elyes Haouas (Code Review) 13 Nov '22

13 Nov '22

Elyes Haouas has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/61870 ) Change subject: sb/intel/*/early_{pch,init}.c: Use ACPI_EN and GPIO_EN macros ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/61870 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9812488f51803300c4bc79e2ad601b0dd8a77f86 Gerrit-Change-Number: 61870 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in coreboot[master]: soc/amd/picasso: add mb_pre_fspm() definition and weak implementation
by Martin L Roth (Code Review) 13 Nov '22

13 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69452 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/amd/picasso: add mb_pre_fspm() definition and weak implementation ...................................................................... soc/amd/picasso: add mb_pre_fspm() definition and weak implementation On newer AMD platforms, mb_pre_fspm() is used to set GPIOs in romstage for PCIe reset (currently set in bootblock) and touchscreen power sequencing (not yet implemented, but will be later in the patch train). Change-Id: Ia422aaa9e80355f9a9f8f850368441e5c8ff6598 Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69452 Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Reviewed-by: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/amd/picasso/fsp_m_params.c M src/soc/amd/picasso/include/soc/platform_descriptors.h 2 files changed, 25 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Jason Glenesk: Looks good to me, approved Martin Roth: Looks good to me, approved diff --git a/src/soc/amd/picasso/fsp_m_params.c b/src/soc/amd/picasso/fsp_m_params.c index 6483394..0be815e 100644 --- a/src/soc/amd/picasso/fsp_m_params.c +++ b/src/soc/amd/picasso/fsp_m_params.c @@ -5,6 +5,7 @@ #include <console/uart.h> #include <device/device.h> #include <fsp/api.h> +#include <soc/platform_descriptors.h> #include <soc/pci_devs.h> #include <soc/fsp.h> #include <types.h> @@ -12,6 +13,8 @@ void __weak mainboard_updm_update(FSP_M_CONFIG *mupd) {} +void __weak mb_pre_fspm(void) {} + void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { FSP_M_CONFIG *mcfg = &mupd->FspmConfig; @@ -69,4 +72,5 @@ mcfg->pspp_policy = config->pspp_policy; mainboard_updm_update(mcfg); + mb_pre_fspm(); } diff --git a/src/soc/amd/picasso/include/soc/platform_descriptors.h b/src/soc/amd/picasso/include/soc/platform_descriptors.h index 2ea35a9..00cd42f 100644 --- a/src/soc/amd/picasso/include/soc/platform_descriptors.h +++ b/src/soc/amd/picasso/include/soc/platform_descriptors.h @@ -27,4 +27,6 @@ const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num, const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num); +void mb_pre_fspm(void); + #endif /* AMD_PICASSO_PLATFORM_DESCRIPTORS_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/69452 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia422aaa9e80355f9a9f8f850368441e5c8ff6598 Gerrit-Change-Number: 69452 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: sb/intel/ibexpeak/early_thermal.c: Reduce difference with bd82x6x
by Elyes Haouas (Code Review) 13 Nov '22

13 Nov '22

Elyes Haouas has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/61664 ) Change subject: sb/intel/ibexpeak/early_thermal.c: Reduce difference with bd82x6x ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/61664 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I470957b395f1010668f1c9d2c2c6ae7cb88e89a7 Gerrit-Change-Number: 61664 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in coreboot[master]: superio/fintek/f71808a: Add VT2 boundary registers
by Martin L Roth (Code Review) 13 Nov '22

13 Nov '22

Attention is currently required from: Ravi Mistry, Felix Held. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62200 ) Change subject: superio/fintek/f71808a: Add VT2 boundary registers ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/62200/comment/c0495889_92054906 PS3, Line 17: http://www.alldatasheet.com/datasheet-pdf/pdf/459085/FINTEK/F81866AD-I.html Please post archive.org link - please make sure the PDF is archived as well. -- To view, visit https://review.coreboot.org/c/coreboot/+/62200 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2f6b50da073cb55e141d6bf5185433c21d3fb554 Gerrit-Change-Number: 62200 Gerrit-PatchSet: 3 Gerrit-Owner: Ravi Mistry Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Ravi Mistry Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Ravi Mistry Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 13 Nov 2022 15:36:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: lib/gnat: Remove unrecognized pragma "Compiler_Unit_Warning"
by Elyes Haouas (Code Review) 13 Nov '22

13 Nov '22

Elyes Haouas has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/67828 ) Change subject: lib/gnat: Remove unrecognized pragma "Compiler_Unit_Warning" ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/67828 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia55304da1e3b2db1532300c4f1a2dd958f1975c4 Gerrit-Change-Number: 67828 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in coreboot[master]: [libgfxinit,libhwbase]: Update to up stream
by Elyes Haouas (Code Review) 13 Nov '22

13 Nov '22

Elyes Haouas has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/68128 ) Change subject: [libgfxinit,libhwbase]: Update to up stream ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/68128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I962b9acd310c596c0b8c312583aefe5dd1f76e49 Gerrit-Change-Number: 68128 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: abandon

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[M] Change in coreboot[master]: [For Test] crossgcc: Update GCC from 11.2 to 12.2
by Elyes Haouas (Code Review) 13 Nov '22

13 Nov '22

Elyes Haouas has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/67821 ) Change subject: [For Test] crossgcc: Update GCC from 11.2 to 12.2 ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/67821 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic02d5680929b56ad357c3a010cff7e1540001911 Gerrit-Change-Number: 67821 Gerrit-PatchSet: 8 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: abandon

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[M] Change in coreboot[master]: util/superiotool: Add SMSC MEC5035
by Martin L Roth (Code Review) 13 Nov '22

13 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69481 ) Change subject: util/superiotool: Add SMSC MEC5035 ...................................................................... util/superiotool: Add SMSC MEC5035 Also comment out the SMSC FDC37M602 which has a conflicting ID and has never had the LDN/register layout anyway. Tested on a Dell Latitude E6400 Change-Id: I5b1900e6ef599c422a1d6eca7a2ac4691d56d874 Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69481 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M util/superiotool/smsc.c 1 file changed, 90 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/util/superiotool/smsc.c b/util/superiotool/smsc.c index 4175d3e..d98424e 100644 --- a/util/superiotool/smsc.c +++ b/util/superiotool/smsc.c @@ -345,8 +345,6 @@ {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x00,0x00,NANA,NANA,EOT}}, {EOT}}}, - {0x46, "FDC37M602", { /* Found in Biostar M6TLD. */ - {EOT}}}, {0x47, "FDC37M60x", { /* TODO: Not yet in sensors-detect */ {EOT}}}, {0x4c, "FDC37B72x", { @@ -987,6 +985,78 @@ EOT}, {EOT}}, {EOT}}}, + /* FIXME: Conflicting ID with MEC5035 + {0x46, "FDC37M602", { Found in Biostar M6TLD. + {EOT}}}, + */ + {0x46, "MEC5035", { + {NOLDN, NULL, + {0x07, 0x20, 0x21, 0x24, EOT}, + {0x00, 0x46, 0x00, 0x00, EOT}}, + {0x1, "Keyboard Controller", + {0x30, EOT}, + {0x00, EOT}}, + {0x6, "UART", + {0x30, 0xF0, EOT}, + {0x00, 0x00, EOT}}, + {0xC, "LPC Interface", + {0x30, + /* IRQ Config */ + 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, + 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, + /* DMA Channel 0 - 7 */ + 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, + 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, + /* BAR configuration Port */ + 0x60, 0x61, 0x62, 0x63, + /* BAR Mailbox Registers */ + 0x64, 0x65, 0x66, 0x67, + /* BAR 8042 Keyboard Interface */ + 0x68, 0x69, 0x6a, 0x6b, + /* BAR ACPI EC Interface 1 */ + 0x6c, 0x6d, 0x6e, 0x6f, + /* BAR ACPI EC Interface 2 */ + 0x70, 0x71, 0x72, 0x73, + /* BAR ACPI EC Interface 3 */ + 0x74, 0x75, 0x76, 0x77, + /* BAR ACPI PM1 Interface */ + 0x78, 0x79, 0x7a, 0x7b, + /* BAR UART */ + 0x7c, 0x7d, 0x7e, 0x7f, + /* BAR Legacy (Fast Keyboard) Interface */ + 0x80, 0x81, 0x82, 0x83, + /* BAR Embedded Flash Interface */ + 0x84, 0x85, 0x86, 0x87, + EOT}, + {0x00, + /* IRQ Config */ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + /* DMA Channel 0 - 7 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* BAR configuration Port */ + 0x01, 0x0C, 0x2e, 0x00, + /* BAR Mailbox Registers */ + 0x01, 0x00, 0x00, 0x00, + /* BAR 8042 Keyboard Interface */ + 0x04, 0x01, 0x60, 0x00, + /* BAR ACPI EC Interface 1 */ + 0x04, 0x02, 0x62, 0x00, + /* BAR ACPI EC Interface 2 */ + 0x07, 0x03, 0x62, 0x00, + /* BAR ACPI EC Interface 3 */ + 0x07, 0x04, 0x62, 0x00, + /* BAR ACPI PM1 Interface */ + 0x07, 0x05, 0x00, 0x00, + /* BAR UART */ + 0x07, 0x06, 0x00, 0x00, + /* BAR Legacy (Fast Keyboard) Interface */ + 0x00, 0x07, 0x92, 0x00, + /* BAR Embedded Flash Interface */ + 0x04, 0x0e, 0x00, 0x00, + EOT}}, + {EOT}}}, {EOT} }; -- To view, visit https://review.coreboot.org/c/coreboot/+/69481 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b1900e6ef599c422a1d6eca7a2ac4691d56d874 Gerrit-Change-Number: 69481 Gerrit-PatchSet: 4 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: util/superiotool: Add Nuvoton NCT6685D/NCT6686D
by Martin L Roth (Code Review) 13 Nov '22

13 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69480 ) Change subject: util/superiotool: Add Nuvoton NCT6685D/NCT6686D ...................................................................... util/superiotool: Add Nuvoton NCT6685D/NCT6686D There doesn't seem to be a datasheet available for the NCT6685D, but there is one for the NCT6686D. The 85D seems to return the same ID as the 86D, and the registers do seem to be returning valid data other than LDN 0xf which returns all 1s. The LDN and register layout appears to be identical to the NCT6687D-W. Tested on a Lenovo ThinkCentre M900 with a NCT6685D. Change-Id: I4de0e7b86422a14ab9ccb15b7571597611d755d5 Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69480 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M util/superiotool/nuvoton.c 1 file changed, 88 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/util/superiotool/nuvoton.c b/util/superiotool/nuvoton.c index ea11393..21d77fd 100644 --- a/util/superiotool/nuvoton.c +++ b/util/superiotool/nuvoton.c @@ -82,6 +82,73 @@ {EOT}}}, {0x1a, "WPCM450", { {EOT}}}, + {0xc73a, "NCT6685D/NCT6686D", { + {NOLDN, "Global Configuration", + {0x10,0x11,0x13,0x14,0x15,0x1a,0x1b,0x1d,0x1e, + 0x1f,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27, + 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2f,EOT}, + {0xff,0xff,0x00,0x00,0x00,0x00,0x10,0x00,0x00, + 0x00,0xc7,0x3a,0x00,0x80,0x67,0x01,0x00,0x3e, + 0x00,0x03,0x0f,0x00,0x00,0x00,MISC,EOT}}, + {0x01, "Parallel Port", + {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x3f,EOT}}, + {0x02, "UART A", + {0x30,0x60,0x61,0x70,0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x00,EOT}}, + {0x03, "UART B, IR", + {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,EOT}}, + {0x05, "Keyboard Controller", + {0x30,0x60,0x61,0x62,0x63,0x70,0x72,0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x83,EOT}}, + {0x06, "CIR", + {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT}, + {0x00,0x00,0x00,0x00,0x08,0x09,0x32,0x00,EOT}}, + {0x07, "GPIO0-7", + {0x30,0x60,0x61,0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5, + 0xe6,0xe7,0xe8,0xe9,0xeb,0xec,0xed,0xee,0xef,0xf0, + 0xf1,EOT}, + {0x00,0x00,0x00,0x00,NANA,NANA,NANA,NANA,NANA,NANA, + NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA, + 0x01,EOT}}, + {0x08, "PORT80 UART", + {0xe0,0xe1,0xe2,0xe3,0xe4,EOT}, + {0x80,0x00,0x00,0x10,0x00,EOT}}, + {0x09, "GPIO8-9, GPIO1-8 Alternate Function", + {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8, + 0xe9,0xea,0xeb,0xec,0xed,0xee,0xef,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}}, + {0x0a, "ACPI", + {0x30,0x60,0x61,0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe6, + 0xe7,0xe8,0xea,0xeb,0xec,0xee,0xf0,0xf1,0xf2,0xf3, + 0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc,EOT}, + {0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, + 0xef,0x80,0x2e,0x00,0x01,0x00,0x00,0x00,0x00,0x00, + 0x0d,0x0d,0x01,0x00,0x04,0x00,0x00,0x00,0x04,EOT}}, + {0x0b, "EC", + {0x30,0x60,0x61,0x70,0xe0,0xe3,0xe4,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}}, + {0x0c, "RTC", + {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8, + 0xe9,0xea,0xeb,0xec,0xed,0xee,0xef,0xf0,EOT}, + {0x00,NANA,NANA,NANA,NANA,NANA,NANA,NANA,0x00,0x00, + 0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x80,EOT}}, + {0x0d, "Deep Sleep, Power Fault", + {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8, + 0xf0,0xf1,0xf3,EOT}, + {0xa0,0x20,0x04,0x05,0x6e,0x00,0x00,0x00,0x88,0x77, + 0x70,0xaa,0x01,EOT}}, + {0x0e, "TACHIN/PWMOUT Assignment", + {0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,0xe9, + 0xea,0xeb,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,EOT}}, + {0x0f, "Function Register", + {0xe3,0xe4,0xe5,0xe8,0xe9,0xea,EOT}, + {0x80,0x01,0x00,0x00,0x00,0x00,EOT}}, + {EOT}}}, {0xd592, "NCT6687D-W", { {NOLDN, "Global Configuration", {0x10,0x11,0x13,0x14,0x15,0x1a,0x1b,0x1d,0x1e, -- To view, visit https://review.coreboot.org/c/coreboot/+/69480 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4de0e7b86422a14ab9ccb15b7571597611d755d5 Gerrit-Change-Number: 69480 Gerrit-PatchSet: 2 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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2015

2014

2013

coreboot-gerrit November 2022