coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[master]: drivers/intel/fsp2_0/hand_off_block: add functions to iterate over HOBs
by Martin L Roth (Code Review) 13 Nov '22

13 Nov '22

Attention is currently required from: Andrey Petrov, Felix Held. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69475 ) Change subject: drivers/intel/fsp2_0/hand_off_block: add functions to iterate over HOBs ...................................................................... Patch Set 1: (1 comment) File src/drivers/intel/fsp2_0/hand_off_block.c: https://review.coreboot.org/c/coreboot/+/69475/comment/2bdd7471_53c13721 PS1, Line 140: while ((*hob_iterator)->type != HOB_TYPE_END_OF_HOB_LIST) { Do we want to add way to exit the loop for these functions in case the hob list is messed up for some reason? -- To view, visit https://review.coreboot.org/c/coreboot/+/69475 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If86dde2a9f41d0ca7941493a92f11b91a77e2ae0 Gerrit-Change-Number: 69475 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 13 Nov 2022 15:48:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: acpi: Update default processor string from decimal to hex
by Martin L Roth (Code Review) 13 Nov '22

13 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69325 ) Change subject: acpi: Update default processor string from decimal to hex ...................................................................... acpi: Update default processor string from decimal to hex Update the default processor sting from decimal to hex to increase the default number of Processor NamedObjects from 100 to 256 ie: CP00-CP99 is now CP00-CPFF This fixes MADT table generation for system up to 256 cores. Signed-off-by: Marc Jones <marcjones(a)sysproconsulting.com> Signed-off-by: Jonathan Zhang <jonzhang(a)meta.com> Change-Id: Id60a39d99fa77d1d89ad655ddecdebcc8a422f74 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69325 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/acpi/Kconfig 1 file changed, 21 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/acpi/Kconfig b/src/acpi/Kconfig index d1051d8..7afff4e 100644 --- a/src/acpi/Kconfig +++ b/src/acpi/Kconfig @@ -8,7 +8,7 @@ config ACPI_CPU_STRING string - default "\\_SB.CP%02d" + default "\\_SB.CP%02X" depends on HAVE_ACPI_TABLES help Sets the ACPI name string in the processor scope as written by -- To view, visit https://review.coreboot.org/c/coreboot/+/69325 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id60a39d99fa77d1d89ad655ddecdebcc8a422f74 Gerrit-Change-Number: 69325 Gerrit-PatchSet: 2 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: inc/dev: Add definitions for Link Capability and Slot Capability
by Martin L Roth (Code Review) 13 Nov '22

13 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69092 ) Change subject: inc/dev: Add definitions for Link Capability and Slot Capability ...................................................................... inc/dev: Add definitions for Link Capability and Slot Capability Add definitions for Link Capability and Slot Capability and these definitions may be used in smbios type 9. Signed-off-by: Tim Chu <Tim.Chu(a)quantatw.com> Change-Id: Id66710d5569a7247d998cab20c2e41f2e67712cb Reviewed-on: https://review.coreboot.org/c/coreboot/+/69092 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/include/device/pci_def.h 1 file changed, 19 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h index 39369f8..59d9905 100644 --- a/src/include/device/pci_def.h +++ b/src/include/device/pci_def.h @@ -422,6 +422,8 @@ #define PCI_EXP_DEVSTA_AUXPD 0x10 /* AUX Power Detected */ #define PCI_EXP_DEVSTA_TRPND 0x20 /* Transactions Pending */ #define PCI_EXP_LNKCAP 12 /* Link Capabilities */ +#define PCI_EXP_LNKCAP_MLS 0x000f /* Maximum Link Speed */ +#define PCI_EXP_LNKCAP_MLW 0x03f0 /* Maximum Link Width */ #define PCI_EXP_LNKCAP_ASPMS 0xc00 /* ASPM Support */ #define PCI_EXP_LNKCAP_L0SEL 0x7000 /* L0s Exit Latency */ #define PCI_EXP_LNKCAP_L1EL 0x38000 /* L1 Exit Latency */ @@ -436,6 +438,7 @@ #define PCI_EXP_LNKSTA_SLC 0x1000 /* Slot Clock Configuration */ #define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ #define PCI_EXP_SLTCAP_HPC 0x0040 /* Hot-Plug Capable */ +#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ #define PCI_EXP_SLTCTL 24 /* Slot Control */ #define PCI_EXP_SLTSTA 26 /* Slot Status */ #define PCI_EXP_RTCTL 28 /* Root Control */ -- To view, visit https://review.coreboot.org/c/coreboot/+/69092 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id66710d5569a7247d998cab20c2e41f2e67712cb Gerrit-Change-Number: 69092 Gerrit-PatchSet: 2 Gerrit-Owner: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: acpi/Kconfig: Remove unused ACPI_EINJ config option
by Elyes Haouas (Code Review) 13 Nov '22

13 Nov '22

Attention is currently required from: Lance Zhao, Tim Wawrzynczak. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68593 ) Change subject: acpi/Kconfig: Remove unused ACPI_EINJ config option ...................................................................... Patch Set 1: -Code-Review -- To view, visit https://review.coreboot.org/c/coreboot/+/68593 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I222478572a9e5efadd6719a164558833298e4c99 Gerrit-Change-Number: 68593 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Comment-Date: Sun, 13 Nov 2022 15:41:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/xeon_sp: lockdown LPC configuration
by Martin L Roth (Code Review) 13 Nov '22

13 Nov '22

Attention is currently required from: Marc Jones, Anjaneya "Reddy" Chagam, Jonathan Zhang, Johnny Lin, Christian Walter, Tim Chu. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68876 ) Change subject: soc/intel/xeon_sp: lockdown LPC configuration ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/68876/comment/c433d5ef_0395dd44 PS1, Line 12: contriol nit: control -- To view, visit https://review.coreboot.org/c/coreboot/+/68876 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e3edc63c0d43b11b0999239ea49304772a05275 Gerrit-Change-Number: 68876 Gerrit-PatchSet: 1 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Sun, 13 Nov 2022 15:40:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: treewide: Use default C language standard
by Elyes Haouas (Code Review) 13 Nov '22

13 Nov '22

Elyes Haouas has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/67751 ) Change subject: treewide: Use default C language standard ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/67751 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iad37a522620ac84f839c4113e51adbf5baaf4eea Gerrit-Change-Number: 67751 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in coreboot[master]: mg/google/zork: Add functionality to set GPIOs in romstage
by Martin L Roth (Code Review) 13 Nov '22

13 Nov '22

Attention is currently required from: Jason Nien, Matt DeVillier, Martin Roth. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69482 ) Change subject: mg/google/zork: Add functionality to set GPIOs in romstage ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h: https://review.coreboot.org/c/coreboot/+/69482/comment/b64e664b_7ffbc688 PS1, Line 26: romstge romstage -- To view, visit https://review.coreboot.org/c/coreboot/+/69482 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If0f626dbc7e601c2f49759e49a0baf027bf25f96 Gerrit-Change-Number: 69482 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Sun, 13 Nov 2022 15:39:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: nb/intel/i945/chip.h: Clean up includes
by Elyes Haouas (Code Review) 13 Nov '22

13 Nov '22

Elyes Haouas has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/61320 ) Change subject: nb/intel/i945/chip.h: Clean up includes ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/61320 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic4e32be1e15af13c464a48afb5f5cff270d909c2 Gerrit-Change-Number: 61320 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in coreboot[master]: [Only for test] Makefile.inc: Use ftrivial-auto-var-init="pattern"
by Elyes Haouas (Code Review) 13 Nov '22

13 Nov '22

Elyes Haouas has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/67756 ) Change subject: [Only for test] Makefile.inc: Use ftrivial-auto-var-init="pattern" ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/67756 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69247be3a32d88f0ed1cb5a48ea0097e8fc166b6 Gerrit-Change-Number: 67756 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in coreboot[master]: mb/google/zork: rename baseboard GPIO table getter for clarity
by Martin L Roth (Code Review) 13 Nov '22

13 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69453 ) Change subject: mb/google/zork: rename baseboard GPIO table getter for clarity ...................................................................... mb/google/zork: rename baseboard GPIO table getter for clarity Rename variant_pcie_gpio_table() to baseboard_pcie_gpio_table(), since the GPIO table comes from the baseboard (and is not overridden by any variant). Drop the __weak qualifier as this function is not overridden. This is similar to the change made for skyrim in CB:67809 Change-Id: Idd8ea3446ab7940b21265a3ed8080ba4029c4ff7 Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69453 Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/google/zork/bootblock.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h 4 files changed, 27 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Martin Roth: Looks good to me, approved diff --git a/src/mainboard/google/zork/bootblock.c b/src/mainboard/google/zork/bootblock.c index 96cbe4d..022a5e0 100644 --- a/src/mainboard/google/zork/bootblock.c +++ b/src/mainboard/google/zork/bootblock.c @@ -12,5 +12,5 @@ gpios = variant_bootblock_gpio_table(&num_gpios, acpi_get_sleep_type()); gpio_configure_pads(gpios, num_gpios); - variant_pcie_gpio_configure(); + baseboard_pcie_gpio_configure(); } diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index 6dc3595..70e456c 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -248,7 +248,7 @@ gpio_set(GPIO_42, 1); } -__weak void variant_pcie_gpio_configure(void) +void baseboard_pcie_gpio_configure(void) { static const struct soc_amd_gpio pcie_gpio_table[] = { /* PCIE_RST1_L - Variable timings (May remove) */ diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index 8d264c8..455684e 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -258,7 +258,7 @@ gpio_set(GPIO_42, 1); } -__weak void variant_pcie_gpio_configure(void) +void baseboard_pcie_gpio_configure(void) { static const struct soc_amd_gpio pcie_gpio_table[] = { /* NVME_AUX_RESET_L */ diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h index 11926d1..c76ca02 100644 --- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h @@ -47,8 +47,8 @@ void variant_bluetooth_update(void); /* Update touchscreen configuration in devicetree during ramstage. */ void variant_touchscreen_update(void); -/* Configure PCIe GPIOs as per variant sequencing requirements. */ -void variant_pcie_gpio_configure(void); +/* Configure PCIe GPIOs as per baseboard sequencing requirements. */ +void baseboard_pcie_gpio_configure(void); /* Per variant FSP-S initialization, default implementation in baseboard and * overridable by the variant. */ -- To view, visit https://review.coreboot.org/c/coreboot/+/69453 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idd8ea3446ab7940b21265a3ed8080ba4029c4ff7 Gerrit-Change-Number: 69453 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit November 2022