coreboot-gerrit November 2022

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[M] Change in coreboot[master]: soc/intel/ehl: Add MDIO operation to TSN GbE device
by Mario Scheithauer (Code Review) 16 Nov '22

16 Nov '22

Attention is currently required from: Mario Scheithauer, Angel Pons, Arthur Heymans, Lean Sheng Tan. Hello build bot (Jenkins), Angel Pons, Lean Sheng Tan, Werner Zeh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69383 to look at the new patch set (#10). Change subject: soc/intel/ehl: Add MDIO operation to TSN GbE device ...................................................................... soc/intel/ehl: Add MDIO operation to TSN GbE device This patch refactors the MDIO access for the TSN GbE device by placing the MDIO read and write functions into mdio_bus_operations struct which is assigned to the .ops_mdio member of the PCI device struct. In this way the MDIO interface of the TSN GbE device is exposed and can be used by other drivers if needed. Change-Id: I5d1b9dd2f2ba8c18291fff314c13f0c3851784aa Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/soc/intel/elkhartlake/include/soc/tsn_gbe.h M src/soc/intel/elkhartlake/tsn_gbe.c 2 files changed, 117 insertions(+), 82 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/69383/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/69383 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5d1b9dd2f2ba8c18291fff314c13f0c3851784aa Gerrit-Change-Number: 69383 Gerrit-PatchSet: 10 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: librem_14: Enable both USB 3.0 lanes of left side USB 3.0 port
by Jonathon Hall (Code Review) 16 Nov '22

16 Nov '22

Jonathon Hall has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69702 ) Change subject: librem_14: Enable both USB 3.0 lanes of left side USB 3.0 port ...................................................................... librem_14: Enable both USB 3.0 lanes of left side USB 3.0 port Fixes using USB-C devices in either orientation on left-side USB-C port. Test: Plug USB-C device in both orientations on left-side USB-C port, check speed with lsusb -t. Change-Id: I9fbc53bb51a5225e92b0b6bb9ced87a0ab90c9ce Signed-off-by: Jonathon Hall <jonathon.hall(a)puri.sm> --- M src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb 1 file changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/69702/1 diff --git a/src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb index b979740..ef35ac0 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb +++ b/src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb @@ -127,6 +127,7 @@ register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-A right register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-A left register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-C right + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC2)" # Type-C left register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC2)" # Type-C left register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Card Reader end -- To view, visit https://review.coreboot.org/c/coreboot/+/69702 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9fbc53bb51a5225e92b0b6bb9ced87a0ab90c9ce Gerrit-Change-Number: 69702 Gerrit-PatchSet: 1 Gerrit-Owner: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: drivers/intel/fsp2_0: add log level parameter to fsp_print_guid
by Felix Held (Code Review) 16 Nov '22

16 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69599 ) Change subject: drivers/intel/fsp2_0: add log level parameter to fsp_print_guid ...................................................................... drivers/intel/fsp2_0: add log level parameter to fsp_print_guid Not all functions that call fsp_print_guid print their output with the BIOS_SPEW log level, so introduce a new log level parameter so that the caller of fsp_print_guid can specify which log level fsp_print_guid should use for printing the GUID. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I3b37afe703f506d4913f95a954368c0eec0f862d Reviewed-on: https://review.coreboot.org/c/coreboot/+/69599 Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/intel/fsp2_0/fsp_timestamp.c M src/drivers/intel/fsp2_0/hand_off_block.c M src/drivers/intel/fsp2_0/hob_display.c M src/drivers/intel/fsp2_0/include/fsp/debug.h M src/soc/intel/xeon_sp/skx/hob_display.c 5 files changed, 29 insertions(+), 9 deletions(-) Approvals: build bot (Jenkins): Verified Nikolai Vyssotski: Looks good to me, but someone else must approve Subrata Banik: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/drivers/intel/fsp2_0/fsp_timestamp.c b/src/drivers/intel/fsp2_0/fsp_timestamp.c index da14db9..d3f5026 100644 --- a/src/drivers/intel/fsp2_0/fsp_timestamp.c +++ b/src/drivers/intel/fsp2_0/fsp_timestamp.c @@ -46,7 +46,7 @@ static void print_guid_record(const struct generic_event_record *rec) { printk(BIOS_INFO, "%5x\t%16llu\t\t", rec->progress_id, TIMESTAMP_MS(rec->timestamp)); - fsp_print_guid(rec->guid); + fsp_print_guid(BIOS_INFO, rec->guid); printk(BIOS_INFO, "\n"); } @@ -55,7 +55,7 @@ size_t str_len = rec->header.length - offsetof(struct generic_event_record, string); printk(BIOS_INFO, "%5x\t%16llu\t\t%*s/", rec->progress_id, TIMESTAMP_MS(rec->timestamp), (int)str_len, rec->string); - fsp_print_guid(rec->guid); + fsp_print_guid(BIOS_INFO, rec->guid); printk(BIOS_INFO, "\n"); } diff --git a/src/drivers/intel/fsp2_0/hand_off_block.c b/src/drivers/intel/fsp2_0/hand_off_block.c index 2ded33699..f0f580b 100644 --- a/src/drivers/intel/fsp2_0/hand_off_block.c +++ b/src/drivers/intel/fsp2_0/hand_off_block.c @@ -190,7 +190,7 @@ return CB_ERR; } -void fsp_print_guid(const void *base) +void fsp_print_guid(int level, const void *base) { uint32_t big; uint16_t mid[2]; @@ -200,7 +200,7 @@ mid[0] = read16(id + 4); mid[1] = read16(id + 6); - printk(BIOS_SPEW, "%08x-%04x-%04x-%02x%02x%02x%02x%02x%02x%02x%02x", + printk(level, "%08x-%04x-%04x-%02x%02x%02x%02x%02x%02x%02x%02x", big, mid[0], mid[1], id[8], id[9], id[10], id[11], id[12], id[13], id[14], id[15]); } @@ -216,7 +216,7 @@ range_entry_init(re, 0, 0, 0); if (fsp_hob_iterator_get_next_guid_resource(&hob_iterator, guid, &fsp_mem) != CB_SUCCESS) { - fsp_print_guid(guid); + fsp_print_guid(BIOS_SPEW, guid); printk(BIOS_SPEW, " not found!\n"); return -1; } diff --git a/src/drivers/intel/fsp2_0/hob_display.c b/src/drivers/intel/fsp2_0/hob_display.c index f21ebfe..9340663 100644 --- a/src/drivers/intel/fsp2_0/hob_display.c +++ b/src/drivers/intel/fsp2_0/hob_display.c @@ -97,7 +97,7 @@ printk(BIOS_SPEW, "\t0x%08llx + 0x%08llx\n", res->addr, res->length); if (!fsp_guid_compare(res->owner_guid, empty_guid)) { printk(BIOS_SPEW, "\tOwner GUID: "); - fsp_print_guid(res->owner_guid); + fsp_print_guid(BIOS_SPEW, res->owner_guid); printk(BIOS_SPEW, " (%s)\n", fsp_get_guid_name(res->owner_guid)); } @@ -159,7 +159,7 @@ res = fsp_hob_header_to_resource(hob); printk(BIOS_SPEW, "\t"); - fsp_print_guid(res->owner_guid); + fsp_print_guid(BIOS_SPEW, res->owner_guid); printk(BIOS_SPEW, ": %s\n", fsp_get_guid_name(res->owner_guid)); /* Some of the SoC FSP specific hobs are of type HOB_TYPE_GUID_EXTENSION */ diff --git a/src/drivers/intel/fsp2_0/include/fsp/debug.h b/src/drivers/intel/fsp2_0/include/fsp/debug.h index b6f982a..044ce95 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/debug.h +++ b/src/drivers/intel/fsp2_0/include/fsp/debug.h @@ -51,7 +51,7 @@ /* FSP debug utility functions */ void fsp_display_upd_value(const char *name, size_t size, uint64_t old, uint64_t new); -void fsp_print_guid(const void *guid); +void fsp_print_guid(int level, const void *guid); void fsp_print_memory_resource_hobs(void); void fsp_print_resource_descriptor(const void *base); const char *fsp_get_hob_type_name(const struct hob_header *hob); diff --git a/src/soc/intel/xeon_sp/skx/hob_display.c b/src/soc/intel/xeon_sp/skx/hob_display.c index efe1038..9c03146 100644 --- a/src/soc/intel/xeon_sp/skx/hob_display.c +++ b/src/soc/intel/xeon_sp/skx/hob_display.c @@ -41,7 +41,7 @@ printk(BIOS_DEBUG, "\tResource type: 0x%x, attribute: 0x%x, addr: 0x%08llx, len: 0x%08llx\n", res->type, res->attribute_type, res->addr, res->length); printk(BIOS_DEBUG, "\tOwner GUID: "); - fsp_print_guid(res->owner_guid); + fsp_print_guid(BIOS_DEBUG, res->owner_guid); printk(BIOS_DEBUG, " (%s)\n", fsp_get_guid_name(res->owner_guid)); if (fsp_guid_compare(res->owner_guid, fsp_hob_iio_uds_guid) == 0) -- To view, visit https://review.coreboot.org/c/coreboot/+/69599 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3b37afe703f506d4913f95a954368c0eec0f862d Gerrit-Change-Number: 69599 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: arch/x86: Disable clang build if using verstage_before_bootblock
by Felix Held (Code Review) 16 Nov '22

16 Nov '22

Attention is currently required from: Martin L Roth. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69701 ) Change subject: arch/x86: Disable clang build if using verstage_before_bootblock ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: uh oh -- To view, visit https://review.coreboot.org/c/coreboot/+/69701 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2653edae0b89f75ef7d06a1be523585ff66a3b89 Gerrit-Change-Number: 69701 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Wed, 16 Nov 2022 14:58:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: arch/x86: Disable clang build if using verstage_before_bootblock
by Matt DeVillier (Code Review) 16 Nov '22

16 Nov '22

Attention is currently required from: Martin L Roth. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69701 ) Change subject: arch/x86: Disable clang build if using verstage_before_bootblock ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69701 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2653edae0b89f75ef7d06a1be523585ff66a3b89 Gerrit-Change-Number: 69701 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Wed, 16 Nov 2022 14:49:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: [do not merge] mb/prodrive/atlas: for testing
by build bot (Jenkins) (Code Review) 16 Nov '22

16 Nov '22

Attention is currently required from: Christian Walter, Angel Pons, Lean Sheng Tan. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67415 ) Change subject: [do not merge] mb/prodrive/atlas: for testing ...................................................................... Patch Set 8: Verified-1 -- To view, visit https://review.coreboot.org/c/coreboot/+/67415 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37c686aacea130c99e8ab2fe984b150a7ad6f82d Gerrit-Change-Number: 67415 Gerrit-PatchSet: 8 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 16 Nov 2022 14:42:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/prodrive/atlas: Disable C-States & cTDP
by Lean Sheng Tan (Code Review) 16 Nov '22

16 Nov '22

Attention is currently required from: Justin van Son, Christian Walter, Maximilian Brune, Lean Sheng Tan, David Milosevic. Hello build bot (Jenkins), Christian Walter, Angel Pons, Maximilian Brune, David Milosevic, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68222 to look at the new patch set (#3). Change subject: mb/prodrive/atlas: Disable C-States & cTDP ...................................................................... mb/prodrive/atlas: Disable C-States & cTDP As Atlas is targeted for industrial use cases: - Disable Configurable TDP - Disable all C-states other than C0/C1 for CPU and package Signed-off-by: Lean Sheng Tan <sheng.tan(a)9elements.com> Change-Id: Iaf1c15ac258c78025420966bf592795b66101d17 --- M src/mainboard/prodrive/atlas/Kconfig M src/mainboard/prodrive/atlas/devicetree.cb M src/mainboard/prodrive/atlas/mainboard.c 3 files changed, 45 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/68222/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68222 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaf1c15ac258c78025420966bf592795b66101d17 Gerrit-Change-Number: 68222 Gerrit-PatchSet: 3 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Attention: Justin van Son <justin.van.son(a)prodrive-technologies.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/amd: Use ioapic helper functions
by Angel Pons (Code Review) 16 Nov '22

16 Nov '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Kyösti Mälkki, Fred Reitberger. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55571 ) Change subject: soc/amd: Use ioapic helper functions ...................................................................... Patch Set 11: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/55571 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifdacc61b72f461ec6bea334fa06651c09a9695d6 Gerrit-Change-Number: 55571 Gerrit-PatchSet: 11 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Wed, 16 Nov 2022 14:38:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/aopen/dxplplusu: Iterate CPUs for ACPI MADT
by Angel Pons (Code Review) 16 Nov '22

16 Nov '22

Attention is currently required from: Kyösti Mälkki. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69526 ) Change subject: mb/aopen/dxplplusu: Iterate CPUs for ACPI MADT ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69526 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I64e5f5ee59859564c31ebb6f73b91d3d36be7d77 Gerrit-Change-Number: 69526 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Wed, 16 Nov 2022 14:38:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: arch/arm/armv7: Don't set gcc specific options for clang builds
by Matt DeVillier (Code Review) 16 Nov '22

16 Nov '22

Attention is currently required from: Martin L Roth, Julius Werner. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69672 ) Change subject: arch/arm/armv7: Don't set gcc specific options for clang builds ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69672 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f91d6ec2db247e901ba9bc41bc4b888bbe43236 Gerrit-Change-Number: 69672 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Wed, 16 Nov 2022 14:37:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit November 2022