coreboot-gerrit November 2022

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[S] Change in coreboot[master]: mb/google/nissa/var/xivu: Update DPTF parameters
by Ian Feng (Code Review) 24 Nov '22

24 Nov '22

Ian Feng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69960 ) Change subject: mb/google/nissa/var/xivu: Update DPTF parameters ...................................................................... mb/google/nissa/var/xivu: Update DPTF parameters Follow the DTT_setting_20221122_V04_PR.xlsx to modify DPTF parameters. 1. Modify TS1 passive policy to 68. BUG=b:249446156 TEST=emerge-nissa coreboot chromeos-bootimage Signed-off-by: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Change-Id: I8539a29cab4863034a2b64d38aef4b772473246d --- M src/mainboard/google/brya/variants/xivu/overridetree.cb 1 file changed, 18 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/69960/1 diff --git a/src/mainboard/google/brya/variants/xivu/overridetree.cb b/src/mainboard/google/brya/variants/xivu/overridetree.cb index 3c45ff4..a868537 100644 --- a/src/mainboard/google/brya/variants/xivu/overridetree.cb +++ b/src/mainboard/google/brya/variants/xivu/overridetree.cb @@ -107,7 +107,7 @@ register "policies.passive" = "{ [0] = DPTF_PASSIVE(CPU, CPU, 90, 5000), [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 77, 5000), - [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 60, 5000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 68, 5000), [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 78, 5000), }" -- To view, visit https://review.coreboot.org/c/coreboot/+/69960 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8539a29cab4863034a2b64d38aef4b772473246d Gerrit-Change-Number: 69960 Gerrit-PatchSet: 1 Gerrit-Owner: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/skyrim/var/frostflow: Enable DPTC support
by Frank Wu (Code Review) 24 Nov '22

24 Nov '22

Attention is currently required from: John Su, Jason Nien, Chris Wang, Martin Roth, Karthik Ramasubramanian. Frank Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69931 ) Change subject: mb/google/skyrim/var/frostflow: Enable DPTC support ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69931 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac7b8789a5189827fe98cb06328d666300841a5c Gerrit-Change-Number: 69931 Gerrit-PatchSet: 1 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 24 Nov 2022 05:45:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/meteorlake: Skip setting D0I3 bit for HECI devices
by Eric Lai (Code Review) 24 Nov '22

24 Nov '22

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69680 ) Change subject: soc/intel/meteorlake: Skip setting D0I3 bit for HECI devices ...................................................................... soc/intel/meteorlake: Skip setting D0I3 bit for HECI devices This patch skips setting D0I3 bit for all HECI devices by FSP. The learning being made from Alder Lake platform showed that the CSE EOP cmd response time is highly nondeterministic and letting the EOP cmd issued by FSP makes the response time even worse. The idea being pursued during Alder Lake platform is to let FSP skip sending the EOP cmd and coreboot sends it at the last minute (late sending of EOP) to ensure there is ample time for CSE to come to a state where the response to the EOP is almost immediate. There were a number of refactoring being done to ensure the EOP cmd can be sent at the later stage. #1: Ensure FSP is not putting those HECI devices into the D0i3. (SoC specific change) #2: Modify the CSE related boot state based operation to allow a proper window for sending late EOP cmd. (Common Code Specific change) The entire refactoring helps us to save ~60ms of boot time. Without those code change EOP sending timestamp as below: 943:after sending EOP to ME 1,248,328(61,954)) With those code change EOP sending timestamp as below: 943:after sending EOP to ME 1,231,660 (2,754) Port of commit d6da4ef69e4e ("soc/intel/alderlake: Skip setting D0I3 bit for HECI devices") to incorporate the #1 which is a SoC specific code change. BUG=none TEST=FSP-S UPD dump suggested `DisableD0I3SettingForHeci` UPD is set to `1`. Excerpt from google/rex coreboot log: [SPEW ] DisableD0I3SettingForHeci : 0x1 Signed-off-by: Kapil Porwal <kapilporwal(a)google.com> Change-Id: I1c3765ce41f192ab5f5ff176e0a2b49b312d18d2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69680 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/soc/intel/meteorlake/fsp_params.c 1 file changed, 55 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Eric Lai: Looks good to me, but someone else must approve diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index 2e1820e..9b42b1f 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -383,6 +383,9 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg, const struct soc_intel_meteorlake_config *config) { + /* Skip setting D0I3 bit for all HECI devices */ + s_cfg->DisableD0I3SettingForHeci = 1; + s_cfg->Hwp = 1; s_cfg->Cx = 1; s_cfg->PsOnEnable = 1; -- To view, visit https://review.coreboot.org/c/coreboot/+/69680 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1c3765ce41f192ab5f5ff176e0a2b49b312d18d2 Gerrit-Change-Number: 69680 Gerrit-PatchSet: 4 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: lib/fmap.c: Show error on fmd flash size mismatch with Kconfig
by Eric Lai (Code Review) 24 Nov '22

24 Nov '22

Attention is currently required from: Shelley Chen, Tarun Tuli, Martin L Roth, Subrata Banik, Julius Werner, Arthur Heymans. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69486 ) Change subject: lib/fmap.c: Show error on fmd flash size mismatch with Kconfig ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: Boot fine with Rex. -- To view, visit https://review.coreboot.org/c/coreboot/+/69486 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ed8e09125567f7c04baca292f102dacee974144 Gerrit-Change-Number: 69486 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 24 Nov 2022 05:31:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/common/acpi: Implement DTTS Proposal
by Dtrain Hsu (Code Review) 24 Nov '22

24 Nov '22

Attention is currently required from: Raul Rangel, Jason Nien, EricKY Cheng, Matt DeVillier, Paul Menzel, Eric Lai, Martin Roth, Tim Van Patten, Eric Peers, Jason Glenesk, Caveh Jalali, Tim Wawrzynczak, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held. Dtrain Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68471 ) Change subject: soc/amd/common/acpi: Implement DTTS Proposal ...................................................................... Patch Set 70: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/68471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 Gerrit-Change-Number: 68471 Gerrit-PatchSet: 70 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: LeilaCY Lin <leilacy_lin(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 24 Nov 2022 05:31:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: Update SPD ID assignment
by Eric Lai (Code Review) 24 Nov '22

24 Nov '22

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69784 ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/brya/var/marasov: Update SPD ID assignment ...................................................................... mb/google/brya/var/marasov: Update SPD ID assignment Adjust SPD ID order DRAM Part Name ID to assign MT62F512M32D2DR-031 WT:B 0 (0000) H9JCNNNBK3MLYR-N6E 1 (0001) MT62F1G32D4DR-031 WT:B 2 (0010) H9JCNNNCP3MLYR-N6E 3 (0011) BUG=b:254365935 BRANCH=None TEST=run part_id_gen to generate SPD id Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com> Change-Id: I3a62cf355508debce387c48d9d089e73763b2bf0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69784 Reviewed-by: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Nick Vaccaro <nvaccaro(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/variants/marasov/memory/Makefile.inc M src/mainboard/google/brya/variants/marasov/memory/dram_id.generated.txt 2 files changed, 31 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Nick Vaccaro: Looks good to me, approved Frank Chu: Looks good to me, but someone else must approve Subrata Banik: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/marasov/memory/Makefile.inc b/src/mainboard/google/brya/variants/marasov/memory/Makefile.inc index 444b95d..ecf9d34 100644 --- a/src/mainboard/google/brya/variants/marasov/memory/Makefile.inc +++ b/src/mainboard/google/brya/variants/marasov/memory/Makefile.inc @@ -6,5 +6,5 @@ SPD_SOURCES = SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 0(0b0000) Parts = MT62F512M32D2DR-031 WT:B SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 1(0b0001) Parts = H9JCNNNBK3MLYR-N6E -SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 4(0b0100) Parts = MT62F1G32D4DR-031 WT:B -SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 5(0b0101) Parts = H9JCNNNCP3MLYR-N6E +SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 2(0b0010) Parts = MT62F1G32D4DR-031 WT:B +SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 3(0b0011) Parts = H9JCNNNCP3MLYR-N6E diff --git a/src/mainboard/google/brya/variants/marasov/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/marasov/memory/dram_id.generated.txt index f752d5f..82e3b33 100644 --- a/src/mainboard/google/brya/variants/marasov/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/marasov/memory/dram_id.generated.txt @@ -6,5 +6,5 @@ DRAM Part Name ID to assign MT62F512M32D2DR-031 WT:B 0 (0000) H9JCNNNBK3MLYR-N6E 1 (0001) -MT62F1G32D4DR-031 WT:B 4 (0100) -H9JCNNNCP3MLYR-N6E 5 (0101) +MT62F1G32D4DR-031 WT:B 2 (0010) +H9JCNNNCP3MLYR-N6E 3 (0011) -- To view, visit https://review.coreboot.org/c/coreboot/+/69784 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a62cf355508debce387c48d9d089e73763b2bf0 Gerrit-Change-Number: 69784 Gerrit-PatchSet: 4 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/rex: Adding cros_gpios to rex
by Eric Lai (Code Review) 24 Nov '22

24 Nov '22

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69924 ) Change subject: mb/google/rex: Adding cros_gpios to rex ...................................................................... mb/google/rex: Adding cros_gpios to rex Adding cros_gpios for crossystem to access WP GPIO BUG=b:258048687 TEST= run FAFT firmware_WriteProtect passed. Signed-off-by: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Change-Id: Ieac1df805c6399aefdc13aae136630d496aacd58 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69924 Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/rex/variants/rex0/gpio.c 1 file changed, 20 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/rex/variants/rex0/gpio.c b/src/mainboard/google/rex/variants/rex0/gpio.c index d8450ee..ecda8bf 100644 --- a/src/mainboard/google/rex/variants/rex0/gpio.c +++ b/src/mainboard/google/rex/variants/rex0/gpio.c @@ -493,6 +493,7 @@ } static const struct cros_gpio cros_gpios[] = { + CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -- To view, visit https://review.coreboot.org/c/coreboot/+/69924 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieac1df805c6399aefdc13aae136630d496aacd58 Gerrit-Change-Number: 69924 Gerrit-PatchSet: 2 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: [WIP] mb/google/nissa/var/craask: Add support for NVMe GPIOs
by Reka Norman (Code Review) 24 Nov '22

24 Nov '22

Attention is currently required from: Tarun Tuli, Kangheui Won, Ren Kuo, Tyler Wang. Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69958 ) Change subject: [WIP] mb/google/nissa/var/craask: Add support for NVMe GPIOs ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/craask/gpio.c: https://review.coreboot.org/c/coreboot/+/69958/comment/a7171549_a63444a4 PS1, Line 15: GPP_D6 > OK. […] If you want to use a shared firmware target, then the pins should be kept as similar as possible between variants. Supporting different pin assignments based on board_id is not something we support in general. nivviks/nirwen was a special case. We can always switch to board_id if really needed in the future, but I think this is fine for now, and we should try to make sure future hardware changes can be supported by fw_config too. -- To view, visit https://review.coreboot.org/c/coreboot/+/69958 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I76a056cddff2246cfb5bb26ddbdfc333b49d9aaf Gerrit-Change-Number: 69958 Gerrit-PatchSet: 1 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 24 Nov 2022 05:26:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Comment-In-Reply-To: Reka Norman <rekanorman(a)chromium.org> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: [WIP] mb/google/nissa/var/craask: Add support for NVMe GPIOs
by Ren Kuo (Code Review) 24 Nov '22

24 Nov '22

Attention is currently required from: Tarun Tuli, Kangheui Won, Reka Norman, Tyler Wang. Ren Kuo has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69958 ) Change subject: [WIP] mb/google/nissa/var/craask: Add support for NVMe GPIOs ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/craask/gpio.c: https://review.coreboot.org/c/coreboot/+/69958/comment/cabc014b_1362fe1b PS1, Line 15: GPP_D6 > It's overriden to SSD_CLKREQ_ODL in fw_config.c. […] OK. But I'm worry about it is not easy to maintain the code if there are following change on hardware. -- To view, visit https://review.coreboot.org/c/coreboot/+/69958 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I76a056cddff2246cfb5bb26ddbdfc333b49d9aaf Gerrit-Change-Number: 69958 Gerrit-PatchSet: 1 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 24 Nov 2022 05:18:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Reka Norman <rekanorman(a)chromium.org> Comment-In-Reply-To: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: [WIP] mb/google/nissa/var/craask: Add support for NVMe GPIOs
by Eric Lai (Code Review) 24 Nov '22

24 Nov '22

Attention is currently required from: Tarun Tuli, Kangheui Won, Reka Norman, Ren Kuo, Tyler Wang. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69958 ) Change subject: [WIP] mb/google/nissa/var/craask: Add support for NVMe GPIOs ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Should work, need make sure HW won't make the gpio duplicate in the follow project. This has a lots series. -- To view, visit https://review.coreboot.org/c/coreboot/+/69958 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I76a056cddff2246cfb5bb26ddbdfc333b49d9aaf Gerrit-Change-Number: 69958 Gerrit-PatchSet: 1 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 24 Nov 2022 05:14:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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