coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: {drivers/wifi, mb/google}: Rename `is_untrusted` to `add_acpi_dma_pro...
by Kapil Porwal (Code Review) 24 Nov '22

24 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Eric Lai. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69937 ) Change subject: {drivers/wifi, mb/google}: Rename `is_untrusted` to `add_acpi_dma_property` ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > oh yes. I think it is okay to use only 1 GUID (i.e. "70d24161-6dd5-4c9e-8070-705531292865") because the support is only available in the downstream kernel (CL:3406512, CL:3538626). -- To view, visit https://review.coreboot.org/c/coreboot/+/69937 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e0829a76a193b0a1e1e0f2b7ce2119bb00dd696 Gerrit-Change-Number: 69937 Gerrit-PatchSet: 2 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 24 Nov 2022 06:03:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: drivers/net/phy/m88e1512: Add downshift enable
by Martin L Roth (Code Review) 24 Nov '22

24 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69853 ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: drivers/net/phy/m88e1512: Add downshift enable ...................................................................... drivers/net/phy/m88e1512: Add downshift enable This patch provides the functionality to enable downshift on Marvell PHY. By setting a downshift counter, the PHY is correspondingly often attempted to establish Gigabit link before the PHY downshifts to the next highest speed. The range is limited to 8 trials. To activate downshift, a software reset must follow to take effect. Change-Id: I4224eab6c1fc13824d53556c80435bc130a13bdb Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69853 Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/net/phy/m88e1512/chip.h M src/drivers/net/phy/m88e1512/m88e1512.c M src/drivers/net/phy/m88e1512/m88e1512.h 3 files changed, 53 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/drivers/net/phy/m88e1512/chip.h b/src/drivers/net/phy/m88e1512/chip.h index 9a3523d..915001a 100644 --- a/src/drivers/net/phy/m88e1512/chip.h +++ b/src/drivers/net/phy/m88e1512/chip.h @@ -8,4 +8,7 @@ unsigned char led_1_ctrl; /* LED[1] Control */ unsigned char led_2_ctrl; /* LED[2] Control */ bool enable_int; /* INTn can be routed to LED[2] pin */ + /* 1x, 2x,...8x is the number of times the PHY attempts to establish Gigabit link + before the PHY downshifts to the next highest speed. */ + unsigned char downshift_cnt; }; diff --git a/src/drivers/net/phy/m88e1512/m88e1512.c b/src/drivers/net/phy/m88e1512/m88e1512.c index a8d1c73..f32991f 100644 --- a/src/drivers/net/phy/m88e1512/m88e1512.c +++ b/src/drivers/net/phy/m88e1512/m88e1512.c @@ -17,6 +17,28 @@ struct drivers_net_phy_m88e1512_config *config = dev->chip_info; uint16_t reg; + /* Enable downshift. */ + if (config->downshift_cnt) { + if (config->downshift_cnt > DOWNSHIFT_CNT_MAX) { + printk(BIOS_INFO, "%s: Downshift counter for %s is too large.\n", + dev_path(dev->bus->dev), dev->chip_ops->name); + } else { + printk(BIOS_DEBUG, "%s: Enable downshift after %d attempts for %s.\n", + dev_path(dev->bus->dev), config->downshift_cnt, + dev->chip_ops->name); + + reg = mdio_read(dev, COPPER_SPEC_CTRL_REG_1); + clrsetbits16(&reg, DOWNSHIFT_CNT_MASK, + DOWNSHIFT_CNT(config->downshift_cnt) | DOWNSHIFT_EN); + mdio_write(dev, COPPER_SPEC_CTRL_REG_1, reg); + + /* Downshift enable requires a software reset to take effect. */ + reg = mdio_read(dev, COPPER_CTRL_REG); + setbits16(&reg, SOFTWARE_RESET); + mdio_write(dev, COPPER_CTRL_REG, reg); + } + } + /* Configure LEDs if requested. */ if (config->configure_leds) { printk(BIOS_DEBUG, "%s: Set a customized LED mode for %s.\n", diff --git a/src/drivers/net/phy/m88e1512/m88e1512.h b/src/drivers/net/phy/m88e1512/m88e1512.h index ca0f756..449cc57 100644 --- a/src/drivers/net/phy/m88e1512/m88e1512.h +++ b/src/drivers/net/phy/m88e1512/m88e1512.h @@ -5,6 +5,15 @@ /* Register layout */ #define PAGE_REG 0x16 +/* Page 0 registers */ +#define COPPER_CTRL_REG 0 +#define SOFTWARE_RESET (1 << 15) +#define COPPER_SPEC_CTRL_REG_1 0x10 +#define DOWNSHIFT_CNT_MASK 0x7000 +#define DOWNSHIFT_CNT_MAX 8 +#define DOWNSHIFT_CNT(cnt) ((cnt - 1) << 12) +#define DOWNSHIFT_EN (1 << 11) +/* Page 3 registers */ #define LED_FUNC_CTRL_REG 0x10 #define LED_FUNC_CTRL_MASK 0x0FFF #define LED_TIMER_CTRL_REG 0x12 -- To view, visit https://review.coreboot.org/c/coreboot/+/69853 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4224eab6c1fc13824d53556c80435bc130a13bdb Gerrit-Change-Number: 69853 Gerrit-PatchSet: 4 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/siemens/mc_ehl2: Enable Marvell PHY interrupt
by Martin L Roth (Code Review) 24 Nov '22

24 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69434 ) ( 10 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/siemens/mc_ehl2: Enable Marvell PHY interrupt ...................................................................... mb/siemens/mc_ehl2: Enable Marvell PHY interrupt On this mainboard Marvell PHY INTn is routed to LED[2] pin. Change-Id: I28a78afdcf0599bb998f906ce8056a0586e24f33 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69434 Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb 1 file changed, 22 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, approved Arthur Heymans: Looks good to me, approved diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index b8ea1b6..8090927 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -189,6 +189,8 @@ register "led_0_ctrl" = "7" # LED[1]: On - Link, Blink - Activity, Off - No Link register "led_1_ctrl" = "1" + # INTn is routed to LED[2] pin + register "enable_int" = "true" device mdio 0 on # PHY address ops m88e1512_ops end @@ -202,6 +204,8 @@ register "led_0_ctrl" = "7" # LED[1]: On - Link, Blink - Activity, Off - No Link register "led_1_ctrl" = "1" + # INTn is routed to LED[2] pin + register "enable_int" = "true" device mdio 1 on # PHY address ops m88e1512_ops end @@ -218,6 +222,8 @@ register "led_0_ctrl" = "7" # LED[1]: On - Link, Blink - Activity, Off - No Link register "led_1_ctrl" = "1" + # INTn is routed to LED[2] pin + register "enable_int" = "true" device mdio 1 on # PHY address ops m88e1512_ops end -- To view, visit https://review.coreboot.org/c/coreboot/+/69434 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28a78afdcf0599bb998f906ce8056a0586e24f33 Gerrit-Change-Number: 69434 Gerrit-PatchSet: 12 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jan Samek <jan.samek(a)siemens.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: drivers/net/phy/m88e1512: Add interrupt enable
by Martin L Roth (Code Review) 24 Nov '22

24 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69433 ) ( 10 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: drivers/net/phy/m88e1512: Add interrupt enable ...................................................................... drivers/net/phy/m88e1512: Add interrupt enable INTn on Marvell PHY can be routed to LED[2] pin. This setting must be made via LED Timer Control Register on page 3. Change-Id: Ida1efbb604c382676b9d13ac8bf14de768f93637 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69433 Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/net/phy/m88e1512/chip.h M src/drivers/net/phy/m88e1512/m88e1512.c M src/drivers/net/phy/m88e1512/m88e1512.h 3 files changed, 35 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/drivers/net/phy/m88e1512/chip.h b/src/drivers/net/phy/m88e1512/chip.h index 36a46e9..9a3523d 100644 --- a/src/drivers/net/phy/m88e1512/chip.h +++ b/src/drivers/net/phy/m88e1512/chip.h @@ -7,4 +7,5 @@ unsigned char led_0_ctrl; /* LED[0] Control */ unsigned char led_1_ctrl; /* LED[1] Control */ unsigned char led_2_ctrl; /* LED[2] Control */ + bool enable_int; /* INTn can be routed to LED[2] pin */ }; diff --git a/src/drivers/net/phy/m88e1512/m88e1512.c b/src/drivers/net/phy/m88e1512/m88e1512.c index d0883bf..a8d1c73 100644 --- a/src/drivers/net/phy/m88e1512/m88e1512.c +++ b/src/drivers/net/phy/m88e1512/m88e1512.c @@ -34,6 +34,22 @@ /* Switch back to page 0. */ switch_page(dev, 0); } + + /* INTn can be routed to LED[2] pin. */ + if (config->enable_int) { + printk(BIOS_DEBUG, "%s: INTn is routed to LED[2] pin %s.\n", + dev_path(dev->bus->dev), dev->chip_ops->name); + + /* Select page 3 to access LED function control register. */ + switch_page(dev, 3); + + reg = mdio_read(dev, LED_TIMER_CTRL_REG); + setbits16(&reg, LED_IRQ_ENABLE); + mdio_write(dev, LED_TIMER_CTRL_REG, reg); + + /* Switch back to page 0. */ + switch_page(dev, 0); + } } struct device_operations m88e1512_ops = { diff --git a/src/drivers/net/phy/m88e1512/m88e1512.h b/src/drivers/net/phy/m88e1512/m88e1512.h index 36e3279..ca0f756 100644 --- a/src/drivers/net/phy/m88e1512/m88e1512.h +++ b/src/drivers/net/phy/m88e1512/m88e1512.h @@ -7,5 +7,7 @@ #define PAGE_REG 0x16 #define LED_FUNC_CTRL_REG 0x10 #define LED_FUNC_CTRL_MASK 0x0FFF +#define LED_TIMER_CTRL_REG 0x12 +#define LED_IRQ_ENABLE (1 << 7) #endif /* _PHY_M88E1512_H_ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/69433 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ida1efbb604c382676b9d13ac8bf14de768f93637 Gerrit-Change-Number: 69433 Gerrit-PatchSet: 12 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: mb/siemens/mc_ehl2: Enable Marvell PHY 88E1512 driver
by Martin L Roth (Code Review) 24 Nov '22

24 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69387 ) ( 18 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/siemens/mc_ehl2: Enable Marvell PHY 88E1512 driver ...................................................................... mb/siemens/mc_ehl2: Enable Marvell PHY 88E1512 driver This mainboard has three Marvel PHYs connected to the internal SOC GbE controllers. The default LED status after HW reset of this PHYs shows a different mode than what is needed. LED[2] is not connected on this mainboard. This patch sets the following LED status: LED[0] - 7 = On - 1000 Mbps Link, Off - Else LED[1] - 1 = On - Link, Blink - Activity, Off - No Link LED[2] - not connected TEST=Try different register values to verify LED feature. Change-Id: I51d817bc720bf787279777f503efdc17dbb1274d Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69387 Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/Kconfig M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb 2 files changed, 66 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, approved Arthur Heymans: Looks good to me, approved diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/Kconfig b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/Kconfig index 00875fb..9e3e9dc 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/Kconfig +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/Kconfig @@ -6,6 +6,7 @@ select DRIVER_INTEL_I210 select SOC_INTEL_COMMON_BLOCK_LPC_COMB_ENABLE select EHL_TSN_DRIVER + select DRIVERS_ETH_PHY_M88E1512 config FMDFILE default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/mc_ehl.fmd" diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index 4dd062c..b8ea1b6 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -181,12 +181,48 @@ device pci 1c.6 on end # RP7 (pcie3 multi VC) device pci 1d.0 off end # Intel PSE IPC (local host to PSE) - device pci 1d.1 on end # Intel PSE Time-Sensitive Networking GbE 0 - device pci 1d.2 on end # Intel PSE Time-Sensitive Networking GbE 1 + device pci 1d.1 on # Intel PSE Time-Sensitive Networking GbE 0 + # Enable external Marvell PHY 88E1512 + chip drivers/net/phy/m88e1512 + register "configure_leds" = "true" + # LED[0]: On - 1000 Mbps Link, Off - Else + register "led_0_ctrl" = "7" + # LED[1]: On - Link, Blink - Activity, Off - No Link + register "led_1_ctrl" = "1" + device mdio 0 on # PHY address + ops m88e1512_ops + end + end + end + device pci 1d.2 on # Intel PSE Time-Sensitive Networking GbE 1 + # Enable external Marvell PHY 88E1512 + chip drivers/net/phy/m88e1512 + register "configure_leds" = "true" + # LED[0]: On - 1000 Mbps Link, Off - Else + register "led_0_ctrl" = "7" + # LED[1]: On - Link, Blink - Activity, Off - No Link + register "led_1_ctrl" = "1" + device mdio 1 on # PHY address + ops m88e1512_ops + end + end + end device pci 1e.0 on end # UART0 device pci 1e.1 on end # UART1 - device pci 1e.4 on end # PCH Time-Sensitive Networking GbE + device pci 1e.4 on # PCH Time-Sensitive Networking GbE + # Enable external Marvell PHY 88E1512 + chip drivers/net/phy/m88e1512 + register "configure_leds" = "true" + # LED[0]: On - 1000 Mbps Link, Off - Else + register "led_0_ctrl" = "7" + # LED[1]: On - Link, Blink - Activity, Off - No Link + register "led_1_ctrl" = "1" + device mdio 1 on # PHY address + ops m88e1512_ops + end + end + end device pci 1f.0 on # eSPI Interface chip drivers/pc80/tpm -- To view, visit https://review.coreboot.org/c/coreboot/+/69387 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51d817bc720bf787279777f503efdc17dbb1274d Gerrit-Change-Number: 69387 Gerrit-PatchSet: 20 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jan Samek <jan.samek(a)siemens.com> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: drivers/net/phy/m88e1512: Provide functionality to customize LED status
by Martin L Roth (Code Review) 24 Nov '22

24 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69386 ) ( 17 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: drivers/net/phy/m88e1512: Provide functionality to customize LED status ...................................................................... drivers/net/phy/m88e1512: Provide functionality to customize LED status For Marvel PHY it could be necessary to customize the shown LED status at the connector. The LED status can be changed via Function Control Register on page 3. Link to the Marvell PHY 88E1512 datasheet: https://web.archive.org/web/20221109080111/https://www.marvell.com/content/… Change-Id: Ia71c43f4286f9201f03cb759252ebb405ab81904 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69386 Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- A src/drivers/net/phy/m88e1512/chip.h M src/drivers/net/phy/m88e1512/m88e1512.c A src/drivers/net/phy/m88e1512/m88e1512.h 3 files changed, 71 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/drivers/net/phy/m88e1512/chip.h b/src/drivers/net/phy/m88e1512/chip.h new file mode 100644 index 0000000..36a46e9 --- /dev/null +++ b/src/drivers/net/phy/m88e1512/chip.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include "m88e1512.h" + +struct drivers_net_phy_m88e1512_config { + bool configure_leds; /* Enable LED customization */ + unsigned char led_0_ctrl; /* LED[0] Control */ + unsigned char led_1_ctrl; /* LED[1] Control */ + unsigned char led_2_ctrl; /* LED[2] Control */ +}; diff --git a/src/drivers/net/phy/m88e1512/m88e1512.c b/src/drivers/net/phy/m88e1512/m88e1512.c index 3f45a10..d0883bf 100644 --- a/src/drivers/net/phy/m88e1512/m88e1512.c +++ b/src/drivers/net/phy/m88e1512/m88e1512.c @@ -1,9 +1,39 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <console/console.h> #include <device/device.h> +#include <device/mdio.h> +#include <device/pci.h> +#include "chip.h" +#include "m88e1512.h" + +static void switch_page(struct device *dev, uint8_t page) +{ + mdio_write(dev, PAGE_REG, page); +} static void m88e1512_init(struct device *dev) { + struct drivers_net_phy_m88e1512_config *config = dev->chip_info; + uint16_t reg; + + /* Configure LEDs if requested. */ + if (config->configure_leds) { + printk(BIOS_DEBUG, "%s: Set a customized LED mode for %s.\n", + dev_path(dev->bus->dev), dev->chip_ops->name); + + /* Select page 3 to access LED function control register. */ + switch_page(dev, 3); + + /* Modify PHY LED mode. */ + reg = mdio_read(dev, LED_FUNC_CTRL_REG); + clrsetbits16(&reg, LED_FUNC_CTRL_MASK, config->led_0_ctrl | + (config->led_1_ctrl << 4) | (config->led_2_ctrl << 8)); + mdio_write(dev, LED_FUNC_CTRL_REG, reg); + + /* Switch back to page 0. */ + switch_page(dev, 0); + } } struct device_operations m88e1512_ops = { diff --git a/src/drivers/net/phy/m88e1512/m88e1512.h b/src/drivers/net/phy/m88e1512/m88e1512.h new file mode 100644 index 0000000..36e3279 --- /dev/null +++ b/src/drivers/net/phy/m88e1512/m88e1512.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _PHY_M88E1512_H_ +#define _PHY_M88E1512_H_ + +/* Register layout */ +#define PAGE_REG 0x16 +#define LED_FUNC_CTRL_REG 0x10 +#define LED_FUNC_CTRL_MASK 0x0FFF + +#endif /* _PHY_M88E1512_H_ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/69386 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia71c43f4286f9201f03cb759252ebb405ab81904 Gerrit-Change-Number: 69386 Gerrit-PatchSet: 19 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: device/mdio: Provide helper functions for read and write
by Martin L Roth (Code Review) 24 Nov '22

24 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69611 ) ( 5 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: device/mdio: Provide helper functions for read and write ...................................................................... device/mdio: Provide helper functions for read and write This patch provides helper functions to read or write a register via the MDIO bus. They can be used from drivers to easily access registers on the MDIO bus. Change-Id: I293d93435d27269a071b4b9b94a1b55307c575a7 Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69611 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/device/mdio.c M src/include/device/mdio.h 2 files changed, 45 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Angel Pons: Looks good to me, approved diff --git a/src/device/mdio.c b/src/device/mdio.c index 9f560e6..39ac40b 100644 --- a/src/device/mdio.c +++ b/src/device/mdio.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <assert.h> #include <console/console.h> #include <device/device.h> #include <device/mdio.h> @@ -14,3 +15,26 @@ return dev->ops->ops_mdio; } + +uint16_t mdio_read(struct device *dev, uint8_t offset) +{ + const struct mdio_bus_operations *mdio_ops; + struct device *parent = dev->bus->dev; + + assert(dev->path.type == DEVICE_PATH_MDIO); + mdio_ops = dev_get_mdio_ops(parent); + if (!mdio_ops) + return 0; + return mdio_ops->read(parent, dev->path.mdio.addr, offset); +} +void mdio_write(struct device *dev, uint8_t offset, uint16_t val) +{ + const struct mdio_bus_operations *mdio_ops; + struct device *parent = dev->bus->dev; + + assert(dev->path.type == DEVICE_PATH_MDIO); + mdio_ops = dev_get_mdio_ops(parent); + if (!mdio_ops) + return; + mdio_ops->write(parent, dev->path.mdio.addr, offset, val); +} diff --git a/src/include/device/mdio.h b/src/include/device/mdio.h index 39e60f5..44ce48b 100644 --- a/src/include/device/mdio.h +++ b/src/include/device/mdio.h @@ -14,4 +14,7 @@ /* Helper for getting mdio operations from a device */ const struct mdio_bus_operations *dev_get_mdio_ops(struct device *dev); +uint16_t mdio_read(struct device *dev, uint8_t offset); +void mdio_write(struct device *dev, uint8_t offset, uint16_t val); + #endif /* __DEVICE_MDIO_H__ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/69611 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I293d93435d27269a071b4b9b94a1b55307c575a7 Gerrit-Change-Number: 69611 Gerrit-PatchSet: 7 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: drivers/net/phy/m88e1512: Add new driver for Marvell PHY 88E1512
by Martin L Roth (Code Review) 24 Nov '22

24 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69384 ) ( 13 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: drivers/net/phy/m88e1512: Add new driver for Marvell PHY 88E1512 ...................................................................... drivers/net/phy/m88e1512: Add new driver for Marvell PHY 88E1512 This driver enables the usage of an external Marvell PHY 88E1512 which should be connected to a SOC internal MAC controller. In a first step it is only the framework of the driver. Functionality will follow with a second patch. Change-Id: I24011860caa7bb206770f9779eb34b689293db10 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69384 Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- A src/drivers/net/phy/m88e1512/Kconfig A src/drivers/net/phy/m88e1512/Makefile.inc A src/drivers/net/phy/m88e1512/m88e1512.c 3 files changed, 42 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, approved Arthur Heymans: Looks good to me, approved diff --git a/src/drivers/net/phy/m88e1512/Kconfig b/src/drivers/net/phy/m88e1512/Kconfig new file mode 100644 index 0000000..24405a5 --- /dev/null +++ b/src/drivers/net/phy/m88e1512/Kconfig @@ -0,0 +1,5 @@ +config DRIVERS_ETH_PHY_M88E1512 + bool + default n + help + Enable support for external Marvell PHY chip 88E1512. diff --git a/src/drivers/net/phy/m88e1512/Makefile.inc b/src/drivers/net/phy/m88e1512/Makefile.inc new file mode 100644 index 0000000..043b3a3 --- /dev/null +++ b/src/drivers/net/phy/m88e1512/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_DRIVERS_ETH_PHY_M88E1512) += m88e1512.c diff --git a/src/drivers/net/phy/m88e1512/m88e1512.c b/src/drivers/net/phy/m88e1512/m88e1512.c new file mode 100644 index 0000000..3f45a10 --- /dev/null +++ b/src/drivers/net/phy/m88e1512/m88e1512.c @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/device.h> + +static void m88e1512_init(struct device *dev) +{ +} + +struct device_operations m88e1512_ops = { + .read_resources = noop_read_resources, + .set_resources = noop_set_resources, + .init = m88e1512_init, +}; + +struct chip_operations drivers_net_phy_m88e1512_ops = { + CHIP_NAME("88E1512") +}; -- To view, visit https://review.coreboot.org/c/coreboot/+/69384 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I24011860caa7bb206770f9779eb34b689293db10 Gerrit-Change-Number: 69384 Gerrit-PatchSet: 15 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: soc/intel/ehl: Add MDIO operation to TSN GbE device
by Martin L Roth (Code Review) 24 Nov '22

24 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69383 ) Change subject: soc/intel/ehl: Add MDIO operation to TSN GbE device ...................................................................... soc/intel/ehl: Add MDIO operation to TSN GbE device This patch refactors the MDIO access for the TSN GbE device by placing the MDIO read and write functions into mdio_bus_operations struct which is assigned to the .ops_mdio member of the PCI device struct. In this way the MDIO interface of the TSN GbE device is exposed and can be used by other drivers if needed. Change-Id: I5d1b9dd2f2ba8c18291fff314c13f0c3851784aa Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69383 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com> --- M src/soc/intel/elkhartlake/include/soc/tsn_gbe.h M src/soc/intel/elkhartlake/tsn_gbe.c 2 files changed, 117 insertions(+), 82 deletions(-) Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, approved diff --git a/src/soc/intel/elkhartlake/include/soc/tsn_gbe.h b/src/soc/intel/elkhartlake/include/soc/tsn_gbe.h index cd9f12e..2b06b4c 100644 --- a/src/soc/intel/elkhartlake/include/soc/tsn_gbe.h +++ b/src/soc/intel/elkhartlake/include/soc/tsn_gbe.h @@ -3,23 +3,24 @@ #ifndef _SOC_ELKHARTLAKE_TSN_GBE_H_ #define _SOC_ELKHARTLAKE_TSN_GBE_H_ +#define GMII_TIMEOUT_MS 20 + +#define MAC_MDIO_ADR 0x200 /* MAC MDIO address register */ +#define MAC_MDIO_ADR_MASK 0x03FF7F0E +#define MAC_PHYAD(pa) (pa << 21) /* Physical Layer address */ +#define MAC_REGAD(rda) (rda << 16) /* Register/Device address */ +#define MAC_CLK_TRAIL_4 (4 << 12) /* 4 trailing clocks */ +#define MAC_CSR_CLK_DIV_102 (1 << 10) /* 100: CSR=150-250 MHz; CSR/102 */ +#define MAC_OP_CMD_WRITE (1 << 2) /* GMII Operation Command Write */ +#define MAC_OP_CMD_READ (3 << 2) /* GMII Operation Command Read */ +#define MAC_GMII_BUSY (1 << 0) /* GMII Busy bit */ +#define MAC_MDIO_DATA 0x204 /* MAC MDIO data register */ + #define MAC_ADDR_LEN 6 #define TSN_MAC_ADD0_HIGH 0x300 /* MAC Address0 High register */ #define TSN_MAC_ADD0_LOW 0x304 /* MAC Address0 Low register */ -#define TSN_GMII_TIMEOUT_MS 20 - -#define TSN_MAC_MDIO_ADR 0x200 /* MAC MDIO Address register */ -#define TSN_MAC_MDIO_ADR_MASK 0x03FF7F0E -#define TSN_MAC_PHYAD(pa) (pa << 21) /* Physical Layer Address */ -#define TSN_MAC_REGAD(rda) (rda << 16) /* Register/Device Address */ -#define TSN_MAC_CLK_TRAIL_4 (4 << 12) /* 4 Trailing Clocks */ -#define TSN_MAC_CSR_CLK_DIV_102 (1 << 10) /* 0100: CSR=150-250 MHz; CSR/102 */ -#define TSN_MAC_OP_CMD_WRITE (1 << 2) /* GMII Operation Command Write */ -#define TSN_MAC_OP_CMD_READ (3 << 2) /* GMII Operation Command Read */ -#define TSN_MAC_GMII_BUSY (1 << 0) /* GMII Busy bit */ - /* MDIO - Adhoc PHY Sublayer Register */ #define TSN_MAC_MDIO_ADHOC_ADR 0x15 /* Global Configuration Register */ @@ -27,14 +28,8 @@ /* PHY to MAC Interrupt Polarity bit */ #define TSN_MAC_PHY2MAC_INTR_POL (1 << 6) -#define TSN_MAC_MDIO_DATA 0x204 /* MAC MDIO Data register */ - /* We need one function we can call to get a MAC address to use. */ /* This function can be coded somewhere else but must exist. */ enum cb_err mainboard_get_mac_address(struct device *dev, uint8_t mac[MAC_ADDR_LEN]); -enum cb_err phy_gmii_ready(void *base); -uint16_t tsn_mdio_read(void *base, uint8_t phy_adr, uint8_t reg_adr); -void tsn_mdio_write(void *base, uint8_t phy_adr, uint8_t reg_adr, uint16_t data); - #endif /* _SOC_ELKHARTLAKE_TSN_GBE_H_ */ diff --git a/src/soc/intel/elkhartlake/tsn_gbe.c b/src/soc/intel/elkhartlake/tsn_gbe.c index b59daaa..6092824 100644 --- a/src/soc/intel/elkhartlake/tsn_gbe.c +++ b/src/soc/intel/elkhartlake/tsn_gbe.c @@ -1,8 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <console/console.h> +#include <delay.h> +#include <device/mdio.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <device/pci_ops.h> #include <intelblocks/lpss.h> #include <soc/soc_chip.h> #include <soc/tsn_gbe.h> @@ -29,74 +32,21 @@ (mac[3] << 24) | (mac[2] << 16) | (mac[1] << 8) | mac[0]); } -enum cb_err phy_gmii_ready(void *base) -{ - struct stopwatch sw; - stopwatch_init_msecs_expire(&sw, TSN_GMII_TIMEOUT_MS); - do { - if (!(read32((base + TSN_MAC_MDIO_ADR)) & TSN_MAC_GMII_BUSY)) - return CB_SUCCESS; - - } while (!stopwatch_expired(&sw)); - - printk(BIOS_ERR, "%s Timeout after %lld msec\n", __func__, - stopwatch_duration_msecs(&sw)); - return CB_ERR; -} - -uint16_t tsn_mdio_read(void *base, uint8_t phy_adr, uint8_t reg_adr) -{ - uint16_t data = 0; - enum cb_err status; - - clrsetbits32(base + TSN_MAC_MDIO_ADR, TSN_MAC_MDIO_ADR_MASK, - TSN_MAC_PHYAD(phy_adr) | TSN_MAC_REGAD(reg_adr) - | TSN_MAC_CLK_TRAIL_4 | TSN_MAC_CSR_CLK_DIV_102 - | TSN_MAC_OP_CMD_READ | TSN_MAC_GMII_BUSY); - - /* Wait for MDIO frame transfer to complete before reading MDIO DATA register */ - status = phy_gmii_ready(base); - if (status == CB_ERR) { - printk(BIOS_ERR, "%s TSN GMII busy. PHY Adr: 0x%x, Reg 0x%x\n", - __func__, phy_adr, reg_adr); - } else { - data = read16(base + TSN_MAC_MDIO_DATA); - printk(BIOS_DEBUG, "%s PHY Adr: 0x%x, Reg: 0x%x , Data: 0x%x\n", - __func__, phy_adr, reg_adr, data); - } - return data; -} - -void tsn_mdio_write(void *base, uint8_t phy_adr, uint8_t reg_adr, uint16_t data) -{ - enum cb_err status; - - write16(base + TSN_MAC_MDIO_DATA, data); - clrsetbits32(base + TSN_MAC_MDIO_ADR, TSN_MAC_MDIO_ADR_MASK, - TSN_MAC_PHYAD(phy_adr) | TSN_MAC_REGAD(reg_adr) - | TSN_MAC_CLK_TRAIL_4 | TSN_MAC_CSR_CLK_DIV_102 - | TSN_MAC_OP_CMD_WRITE | TSN_MAC_GMII_BUSY); - - /* Wait for MDIO frame transfer to complete before do next */ - status = phy_gmii_ready(base); - if (status == CB_ERR) - printk(BIOS_ERR, "%s TSN GMII busy. PHY Adr: 0x%x, Reg 0x%x\n", - __func__, phy_adr, reg_adr); - else - printk(BIOS_DEBUG, "%s PHY Adr: 0x%x, Reg: 0x%x , Data: 0x%x\n", - __func__, phy_adr, reg_adr, data); -} - -static void tsn_set_phy2mac_irq_polarity(void *base, enum tsn_phy_irq_polarity pol) +static void tsn_set_phy2mac_irq_polarity(struct device *dev, enum tsn_phy_irq_polarity pol) { uint16_t gcr_reg; + const struct mdio_bus_operations *mdio_ops; + + mdio_ops = dev_get_mdio_ops(dev); + if (!mdio_ops) + return; if (pol == RISING_EDGE) { /* Read TSN adhoc PHY sublayer register - global configuration register */ - gcr_reg = tsn_mdio_read(base, TSN_MAC_MDIO_ADHOC_ADR, TSN_MAC_MDIO_GCR); + gcr_reg = mdio_ops->read(dev, TSN_MAC_MDIO_ADHOC_ADR, TSN_MAC_MDIO_GCR); gcr_reg |= TSN_MAC_PHY2MAC_INTR_POL; - tsn_mdio_write(base, TSN_MAC_MDIO_ADHOC_ADR, TSN_MAC_MDIO_GCR, gcr_reg); + mdio_ops->write(dev, TSN_MAC_MDIO_ADHOC_ADR, TSN_MAC_MDIO_GCR, gcr_reg); } } @@ -120,17 +70,87 @@ /* Set PHY-to-MAC IRQ polarity according to devicetree */ switch (dev->path.pci.devfn) { case PCH_DEVFN_GBE: - tsn_set_phy2mac_irq_polarity(io_mem_base, config->pch_tsn_phy_irq_edge); + tsn_set_phy2mac_irq_polarity(dev, config->pch_tsn_phy_irq_edge); break; case PCH_DEVFN_PSEGBE0: - tsn_set_phy2mac_irq_polarity(io_mem_base, config->pse_tsn_phy_irq_edge[0]); + tsn_set_phy2mac_irq_polarity(dev, config->pse_tsn_phy_irq_edge[0]); break; case PCH_DEVFN_PSEGBE1: - tsn_set_phy2mac_irq_polarity(io_mem_base, config->pse_tsn_phy_irq_edge[1]); + tsn_set_phy2mac_irq_polarity(dev, config->pse_tsn_phy_irq_edge[1]); break; } } +static enum cb_err phy_gmii_ready(void *base) +{ + struct stopwatch sw; + + stopwatch_init_msecs_expire(&sw, GMII_TIMEOUT_MS); + do { + if (!(read32((base + MAC_MDIO_ADR)) & MAC_GMII_BUSY)) + return CB_SUCCESS; + mdelay(1); + } while (!stopwatch_expired(&sw)); + + printk(BIOS_ERR, "%s Timeout after %lld msec\n", __func__, + stopwatch_duration_msecs(&sw)); + return CB_ERR; +} + +static uint16_t tsn_mdio_read(struct device *dev, uint8_t phy_adr, uint8_t reg_adr) +{ + uint16_t data = 0; + struct resource *gbe_tsn_res = find_resource(dev, PCI_BASE_ADDRESS_0); + void *mmio_base = res2mmio(gbe_tsn_res, 0, 0); + + if (!mmio_base) + return data; + + clrsetbits32(mmio_base + MAC_MDIO_ADR, MAC_MDIO_ADR_MASK, + MAC_PHYAD(phy_adr) | MAC_REGAD(reg_adr) + | MAC_CLK_TRAIL_4 | MAC_CSR_CLK_DIV_102 + | MAC_OP_CMD_READ | MAC_GMII_BUSY); + + /* Wait for MDIO frame transfer to complete before reading MDIO DATA register. */ + if (phy_gmii_ready(mmio_base) != CB_SUCCESS) { + printk(BIOS_ERR, "%s TSN GMII busy. PHY Adr: 0x%x, Reg 0x%x\n", + __func__, phy_adr, reg_adr); + } else { + data = read16(mmio_base + MAC_MDIO_DATA); + printk(BIOS_SPEW, "%s PHY Adr: 0x%x, Reg: 0x%x , Data: 0x%x\n", + __func__, phy_adr, reg_adr, data); + } + return data; +} + +static void tsn_mdio_write(struct device *dev, uint8_t phy_adr, uint8_t reg_adr, uint16_t data) +{ + struct resource *gbe_tsn_res = find_resource(dev, PCI_BASE_ADDRESS_0); + void *mmio_base = res2mmio(gbe_tsn_res, 0, 0); + + if (!mmio_base) + return; + + write16(mmio_base + MAC_MDIO_DATA, data); + clrsetbits32(mmio_base + MAC_MDIO_ADR, MAC_MDIO_ADR_MASK, + MAC_PHYAD(phy_adr) | MAC_REGAD(reg_adr) + | MAC_CLK_TRAIL_4 | MAC_CSR_CLK_DIV_102 + | MAC_OP_CMD_WRITE | MAC_GMII_BUSY); + + /* Wait for MDIO frame transfer to complete before exit. */ + if (phy_gmii_ready(mmio_base) != CB_SUCCESS) + printk(BIOS_ERR, "%s TSN GMII busy. PHY Adr: 0x%x, Reg 0x%x\n", + __func__, phy_adr, reg_adr); + else + printk(BIOS_SPEW, "%s PHY Adr: 0x%x, Reg: 0x%x , Data: 0x%x\n", + __func__, phy_adr, reg_adr, data); +} + +static struct mdio_bus_operations mdio_ops = { + .read = tsn_mdio_read, + .write = tsn_mdio_write, +}; + static struct device_operations gbe_tsn_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, @@ -138,6 +158,7 @@ .scan_bus = scan_generic_bus, .enable = gbe_tsn_enable, .init = gbe_tsn_init, + .ops_mdio = &mdio_ops, }; static const unsigned short gbe_tsn_device_ids[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/69383 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5d1b9dd2f2ba8c18291fff314c13f0c3851784aa Gerrit-Change-Number: 69383 Gerrit-PatchSet: 14 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[L] Change in coreboot[master]: src/device + util/sconfig: Introduce new device 'mdio'
by Martin L Roth (Code Review) 24 Nov '22

24 Nov '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69382 ) Change subject: src/device + util/sconfig: Introduce new device 'mdio' ...................................................................... src/device + util/sconfig: Introduce new device 'mdio' This patch extends the available device paths with a new device 'mdio'. MDIO is the 'Management Data Input/Output' called interface which is used to access an Ethernet PHY behind a MAC to change settings. The real payload data path is not handled by this interface. To address the PHY correctly on the MDIO bus, there is a 5 bit address needed, which often can be configured via pins on the mainboard. Therefore, the new introduced device has an 'addr' field to define its address. If one wants to use a MDIO device in devicetree, the syntax is straight forward (example): device mdio 0x2 on end As the MDIO interface is driven by the MAC, most likely this MDIO device will be hooked in as a child device of the (PCI attached) MAC device. With the new introduced ops_mdio a new interface is added to provide an API for read and write access over MDIO. Change-Id: I6691f92c4233bc30afc9029840b06f74bb1eb4b2 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69382 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/device/Makefile.inc M src/device/device_const.c M src/device/device_util.c A src/device/mdio.c M src/include/device/device.h A src/include/device/mdio.h M src/include/device/path.h M util/sconfig/lex.yy.c_shipped M util/sconfig/main.c M util/sconfig/sconfig.l M util/sconfig/sconfig.tab.c_shipped M util/sconfig/sconfig.tab.h_shipped M util/sconfig/sconfig.y 13 files changed, 357 insertions(+), 259 deletions(-) Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, but someone else must approve Arthur Heymans: Looks good to me, approved Angel Pons: Looks good to me, approved diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc index 28acd73..3018ef9 100644 --- a/src/device/Makefile.inc +++ b/src/device/Makefile.inc @@ -64,3 +64,4 @@ ramstage-$(CONFIG_XHCI_UTILS) += xhci.c ramstage-y += gpio.c +ramstage-y += mdio.c diff --git a/src/device/device_const.c b/src/device/device_const.c index a40d0b0..a63a629 100644 --- a/src/device/device_const.c +++ b/src/device/device_const.c @@ -147,6 +147,10 @@ case DEVICE_PATH_GPIO: equal = (path1->gpio.id == path2->gpio.id); break; + case DEVICE_PATH_MDIO: + equal = (path1->mdio.addr == path2->mdio.addr); + break; + default: printk(BIOS_ERR, "Unknown device type: %d\n", path1->type); break; diff --git a/src/device/device_util.c b/src/device/device_util.c index 9beb2ce..c5e03f2 100644 --- a/src/device/device_util.c +++ b/src/device/device_util.c @@ -135,6 +135,9 @@ case DEVICE_PATH_GPIO: ret |= dev->path.gpio.id; break; + case DEVICE_PATH_MDIO: + ret |= dev->path.mdio.addr; + break; case DEVICE_PATH_NONE: case DEVICE_PATH_MMIO: /* don't care */ default: @@ -223,6 +226,9 @@ case DEVICE_PATH_GPIO: snprintf(buffer, sizeof(buffer), "GPIO: %d", dev->path.gpio.id); break; + case DEVICE_PATH_MDIO: + snprintf(buffer, sizeof(buffer), "MDIO: %02x", dev->path.mdio.addr); + break; default: printk(BIOS_ERR, "Unknown device path type: %d\n", dev->path.type); diff --git a/src/device/mdio.c b/src/device/mdio.c new file mode 100644 index 0000000..9f560e6 --- /dev/null +++ b/src/device/mdio.c @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <device/device.h> +#include <device/mdio.h> +#include <stddef.h> + +const struct mdio_bus_operations *dev_get_mdio_ops(struct device *dev) +{ + if (!dev || !dev->ops || !dev->ops->ops_mdio) { + printk(BIOS_ERR, "Could not get MDIO operations.\n"); + return NULL; + } + + return dev->ops->ops_mdio; +} diff --git a/src/include/device/device.h b/src/include/device/device.h index 0f9c39f..8b1dde1 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -20,6 +20,7 @@ struct spi_bus_operations; struct usb_bus_operations; struct gpio_operations; +struct mdio_bus_operations; /* Chip operations */ struct chip_operations { @@ -67,6 +68,7 @@ const struct smbus_bus_operations *ops_smbus_bus; const struct pnp_mode_ops *ops_pnp_mode; const struct gpio_operations *ops_gpio; + const struct mdio_bus_operations *ops_mdio; }; /** diff --git a/src/include/device/mdio.h b/src/include/device/mdio.h new file mode 100644 index 0000000..39e60f5 --- /dev/null +++ b/src/include/device/mdio.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __DEVICE_MDIO_H__ +#define __DEVICE_MDIO_H__ + +#include <device/device.h> +#include <types.h> + +struct mdio_bus_operations { + uint16_t (*read)(struct device *dev, uint8_t phy_adr, uint8_t reg_adr); + void (*write)(struct device *dev, uint8_t phy_adr, uint8_t reg_adr, uint16_t data); +}; + +/* Helper for getting mdio operations from a device */ +const struct mdio_bus_operations *dev_get_mdio_ops(struct device *dev); + +#endif /* __DEVICE_MDIO_H__ */ diff --git a/src/include/device/path.h b/src/include/device/path.h index 1be7e72..28c932a 100644 --- a/src/include/device/path.h +++ b/src/include/device/path.h @@ -22,6 +22,7 @@ DEVICE_PATH_USB, DEVICE_PATH_MMIO, DEVICE_PATH_GPIO, + DEVICE_PATH_MDIO, /* * When adding path types to this table, please also update the @@ -46,6 +47,7 @@ "DEVICE_PATH_USB", \ "DEVICE_PATH_MMIO", \ "DEVICE_PATH_GPIO", \ + "DEVICE_PATH_MDIO", \ } struct domain_path { @@ -112,6 +114,10 @@ unsigned int id; }; +struct mdio_path { + unsigned int addr; +}; + struct device_path { enum device_path_type type; union { @@ -129,6 +135,7 @@ struct usb_path usb; struct mmio_path mmio; struct gpio_path gpio; + struct mdio_path mdio; }; }; diff --git a/util/sconfig/lex.yy.c_shipped b/util/sconfig/lex.yy.c_shipped index 3e2bb15..479366d 100644 --- a/util/sconfig/lex.yy.c_shipped +++ b/util/sconfig/lex.yy.c_shipped @@ -349,8 +349,8 @@ (yy_hold_char) = *yy_cp; \ *yy_cp = '\0'; \ (yy_c_buf_p) = yy_cp; -#define YY_NUM_RULES 51 -#define YY_END_OF_BUFFER 52 +#define YY_NUM_RULES 52 +#define YY_END_OF_BUFFER 53 /* This struct is not used in this scanner, but its presence is necessary. */ struct yy_trans_info @@ -358,31 +358,32 @@ flex_int32_t yy_verify; flex_int32_t yy_nxt; }; -static const flex_int16_t yy_accept[211] = +static const flex_int16_t yy_accept[214] = { 0, - 0, 0, 52, 50, 1, 3, 50, 50, 50, 45, - 45, 42, 46, 50, 46, 46, 46, 46, 46, 50, - 50, 50, 50, 50, 50, 50, 50, 50, 50, 43, - 50, 1, 3, 50, 0, 50, 50, 0, 2, 45, - 46, 50, 50, 50, 10, 50, 50, 46, 50, 50, - 50, 50, 50, 50, 50, 50, 50, 50, 35, 50, - 50, 50, 50, 50, 16, 50, 50, 50, 50, 50, - 50, 50, 50, 50, 49, 49, 50, 0, 44, 50, - 50, 50, 26, 50, 50, 34, 39, 50, 50, 50, - 50, 50, 23, 50, 50, 33, 50, 50, 50, 17, + 0, 0, 53, 51, 1, 3, 51, 51, 51, 46, + 46, 43, 47, 51, 47, 47, 47, 47, 47, 51, + 51, 51, 51, 51, 51, 51, 51, 51, 51, 44, + 51, 1, 3, 51, 0, 51, 51, 0, 2, 46, + 47, 51, 51, 51, 10, 51, 51, 47, 51, 51, + 51, 51, 51, 51, 51, 51, 51, 51, 36, 51, + 51, 51, 51, 51, 51, 16, 51, 51, 51, 51, + 51, 51, 51, 51, 51, 50, 50, 51, 0, 45, + 51, 51, 51, 26, 51, 51, 35, 40, 51, 51, + 51, 51, 51, 23, 51, 51, 34, 51, 51, 51, - 7, 50, 20, 22, 50, 9, 50, 50, 30, 50, - 31, 8, 50, 0, 47, 50, 4, 50, 50, 50, - 50, 50, 50, 32, 50, 50, 50, 50, 50, 29, - 50, 50, 50, 50, 50, 48, 48, 6, 50, 50, - 50, 13, 50, 50, 50, 50, 50, 24, 50, 50, - 15, 50, 50, 50, 50, 5, 27, 50, 50, 18, - 50, 21, 50, 14, 50, 50, 50, 50, 50, 28, - 37, 50, 50, 50, 50, 50, 50, 50, 50, 50, - 11, 50, 50, 50, 50, 12, 50, 19, 50, 50, - 50, 50, 36, 50, 50, 50, 25, 50, 50, 38, + 51, 17, 7, 51, 20, 22, 51, 9, 51, 51, + 30, 51, 31, 8, 51, 0, 48, 51, 4, 51, + 51, 51, 51, 51, 51, 32, 51, 51, 51, 51, + 51, 33, 29, 51, 51, 51, 51, 51, 49, 49, + 6, 51, 51, 51, 13, 51, 51, 51, 51, 51, + 24, 51, 51, 15, 51, 51, 51, 51, 5, 27, + 51, 51, 18, 51, 21, 51, 14, 51, 51, 51, + 51, 51, 28, 38, 51, 51, 51, 51, 51, 51, + 51, 51, 51, 11, 51, 51, 51, 51, 12, 51, + 19, 51, 51, 51, 51, 37, 51, 51, 51, 25, - 50, 50, 50, 50, 50, 50, 41, 50, 40, 0 + 51, 51, 39, 51, 51, 51, 51, 51, 51, 42, + 51, 41, 0 } ; static const YY_CHAR yy_ec[256] = @@ -425,140 +426,140 @@ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } ; -static const flex_int16_t yy_base[218] = +static const flex_int16_t yy_base[221] = { 0, - 0, 0, 283, 0, 280, 284, 278, 39, 43, 40, - 242, 0, 46, 265, 56, 60, 64, 67, 72, 56, - 253, 74, 260, 39, 70, 59, 255, 77, 242, 0, - 0, 272, 284, 108, 268, 112, 116, 269, 284, 0, - 113, 116, 256, 245, 0, 244, 233, 122, 240, 235, - 245, 243, 247, 234, 236, 240, 240, 234, 240, 225, - 225, 226, 228, 230, 0, 106, 226, 220, 220, 119, - 230, 222, 228, 87, 0, 284, 141, 240, 0, 233, - 226, 212, 225, 215, 222, 0, 0, 212, 218, 215, - 206, 214, 0, 212, 202, 0, 206, 210, 200, 0, + 0, 0, 286, 0, 283, 287, 281, 39, 43, 40, + 245, 0, 46, 268, 56, 60, 64, 67, 72, 56, + 256, 74, 263, 71, 77, 82, 258, 81, 245, 0, + 0, 275, 287, 110, 271, 115, 119, 272, 287, 0, + 116, 119, 259, 248, 0, 247, 236, 125, 243, 238, + 248, 246, 250, 237, 239, 243, 243, 237, 243, 228, + 228, 229, 231, 230, 232, 0, 109, 228, 222, 222, + 122, 232, 224, 230, 128, 0, 287, 145, 242, 0, + 235, 228, 214, 227, 217, 224, 0, 0, 214, 220, + 217, 208, 216, 0, 214, 204, 0, 208, 212, 202, - 0, 203, 0, 0, 209, 0, 201, 200, 0, 191, - 0, 0, 218, 217, 0, 188, 0, 201, 200, 193, - 197, 187, 183, 0, 193, 181, 187, 192, 193, 0, - 180, 187, 174, 177, 166, 0, 284, 0, 178, 182, - 174, 0, 173, 175, 171, 173, 178, 0, 162, 167, - 0, 160, 160, 159, 156, 0, 0, 168, 170, 0, - 154, 171, 157, 0, 164, 168, 149, 149, 156, 0, - 0, 155, 147, 146, 68, 156, 142, 152, 142, 134, - 0, 151, 145, 130, 135, 0, 124, 0, 118, 124, - 127, 119, 0, 134, 115, 128, 0, 122, 129, 0, + 201, 0, 0, 204, 0, 0, 210, 0, 202, 201, + 0, 192, 0, 0, 219, 218, 0, 189, 0, 202, + 201, 194, 198, 188, 184, 0, 194, 182, 188, 193, + 194, 0, 0, 181, 188, 175, 178, 167, 0, 287, + 0, 179, 183, 175, 0, 174, 176, 172, 174, 179, + 0, 163, 168, 0, 161, 161, 160, 157, 0, 0, + 169, 171, 0, 155, 172, 158, 0, 165, 169, 150, + 150, 157, 0, 0, 156, 148, 147, 23, 157, 143, + 153, 143, 135, 0, 139, 133, 131, 136, 0, 125, + 0, 119, 125, 128, 120, 0, 135, 101, 109, 0, - 104, 106, 94, 78, 65, 37, 0, 31, 0, 284, - 42, 158, 160, 162, 164, 166, 168 + 94, 88, 0, 72, 74, 70, 66, 49, 37, 0, + 47, 0, 287, 49, 161, 163, 165, 167, 169, 171 } ; -static const flex_int16_t yy_def[218] = +static const flex_int16_t yy_def[221] = { 0, - 210, 1, 210, 211, 210, 210, 211, 212, 213, 211, - 10, 211, 10, 211, 10, 10, 10, 10, 10, 211, - 211, 211, 211, 211, 211, 211, 211, 211, 211, 211, - 211, 210, 210, 212, 214, 215, 213, 216, 210, 10, - 10, 10, 211, 211, 211, 211, 211, 10, 211, 211, - 211, 211, 211, 211, 211, 211, 211, 211, 211, 211, - 211, 211, 211, 211, 211, 211, 211, 211, 211, 211, - 211, 211, 211, 211, 211, 210, 215, 217, 42, 211, - 211, 211, 211, 211, 211, 211, 211, 211, 211, 211, - 211, 211, 211, 211, 211, 211, 211, 211, 211, 211, + 213, 1, 213, 214, 213, 213, 214, 215, 216, 214, + 10, 214, 10, 214, 10, 10, 10, 10, 10, 214, + 214, 214, 214, 214, 214, 214, 214, 214, 214, 214, + 214, 213, 213, 215, 217, 218, 216, 219, 213, 10, + 10, 10, 214, 214, 214, 214, 214, 10, 214, 214, + 214, 214, 214, 214, 214, 214, 214, 214, 214, 214, + 214, 214, 214, 214, 214, 214, 214, 214, 214, 214, + 214, 214, 214, 214, 214, 214, 213, 218, 220, 42, + 214, 214, 214, 214, 214, 214, 214, 214, 214, 214, + 214, 214, 214, 214, 214, 214, 214, 214, 214, 214, - 211, 211, 211, 211, 211, 211, 211, 211, 211, 211, - 211, 211, 211, 210, 211, 211, 211, 211, 211, 211, - 211, 211, 211, 211, 211, 211, 211, 211, 211, 211, - 211, 211, 211, 211, 211, 211, 210, 211, 211, 211, - 211, 211, 211, 211, 211, 211, 211, 211, 211, 211, - 211, 211, 211, 211, 211, 211, 211, 211, 211, 211, - 211, 211, 211, 211, 211, 211, 211, 211, 211, 211, - 211, 211, 211, 211, 211, 211, 211, 211, 211, 211, - 211, 211, 211, 211, 211, 211, 211, 211, 211, 211, - 211, 211, 211, 211, 211, 211, 211, 211, 211, 211, + 214, 214, 214, 214, 214, 214, 214, 214, 214, 214, + 214, 214, 214, 214, 214, 213, 214, 214, 214, 214, + 214, 214, 214, 214, 214, 214, 214, 214, 214, 214, + 214, 214, 214, 214, 214, 214, 214, 214, 214, 213, + 214, 214, 214, 214, 214, 214, 214, 214, 214, 214, + 214, 214, 214, 214, 214, 214, 214, 214, 214, 214, + 214, 214, 214, 214, 214, 214, 214, 214, 214, 214, + 214, 214, 214, 214, 214, 214, 214, 214, 214, 214, + 214, 214, 214, 214, 214, 214, 214, 214, 214, 214, + 214, 214, 214, 214, 214, 214, 214, 214, 214, 214, - 211, 211, 211, 211, 211, 211, 211, 211, 211, 0, - 210, 210, 210, 210, 210, 210, 210 + 214, 214, 214, 214, 214, 214, 214, 214, 214, 214, + 214, 214, 0, 213, 213, 213, 213, 213, 213, 213 } ; -static const flex_int16_t yy_nxt[325] = +static const flex_int16_t yy_nxt[328] = { 0, 4, 5, 6, 7, 8, 9, 10, 11, 10, 12, 13, 13, 14, 4, 4, 4, 15, 13, 16, 17, 18, 19, 20, 21, 22, 23, 24, 4, 25, 26, 4, 27, 28, 4, 29, 4, 4, 4, 4, 30, - 35, 35, 31, 36, 38, 39, 40, 40, 40, 209, - 41, 41, 41, 41, 41, 62, 41, 41, 41, 41, - 41, 41, 41, 41, 41, 63, 41, 41, 41, 208, - 41, 41, 41, 41, 41, 41, 54, 67, 41, 41, - 41, 44, 57, 46, 48, 55, 68, 182, 45, 47, - 69, 64, 49, 207, 51, 50, 52, 65, 206, 66, + 35, 35, 185, 36, 38, 39, 40, 40, 40, 31, + 41, 41, 41, 41, 41, 186, 41, 41, 41, 41, + 41, 41, 41, 41, 41, 212, 41, 41, 41, 211, + 41, 41, 41, 41, 41, 41, 54, 210, 41, 41, + 41, 44, 57, 46, 48, 55, 209, 62, 45, 47, + 63, 208, 49, 207, 51, 50, 52, 64, 65, 206, - 183, 58, 59, 71, 111, 60, 72, 112, 53, 35, - 35, 73, 75, 78, 78, 205, 31, 38, 39, 41, - 41, 41, 79, 79, 79, 204, 79, 79, 41, 41, - 41, 203, 79, 79, 79, 79, 79, 79, 101, 102, - 106, 107, 78, 78, 202, 113, 201, 200, 199, 198, - 197, 196, 195, 194, 193, 192, 191, 84, 34, 34, - 37, 37, 35, 35, 77, 77, 38, 38, 78, 78, - 190, 189, 188, 187, 186, 185, 184, 181, 180, 179, - 178, 177, 176, 175, 174, 173, 172, 171, 170, 169, - 168, 167, 166, 165, 164, 163, 162, 161, 160, 159, + 68, 58, 59, 205, 66, 60, 67, 72, 53, 69, + 73, 35, 35, 70, 76, 74, 79, 79, 204, 31, + 38, 39, 41, 41, 41, 80, 80, 80, 203, 80, + 80, 41, 41, 41, 202, 80, 80, 80, 80, 80, + 80, 103, 104, 108, 109, 113, 79, 79, 114, 115, + 201, 200, 199, 198, 197, 196, 195, 194, 193, 192, + 85, 34, 34, 37, 37, 35, 35, 78, 78, 38, + 38, 79, 79, 191, 190, 189, 188, 187, 184, 183, + 182, 181, 180, 179, 178, 177, 176, 175, 174, 173, + 172, 171, 170, 169, 168, 167, 166, 165, 164, 163, - 158, 157, 156, 155, 154, 153, 152, 151, 150, 149, - 148, 147, 146, 145, 144, 143, 142, 141, 140, 139, - 138, 137, 136, 135, 134, 133, 132, 131, 130, 129, - 128, 127, 126, 125, 124, 123, 122, 121, 120, 119, - 118, 117, 116, 115, 114, 110, 109, 108, 105, 104, - 103, 100, 99, 98, 97, 96, 95, 94, 93, 92, - 91, 90, 89, 88, 87, 86, 85, 83, 82, 81, - 80, 39, 76, 32, 74, 70, 61, 56, 43, 42, - 33, 32, 210, 3, 210, 210, 210, 210, 210, 210, - 210, 210, 210, 210, 210, 210, 210, 210, 210, 210, + 162, 161, 160, 159, 158, 157, 156, 155, 154, 153, + 152, 151, 150, 149, 148, 147, 146, 145, 144, 143, + 142, 141, 140, 139, 138, 137, 136, 135, 134, 133, + 132, 131, 130, 129, 128, 127, 126, 125, 124, 123, + 122, 121, 120, 119, 118, 117, 116, 112, 111, 110, + 107, 106, 105, 102, 101, 100, 99, 98, 97, 96, + 95, 94, 93, 92, 91, 90, 89, 88, 87, 86, + 84, 83, 82, 81, 39, 77, 32, 75, 71, 61, + 56, 43, 42, 33, 32, 213, 3, 213, 213, 213, + 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, - 210, 210, 210, 210, 210, 210, 210, 210, 210, 210, - 210, 210, 210, 210, 210, 210, 210, 210, 210, 210, - 210, 210, 210, 210 + 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, + 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, + 213, 213, 213, 213, 213, 213, 213 } ; -static const flex_int16_t yy_chk[325] = +static const flex_int16_t yy_chk[328] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 8, 8, 211, 8, 9, 9, 10, 10, 10, 208, - 10, 10, 13, 13, 13, 24, 10, 10, 10, 10, - 10, 10, 15, 15, 15, 24, 16, 16, 16, 206, - 17, 17, 17, 18, 18, 18, 20, 26, 19, 19, - 19, 15, 22, 16, 17, 20, 26, 175, 15, 16, - 26, 25, 17, 205, 18, 17, 19, 25, 204, 25, + 8, 8, 178, 8, 9, 9, 10, 10, 10, 214, + 10, 10, 13, 13, 13, 178, 10, 10, 10, 10, + 10, 10, 15, 15, 15, 211, 16, 16, 16, 209, + 17, 17, 17, 18, 18, 18, 20, 208, 19, 19, + 19, 15, 22, 16, 17, 20, 207, 24, 15, 16, + 24, 206, 17, 205, 18, 17, 19, 24, 25, 204, - 175, 22, 22, 28, 74, 22, 28, 74, 19, 34, - 34, 28, 34, 36, 36, 203, 36, 37, 37, 41, - 41, 41, 42, 42, 42, 202, 42, 42, 48, 48, - 48, 201, 42, 42, 42, 42, 42, 42, 66, 66, - 70, 70, 77, 77, 199, 77, 198, 196, 195, 194, - 192, 191, 190, 189, 187, 185, 184, 48, 212, 212, - 213, 213, 214, 214, 215, 215, 216, 216, 217, 217, - 183, 182, 180, 179, 178, 177, 176, 174, 173, 172, - 169, 168, 167, 166, 165, 163, 162, 161, 159, 158, - 155, 154, 153, 152, 150, 149, 147, 146, 145, 144, + 26, 22, 22, 202, 25, 22, 25, 28, 19, 26, + 28, 34, 34, 26, 34, 28, 36, 36, 201, 36, + 37, 37, 41, 41, 41, 42, 42, 42, 199, 42, + 42, 48, 48, 48, 198, 42, 42, 42, 42, 42, + 42, 67, 67, 71, 71, 75, 78, 78, 75, 78, + 197, 195, 194, 193, 192, 190, 188, 187, 186, 185, + 48, 215, 215, 216, 216, 217, 217, 218, 218, 219, + 219, 220, 220, 183, 182, 181, 180, 179, 177, 176, + 175, 172, 171, 170, 169, 168, 166, 165, 164, 162, + 161, 158, 157, 156, 155, 153, 152, 150, 149, 148, - 143, 141, 140, 139, 135, 134, 133, 132, 131, 129, - 128, 127, 126, 125, 123, 122, 121, 120, 119, 118, - 116, 114, 113, 110, 108, 107, 105, 102, 99, 98, - 97, 95, 94, 92, 91, 90, 89, 88, 85, 84, - 83, 82, 81, 80, 78, 73, 72, 71, 69, 68, - 67, 64, 63, 62, 61, 60, 59, 58, 57, 56, - 55, 54, 53, 52, 51, 50, 49, 47, 46, 44, - 43, 38, 35, 32, 29, 27, 23, 21, 14, 11, - 7, 5, 3, 210, 210, 210, 210, 210, 210, 210, - 210, 210, 210, 210, 210, 210, 210, 210, 210, 210, + 147, 146, 144, 143, 142, 138, 137, 136, 135, 134, + 131, 130, 129, 128, 127, 125, 124, 123, 122, 121, + 120, 118, 116, 115, 112, 110, 109, 107, 104, 101, + 100, 99, 98, 96, 95, 93, 92, 91, 90, 89, + 86, 85, 84, 83, 82, 81, 79, 74, 73, 72, + 70, 69, 68, 65, 64, 63, 62, 61, 60, 59, + 58, 57, 56, 55, 54, 53, 52, 51, 50, 49, + 47, 46, 44, 43, 38, 35, 32, 29, 27, 23, + 21, 14, 11, 7, 5, 3, 213, 213, 213, 213, + 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, - 210, 210, 210, 210, 210, 210, 210, 210, 210, 210, - 210, 210, 210, 210, 210, 210, 210, 210, 210, 210, - 210, 210, 210, 210 + 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, + 213, 213, 213, 213, 213, 213, 213, 213, 213, 213, + 213, 213, 213, 213, 213, 213, 213 } ; static yy_state_type yy_last_accepting_state; @@ -823,13 +824,13 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 211 ) + if ( yy_current_state >= 214 ) yy_c = yy_meta[yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; ++yy_cp; } - while ( yy_base[yy_current_state] != 284 ); + while ( yy_base[yy_current_state] != 287 ); yy_find_action: yy_act = yy_accept[yy_current_state]; @@ -985,51 +986,51 @@ YY_BREAK case 33: YY_RULE_SETUP -{yylval.number=IRQ; return(RESOURCE);} +{yylval.number=MDIO; return(BUS);} YY_BREAK case 34: YY_RULE_SETUP -{yylval.number=DRQ; return(RESOURCE);} +{yylval.number=IRQ; return(RESOURCE);} YY_BREAK case 35: YY_RULE_SETUP -{yylval.number=IO; return(RESOURCE);} +{yylval.number=DRQ; return(RESOURCE);} YY_BREAK case 36: YY_RULE_SETUP -{return(IOAPIC_IRQ);} +{yylval.number=IO; return(RESOURCE);} YY_BREAK case 37: YY_RULE_SETUP -{return(INHERIT);} +{return(IOAPIC_IRQ);} YY_BREAK case 38: YY_RULE_SETUP -{return(SUBSYSTEMID);} +{return(INHERIT);} YY_BREAK case 39: YY_RULE_SETUP -{return(END);} +{return(SUBSYSTEMID);} YY_BREAK case 40: YY_RULE_SETUP -{return(SLOT_DESC);} +{return(END);} YY_BREAK case 41: YY_RULE_SETUP -{return(SMBIOS_DEV_INFO);} +{return(SLOT_DESC);} YY_BREAK case 42: YY_RULE_SETUP -{return(EQUALS);} +{return(SMBIOS_DEV_INFO);} YY_BREAK case 43: YY_RULE_SETUP -{return(PIPE);} +{return(EQUALS);} YY_BREAK case 44: YY_RULE_SETUP -{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} +{return(PIPE);} YY_BREAK case 45: YY_RULE_SETUP @@ -1041,12 +1042,11 @@ YY_BREAK case 47: YY_RULE_SETUP -{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(PCIINT);} +{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} YY_BREAK case 48: -/* rule 48 can match eol */ YY_RULE_SETUP -{yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} +{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(PCIINT);} YY_BREAK case 49: /* rule 49 can match eol */ @@ -1054,10 +1054,15 @@ {yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} YY_BREAK case 50: +/* rule 50 can match eol */ +YY_RULE_SETUP +{yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} + YY_BREAK +case 51: YY_RULE_SETUP {yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(STRING);} YY_BREAK -case 51: +case 52: YY_RULE_SETUP ECHO; YY_BREAK @@ -1357,7 +1362,7 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 211 ) + if ( yy_current_state >= 214 ) yy_c = yy_meta[yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; @@ -1385,11 +1390,11 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 211 ) + if ( yy_current_state >= 214 ) yy_c = yy_meta[yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; - yy_is_jam = (yy_current_state == 210); + yy_is_jam = (yy_current_state == 213); return yy_is_jam ? 0 : yy_current_state; } diff --git a/util/sconfig/main.c b/util/sconfig/main.c index 0833d38..5069dc1 100644 --- a/util/sconfig/main.c +++ b/util/sconfig/main.c @@ -908,6 +908,10 @@ case GPIO: new_d->path = ".type=DEVICE_PATH_GPIO,{.gpio={ .id = 0x%x }}"; break; + + case MDIO: + new_d->path = ".type=DEVICE_PATH_MDIO,{.mdio={ .addr = 0x%x }}"; + break; } return new_d; diff --git a/util/sconfig/sconfig.l b/util/sconfig/sconfig.l index 5ff144b..4b880cf 100644 --- a/util/sconfig/sconfig.l +++ b/util/sconfig/sconfig.l @@ -40,6 +40,7 @@ spi {yylval.number=SPI; return(BUS);} usb {yylval.number=USB; return(BUS);} gpio {yylval.number=GPIO; return(BUS);} +mdio {yylval.number=MDIO; return(BUS);} irq {yylval.number=IRQ; return(RESOURCE);} drq {yylval.number=DRQ; return(RESOURCE);} io {yylval.number=IO; return(RESOURCE);} diff --git a/util/sconfig/sconfig.tab.c_shipped b/util/sconfig/sconfig.tab.c_shipped index 3df31a7..6bc0e02 100644 --- a/util/sconfig/sconfig.tab.c_shipped +++ b/util/sconfig/sconfig.tab.c_shipped @@ -151,45 +151,46 @@ YYSYMBOL_USB = 38, /* USB */ YYSYMBOL_MMIO = 39, /* MMIO */ YYSYMBOL_GPIO = 40, /* GPIO */ - YYSYMBOL_FW_CONFIG_TABLE = 41, /* FW_CONFIG_TABLE */ - YYSYMBOL_FW_CONFIG_FIELD = 42, /* FW_CONFIG_FIELD */ - YYSYMBOL_FW_CONFIG_OPTION = 43, /* FW_CONFIG_OPTION */ - YYSYMBOL_FW_CONFIG_PROBE = 44, /* FW_CONFIG_PROBE */ - YYSYMBOL_PIPE = 45, /* PIPE */ - YYSYMBOL_OPS = 46, /* OPS */ - YYSYMBOL_YYACCEPT = 47, /* $accept */ - YYSYMBOL_devtree = 48, /* devtree */ - YYSYMBOL_chipchild_nondev = 49, /* chipchild_nondev */ - YYSYMBOL_chipchild = 50, /* chipchild */ - YYSYMBOL_chipchildren = 51, /* chipchildren */ - YYSYMBOL_chipchildren_dev = 52, /* chipchildren_dev */ - YYSYMBOL_devicechildren = 53, /* devicechildren */ - YYSYMBOL_chip = 54, /* chip */ - YYSYMBOL_55_1 = 55, /* @1 */ - YYSYMBOL_device = 56, /* device */ - YYSYMBOL_57_2 = 57, /* @2 */ - YYSYMBOL_58_3 = 58, /* @3 */ - YYSYMBOL_alias = 59, /* alias */ - YYSYMBOL_status = 60, /* status */ - YYSYMBOL_resource = 61, /* resource */ - YYSYMBOL_reference = 62, /* reference */ - YYSYMBOL_registers = 63, /* registers */ - YYSYMBOL_subsystemid = 64, /* subsystemid */ - YYSYMBOL_ioapic_irq = 65, /* ioapic_irq */ - YYSYMBOL_smbios_slot_desc = 66, /* smbios_slot_desc */ - YYSYMBOL_smbios_dev_info = 67, /* smbios_dev_info */ - YYSYMBOL_fw_config_table = 68, /* fw_config_table */ - YYSYMBOL_fw_config_table_children = 69, /* fw_config_table_children */ - YYSYMBOL_fw_config_field_children = 70, /* fw_config_field_children */ - YYSYMBOL_fw_config_field_bits = 71, /* fw_config_field_bits */ - YYSYMBOL_fw_config_field_bits_repeating = 72, /* fw_config_field_bits_repeating */ - YYSYMBOL_fw_config_field = 73, /* fw_config_field */ - YYSYMBOL_74_4 = 74, /* $@4 */ - YYSYMBOL_75_5 = 75, /* $@5 */ - YYSYMBOL_76_6 = 76, /* $@6 */ - YYSYMBOL_fw_config_option = 77, /* fw_config_option */ - YYSYMBOL_fw_config_probe = 78, /* fw_config_probe */ - YYSYMBOL_ops = 79 /* ops */ + YYSYMBOL_MDIO = 41, /* MDIO */ + YYSYMBOL_FW_CONFIG_TABLE = 42, /* FW_CONFIG_TABLE */ + YYSYMBOL_FW_CONFIG_FIELD = 43, /* FW_CONFIG_FIELD */ + YYSYMBOL_FW_CONFIG_OPTION = 44, /* FW_CONFIG_OPTION */ + YYSYMBOL_FW_CONFIG_PROBE = 45, /* FW_CONFIG_PROBE */ + YYSYMBOL_PIPE = 46, /* PIPE */ + YYSYMBOL_OPS = 47, /* OPS */ + YYSYMBOL_YYACCEPT = 48, /* $accept */ + YYSYMBOL_devtree = 49, /* devtree */ + YYSYMBOL_chipchild_nondev = 50, /* chipchild_nondev */ + YYSYMBOL_chipchild = 51, /* chipchild */ + YYSYMBOL_chipchildren = 52, /* chipchildren */ + YYSYMBOL_chipchildren_dev = 53, /* chipchildren_dev */ + YYSYMBOL_devicechildren = 54, /* devicechildren */ + YYSYMBOL_chip = 55, /* chip */ + YYSYMBOL_56_1 = 56, /* @1 */ + YYSYMBOL_device = 57, /* device */ + YYSYMBOL_58_2 = 58, /* @2 */ + YYSYMBOL_59_3 = 59, /* @3 */ + YYSYMBOL_alias = 60, /* alias */ + YYSYMBOL_status = 61, /* status */ + YYSYMBOL_resource = 62, /* resource */ + YYSYMBOL_reference = 63, /* reference */ + YYSYMBOL_registers = 64, /* registers */ + YYSYMBOL_subsystemid = 65, /* subsystemid */ + YYSYMBOL_ioapic_irq = 66, /* ioapic_irq */ + YYSYMBOL_smbios_slot_desc = 67, /* smbios_slot_desc */ + YYSYMBOL_smbios_dev_info = 68, /* smbios_dev_info */ + YYSYMBOL_fw_config_table = 69, /* fw_config_table */ + YYSYMBOL_fw_config_table_children = 70, /* fw_config_table_children */ + YYSYMBOL_fw_config_field_children = 71, /* fw_config_field_children */ + YYSYMBOL_fw_config_field_bits = 72, /* fw_config_field_bits */ + YYSYMBOL_fw_config_field_bits_repeating = 73, /* fw_config_field_bits_repeating */ + YYSYMBOL_fw_config_field = 74, /* fw_config_field */ + YYSYMBOL_75_4 = 75, /* $@4 */ + YYSYMBOL_76_5 = 76, /* $@5 */ + YYSYMBOL_77_6 = 77, /* $@6 */ + YYSYMBOL_fw_config_option = 78, /* fw_config_option */ + YYSYMBOL_fw_config_probe = 79, /* fw_config_probe */ + YYSYMBOL_ops = 80 /* ops */ }; typedef enum yysymbol_kind_t yysymbol_kind_t; @@ -517,10 +518,10 @@ /* YYFINAL -- State number of the termination state. */ #define YYFINAL 2 /* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 101 +#define YYLAST 109 /* YYNTOKENS -- Number of terminals. */ -#define YYNTOKENS 47 +#define YYNTOKENS 48 /* YYNNTS -- Number of nonterminals. */ #define YYNNTS 33 /* YYNRULES -- Number of rules. */ @@ -529,7 +530,7 @@ #define YYNSTATES 108 /* YYMAXUTOK -- Last valid token kind. */ -#define YYMAXUTOK 301 +#define YYMAXUTOK 302 /* YYTRANSLATE(TOKEN-NUM) -- Symbol number corresponding to TOKEN-NUM @@ -573,7 +574,7 @@ 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, - 45, 46 + 45, 46, 47 }; #if YYDEBUG @@ -608,7 +609,7 @@ "PNP", "I2C", "APIC", "CPU_CLUSTER", "CPU", "DOMAIN", "IRQ", "DRQ", "SLOT_DESC", "SMBIOS_DEV_INFO", "IO", "NUMBER", "SUBSYSTEMID", "INHERIT", "IOAPIC_IRQ", "IOAPIC", "PCIINT", "GENERIC", "SPI", "USB", "MMIO", - "GPIO", "FW_CONFIG_TABLE", "FW_CONFIG_FIELD", "FW_CONFIG_OPTION", + "GPIO", "MDIO", "FW_CONFIG_TABLE", "FW_CONFIG_FIELD", "FW_CONFIG_OPTION", "FW_CONFIG_PROBE", "PIPE", "OPS", "$accept", "devtree", "chipchild_nondev", "chipchild", "chipchildren", "chipchildren_dev", "devicechildren", "chip", "@1", "device", "@2", "@3", "alias", "status", @@ -627,7 +628,7 @@ } #endif -#define YYPACT_NINF (-57) +#define YYPACT_NINF (-49) #define yypact_value_is_default(Yyn) \ ((Yyn) == YYPACT_NINF) @@ -641,17 +642,17 @@ STATE-NUM. */ static const yytype_int8 yypact[] = { - -57, 6, -57, 2, -57, -57, -57, -57, -12, 45, - -57, 4, -57, 11, 5, 7, 45, -3, -57, -57, - -57, -57, 21, 18, 25, 14, 34, -57, -57, 45, - 27, 16, -57, 44, 53, 46, 47, -57, -57, -57, - -57, -57, 32, -57, -7, -57, -57, -57, 49, 44, - -57, -57, -6, 27, 16, -57, -57, 50, -57, -57, - -57, -57, -57, -57, -2, 38, 0, -57, -57, -57, - 39, -57, 54, 40, 42, 43, 57, 58, -57, -57, - -57, -57, -57, -57, -57, -57, -57, -57, 12, 61, - 60, 62, 48, 51, 63, -57, -57, 52, 64, -57, - 56, 55, -57, -57, 66, -57, -57, -57 + -49, 8, -49, 2, -49, -49, -49, -49, -4, 39, + -49, 3, -49, 5, 4, 12, 39, 16, -49, -49, + -49, -49, 11, 34, 23, 7, 47, -49, -49, 39, + 26, 13, -49, 6, 51, 41, 44, -49, -49, -49, + -49, -49, 32, -49, -12, -49, -49, -49, 46, 6, + -49, -49, -8, 26, 13, -49, -49, 50, -49, -49, + -49, -49, -49, -49, -7, 40, 0, -49, -49, -49, + 42, -49, 52, 43, 45, 48, 54, 57, -49, -49, + -49, -49, -49, -49, -49, -49, -49, -49, 21, 49, + 59, 60, 53, 55, 62, -49, -49, 56, 63, -49, + 61, 58, -49, -49, 64, -49, -49, -49 }; /* YYDEFACT[STATE-NUM] -- Default reduction number in state STATE-NUM. @@ -675,10 +676,10 @@ /* YYPGOTO[NTERM-NUM]. */ static const yytype_int8 yypgoto[] = { - -57, -57, 65, -57, -57, 68, 22, -1, -57, -28, - -57, -57, -57, 41, -57, -57, -56, -57, -57, -57, - -57, -57, -57, -21, 59, 37, -57, -57, -57, -57, - -57, -57, -57 + -49, -49, 65, -49, -49, 66, 17, -1, -49, -28, + -49, -49, -49, 36, -49, -49, -48, -49, -49, -49, + -49, -49, -49, -32, 67, 35, -49, -49, -49, -49, + -49, -49, -49 }; /* YYDEFGOTO[NTERM-NUM]. */ @@ -695,47 +696,47 @@ number is the opposite. If YYTABLE_NINF, syntax error. */ static const yytype_int8 yytable[] = { - 5, 39, 10, 3, 13, 14, 2, 56, 62, 3, - 81, 28, 68, 70, 71, 3, 13, 14, 23, 7, - 52, 22, 25, 24, 26, 70, 96, 72, 73, 35, - 11, 74, 81, 75, 64, 33, 57, 57, 79, 72, - 73, 57, 36, 74, 76, 75, 77, 4, 3, 13, - 14, 30, 15, 45, 46, 34, 76, 40, 77, 48, - 79, 42, 53, 50, 51, 78, 60, 65, 69, 89, - 91, 90, 92, 93, 94, 95, 97, 98, 100, 99, - 102, 104, 103, 107, 27, 106, 101, 78, 105, 88, - 61, 63, 0, 0, 37, 0, 0, 0, 0, 0, - 0, 54 + 5, 39, 56, 3, 13, 14, 62, 68, 2, 52, + 10, 3, 23, 70, 71, 45, 46, 24, 81, 7, + 22, 25, 35, 64, 3, 13, 14, 72, 73, 26, + 28, 74, 57, 75, 70, 96, 57, 57, 79, 11, + 81, 30, 3, 13, 14, 76, 15, 77, 72, 73, + 4, 33, 74, 34, 75, 36, 40, 48, 50, 42, + 79, 51, 53, 60, 97, 78, 76, 65, 77, 90, + 69, 94, 89, 91, 95, 92, 98, 99, 93, 102, + 104, 107, 27, 100, 88, 61, 103, 78, 106, 63, + 101, 0, 0, 105, 37, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 54 }; static const yytype_int8 yycheck[] = { - 1, 29, 14, 3, 4, 5, 0, 14, 14, 3, - 66, 14, 14, 13, 14, 3, 4, 5, 7, 17, - 41, 17, 17, 12, 17, 13, 14, 27, 28, 15, - 42, 31, 88, 33, 55, 17, 43, 43, 66, 27, - 28, 43, 8, 31, 44, 33, 46, 41, 3, 4, - 5, 30, 7, 9, 10, 30, 44, 30, 46, 6, - 88, 45, 30, 17, 17, 66, 17, 17, 30, 30, - 30, 17, 30, 30, 17, 17, 15, 17, 30, 17, - 17, 17, 30, 17, 16, 30, 35, 88, 32, 67, - 49, 54, -1, -1, 29, -1, -1, -1, -1, -1, - -1, 42 + 1, 29, 14, 3, 4, 5, 14, 14, 0, 41, + 14, 3, 7, 13, 14, 9, 10, 12, 66, 17, + 17, 17, 15, 55, 3, 4, 5, 27, 28, 17, + 14, 31, 44, 33, 13, 14, 44, 44, 66, 43, + 88, 30, 3, 4, 5, 45, 7, 47, 27, 28, + 42, 17, 31, 30, 33, 8, 30, 6, 17, 46, + 88, 17, 30, 17, 15, 66, 45, 17, 47, 17, + 30, 17, 30, 30, 17, 30, 17, 17, 30, 17, + 17, 17, 16, 30, 67, 49, 30, 88, 30, 54, + 35, -1, -1, 32, 29, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 42 }; /* YYSTOS[STATE-NUM] -- The symbol kind of the accessing symbol of state STATE-NUM. */ static const yytype_int8 yystos[] = { - 0, 48, 0, 3, 41, 54, 68, 17, 69, 55, - 14, 42, 73, 4, 5, 7, 49, 52, 54, 56, - 62, 63, 17, 7, 12, 17, 17, 52, 14, 51, - 30, 71, 76, 17, 30, 15, 8, 49, 50, 56, - 30, 75, 45, 72, 70, 9, 10, 60, 6, 59, - 17, 17, 70, 30, 71, 74, 14, 43, 77, 58, - 17, 60, 14, 72, 70, 17, 53, 57, 14, 30, - 13, 14, 27, 28, 31, 33, 44, 46, 54, 56, - 61, 63, 64, 65, 66, 67, 78, 79, 53, 30, + 0, 49, 0, 3, 42, 55, 69, 17, 70, 56, + 14, 43, 74, 4, 5, 7, 50, 53, 55, 57, + 63, 64, 17, 7, 12, 17, 17, 53, 14, 52, + 30, 72, 77, 17, 30, 15, 8, 50, 51, 57, + 30, 76, 46, 73, 71, 9, 10, 61, 6, 60, + 17, 17, 71, 30, 72, 75, 14, 44, 78, 59, + 17, 61, 14, 73, 71, 17, 54, 58, 14, 30, + 13, 14, 27, 28, 31, 33, 45, 47, 55, 57, + 62, 64, 65, 66, 67, 68, 79, 80, 54, 30, 17, 30, 30, 30, 17, 17, 14, 15, 17, 17, 30, 35, 17, 30, 17, 32, 30, 17 }; @@ -743,13 +744,13 @@ /* YYR1[RULE-NUM] -- Symbol kind of the left-hand side of rule RULE-NUM. */ static const yytype_int8 yyr1[] = { - 0, 47, 48, 48, 48, 49, 49, 49, 50, 50, - 51, 51, 52, 52, 53, 53, 53, 53, 53, 53, - 53, 53, 53, 53, 53, 55, 54, 57, 56, 58, - 56, 59, 59, 60, 60, 61, 62, 63, 64, 64, - 65, 66, 66, 66, 67, 67, 68, 69, 69, 70, - 70, 71, 72, 72, 74, 73, 75, 73, 76, 73, - 77, 78, 79 + 0, 48, 49, 49, 49, 50, 50, 50, 51, 51, + 52, 52, 53, 53, 54, 54, 54, 54, 54, 54, + 54, 54, 54, 54, 54, 56, 55, 58, 57, 59, + 57, 60, 60, 61, 61, 62, 63, 64, 65, 65, + 66, 67, 67, 67, 68, 68, 69, 70, 70, 71, + 71, 72, 73, 73, 75, 74, 76, 74, 77, 74, + 78, 79, 80 }; /* YYR2[RULE-NUM] -- Number of symbols on the right-hand side of rule RULE-NUM. */ diff --git a/util/sconfig/sconfig.tab.h_shipped b/util/sconfig/sconfig.tab.h_shipped index a35b64b..6996a23 100644 --- a/util/sconfig/sconfig.tab.h_shipped +++ b/util/sconfig/sconfig.tab.h_shipped @@ -35,8 +35,8 @@ especially those whose name start with YY_ or yy_. They are private implementation details that can be changed or removed. */ -#ifndef YY_YY_HOME_ICON_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED -# define YY_YY_HOME_ICON_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED +#ifndef YY_YY_HOME_WERNER_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED +# define YY_YY_HOME_WERNER_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED /* Debug traces. */ #ifndef YYDEBUG # define YYDEBUG 0 @@ -92,12 +92,13 @@ USB = 293, /* USB */ MMIO = 294, /* MMIO */ GPIO = 295, /* GPIO */ - FW_CONFIG_TABLE = 296, /* FW_CONFIG_TABLE */ - FW_CONFIG_FIELD = 297, /* FW_CONFIG_FIELD */ - FW_CONFIG_OPTION = 298, /* FW_CONFIG_OPTION */ - FW_CONFIG_PROBE = 299, /* FW_CONFIG_PROBE */ - PIPE = 300, /* PIPE */ - OPS = 301 /* OPS */ + MDIO = 296, /* MDIO */ + FW_CONFIG_TABLE = 297, /* FW_CONFIG_TABLE */ + FW_CONFIG_FIELD = 298, /* FW_CONFIG_FIELD */ + FW_CONFIG_OPTION = 299, /* FW_CONFIG_OPTION */ + FW_CONFIG_PROBE = 300, /* FW_CONFIG_PROBE */ + PIPE = 301, /* PIPE */ + OPS = 302 /* OPS */ }; typedef enum yytokentype yytoken_kind_t; #endif @@ -126,4 +127,4 @@ int yyparse (void); -#endif /* !YY_YY_HOME_ICON_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED */ +#endif /* !YY_YY_HOME_WERNER_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED */ diff --git a/util/sconfig/sconfig.y b/util/sconfig/sconfig.y index fb5409f..35e1e5e 100644 --- a/util/sconfig/sconfig.y +++ b/util/sconfig/sconfig.y @@ -21,7 +21,7 @@ uint64_t number; } -%token CHIP DEVICE REGISTER ALIAS REFERENCE ASSOCIATION BOOL STATUS MANDATORY BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC CPU_CLUSTER CPU DOMAIN IRQ DRQ SLOT_DESC SMBIOS_DEV_INFO IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT GENERIC SPI USB MMIO GPIO FW_CONFIG_TABLE FW_CONFIG_FIELD FW_CONFIG_OPTION FW_CONFIG_PROBE PIPE OPS +%token CHIP DEVICE REGISTER ALIAS REFERENCE ASSOCIATION BOOL STATUS MANDATORY BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC CPU_CLUSTER CPU DOMAIN IRQ DRQ SLOT_DESC SMBIOS_DEV_INFO IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT GENERIC SPI USB MMIO GPIO MDIO FW_CONFIG_TABLE FW_CONFIG_FIELD FW_CONFIG_OPTION FW_CONFIG_PROBE PIPE OPS %% devtree: { cur_parent = root_parent; } | devtree chip | devtree fw_config_table; -- To view, visit https://review.coreboot.org/c/coreboot/+/69382 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6691f92c4233bc30afc9029840b06f74bb1eb4b2 Gerrit-Change-Number: 69382 Gerrit-PatchSet: 9 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jan Samek <jan.samek(a)siemens.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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coreboot-gerrit November 2022