Subrata Banik has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/69977 )
Change subject: soc/intel/cmn/cse: Create API to perform essential post EOP operations
......................................................................
soc/intel/cmn/cse: Create API to perform essential post EOP operations
This patch creates an API that can perform essential CSE operation
after sending the EOP command to the CSE and before booting to OS.
Lists of operation are
- Perform global reset lock
- Put HECI1 to D0i3 and disable the HECI1 if the user selects
- Set D0I3 for all HECI devices.
Additionally, ensures that CSE .final operation is not sending EOP
and other essential operations if the SoC user selects
SOC_INTEL_CSE_SEND_EOP_LATE config.
BUG=b:260041679
TEST=Able to boot Google/Rex after sending CSE EOP late.
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I10131ea9b553a62f0d632783c4dbad96d35d6563
---
M src/soc/intel/common/block/cse/cse.c
M src/soc/intel/common/block/include/intelblocks/cse.h
2 files changed, 54 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/69977/2
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Gerrit-Change-Id: I10131ea9b553a62f0d632783c4dbad96d35d6563
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Subrata Banik has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/69976 )
Change subject: soc/intel/cmn/cse: Create another config for sending CSE EOP cmd late
......................................................................
soc/intel/cmn/cse: Create another config for sending CSE EOP cmd late
Presently, coreboot supports two instances of sending EOP cmd to
the Intel CSE.
1. Sending EOP cmd to CSE during `.final` operation from cse pci driver.
2. Starting with Alder Lake, the recommendation was to send EOP to CSE
earlier than CSE `.final` operation. Since then it's referred to as
`Sending EOP Early`. This method helped to save the CSE EOP response
time significantly.
During Meteor Lake platform, CSE EOP response time has become
non-deterministic and we have figured that sending EOP command later
than CSE .final operation is actually helping to optimize the boot time
significantly (around ~150ms savings compared to sending from `.final`
ops and ~5sec compared to sending CSE early).
Hence, this patch intended to create yet another kconfig for sending
CSE late (specifically after `.final` operation). The idea for this
newer config is to use the boot state machine for sending CSE EOP cmd.
The patch train in this series would add the specific changes to allow
sending EOP late and perform other essential operations required prior
booting to OS as coreboot decided to skip calling into FSP Notify phase.
The current plan is that Intel Meteor Lake platform will select this
newer config from SoC code.
BUG=b:260041679
TEST=Able to send EOP command successfully for Google/Taeko.
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: Iea512cd5b79d61dd5d5a962079baf525027c831f
---
M src/soc/intel/common/block/cse/Kconfig
1 file changed, 50 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/69976/2
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Subrata Banik has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/69975 )
Change subject: soc/intel/cmn/cse: Send EOP cmd from .final aka `cse_final()`
......................................................................
soc/intel/cmn/cse: Send EOP cmd from .final aka `cse_final()`
This patch refactors common code to allow cse_final() function to send
EOP cmd if the SoC user selects `SOC_INTEL_CSE_SET_EOP` kconfig.
This patch helps cse_final_ready_to_boot() and
cse_final_end_of_firmware() function for being meaningful with its
operation and let cse_final() being that outer layer to perform three
operations based on the selected kconfig.
1. send cse eop command
2. perform cse_final_end_of_firmware() operations
3. perform cse_final_end_of_firmware() operations
BUG=b:260041679
TEST=Able to send EOP command successfully for Google/Taeko.
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I412291c9378011509d3825f9b01e81bfced53303
---
M src/soc/intel/common/block/cse/cse.c
1 file changed, 31 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/69975/2
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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69981 )
Change subject: [NEEDS TEST] util/superiotool: Replace iopl with ioperm
......................................................................
Patch Set 2:
(1 comment)
File util/superiotool/superiotool.c:
https://review.coreboot.org/c/coreboot/+/69981/comment/a88747df_6aec1805
PS1, Line 328: iopl
> would be good if you update the comment too
s/comment/parameter of the perror call/
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Change subject: [NEEDS TEST] util/superiotool: Replace iopl with ioperm
......................................................................
Patch Set 2:
(1 comment)
File util/superiotool/superiotool.c:
https://review.coreboot.org/c/coreboot/+/69981/comment/63580206_374eb8e7
PS2, Line 330: printf("Superiotool must be run as root.\n");
Should we actually check what the return value is to see if it is a permission error? Right now this message assumes that any error means it wasn't run as root, which wasn't the case in bug #440. Although it was run as root, iopl returned a different error as it wasn't implemented but still confusingly printed this message.
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69976 )
Change subject: soc/intel/cmn/cse: Create another config for sending CSE EOP cmd late
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164489):
https://review.coreboot.org/c/coreboot/+/69976/comment/a0450bb3_06c5a3be
PS1, Line 15: `Sending EOP Early`. This method helped to save the CSE EOP response
Possible unwrapped commit description (prefer a maximum 72 chars per line)
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Change subject: [NEEDS TEST] util/superiotool: Replace iopl with ioperm
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
File util/superiotool/superiotool.c:
https://review.coreboot.org/c/coreboot/+/69981/comment/b99843f8_0b7996e1
PS1, Line 328: iopl
would be good if you update the comment too
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Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69999 )
Change subject: soc/intel/meteorlake: Allow sending late EOP cmd to CSE
......................................................................
soc/intel/meteorlake: Allow sending late EOP cmd to CSE
This patch selects SOC_INTEL_CSE_SEND_EOP_LATE config to let IA
common code to skip sending CSE EOP cmd during finalize operation
rather uses boot state machine (either payload load or payload boot)
to delay in sending EOP cmd to CSE.
BUG=none
TEST=Able to boot to Google/Rex with this patch and observed ~150ms
savings in boot time
Without this patch:
942:before sending EOP to ME 1,795,702 (354)
943:after sending EOP to ME 1,950,526 (154,824)
With this patch:
942:before sending EOP to ME 2,051,406 (35,484)
943:after sending EOP to ME 2,057,583 (6,177)
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I7d44d5eff890ac78e3075d49cc249f740686dd0d
---
M src/soc/intel/meteorlake/Kconfig
1 file changed, 30 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/69999/1
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index c3efd3e..fb99d30 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -82,6 +82,7 @@
select SOC_INTEL_COMMON_PCH_CLIENT
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_IOC
+ select SOC_INTEL_CSE_SEND_EOP_LATE
select SOC_INTEL_CSE_SET_EOP
select SOC_INTEL_GFX_NON_PREFETCHABLE_MMIO
select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
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