coreboot-gerrit November 2022

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[L] Change in coreboot[master]: mb/amd/birman/gpio: Configure birman GPIOs
by Fred Reitberger (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Jason Glenesk, Felix Held. Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69411 ) Change subject: mb/amd/birman/gpio: Configure birman GPIOs ...................................................................... Patch Set 5: (2 comments) File src/mainboard/amd/birman/gpio.c: https://review.coreboot.org/c/coreboot/+/69411/comment/9c00322a_9b678672 PS2, Line 31: PAD_SCI(GPIO_9, PULL_UP, EDGE_LOW), > hm, i'd change this to GPI and maybe leave a comment that it's unclear if that needs to generate SCI […] Done File src/mainboard/amd/birman/gpio.c: https://review.coreboot.org/c/coreboot/+/69411/comment/85c1181e_3ece6928 PS4, Line 19: PAD_NF_SCI(GPIO_3, GPIOxx, PULL_NONE, EDGE_LOW), > i'd use PAD_SCI(GPIO_3, PULL_NONE, EDGE_LOW) here; the PAD_NF_SCI macro is only needed when the gpio […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/69411 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5459efb38431e568e25405c440b5b9cf1354f02f Gerrit-Change-Number: 69411 Gerrit-PatchSet: 5 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 29 Nov 2022 14:01:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Fred Reitberger <reitbergerfred(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: commonlib/helpers.h: use unsigned literals in definitions
by Krystian Hebel (Code Review) 29 Nov '22

29 Nov '22

Krystian Hebel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70106 ) Change subject: commonlib/helpers.h: use unsigned literals in definitions ...................................................................... commonlib/helpers.h: use unsigned literals in definitions This protects against some of unintentional integer promotions, e.g.: uint16_t freq_mhz = 2148; // or bigger uint64_t freq = freq_mhz * MHz; In this example, MHz used to be treated as int32_t, and because int32_t can represent every value that uin16_t can, multiplication was being performed with both arguments treated as int32_t. During assignment, result of multiplication is promoted to int64_t (because it can represent each value that int32_t can), and finally implicitly converted to uint64_t. Promotions preserve the value, including the sign, so if result of multiplication is negative, the same negative number (but extended to 64 bits) is converted to unsigned number. Signed-off-by: Krystian Hebel <krystian.hebel(a)3mdeb.com> Change-Id: Ie60a6ee82db80328e44639175272cc8097f36c3b --- M src/commonlib/bsd/include/commonlib/bsd/helpers.h 1 file changed, 32 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/70106/1 diff --git a/src/commonlib/bsd/include/commonlib/bsd/helpers.h b/src/commonlib/bsd/include/commonlib/bsd/helpers.h index 4995305..73cd25f 100644 --- a/src/commonlib/bsd/include/commonlib/bsd/helpers.h +++ b/src/commonlib/bsd/include/commonlib/bsd/helpers.h @@ -72,13 +72,13 @@ } while (0) /* Standard units. */ -#define KiB (1<<10) -#define MiB (1<<20) -#define GiB (1<<30) +#define KiB (1U<<10) +#define MiB (1U<<20) +#define GiB (1U<<30) -#define KHz (1000) -#define MHz (1000 * KHz) -#define GHz (1000 * MHz) +#define KHz (1000U) +#define MHz (1000U * KHz) +#define GHz (1000U * MHz) #ifndef offsetof #define offsetof(TYPE, MEMBER) __builtin_offsetof(TYPE, MEMBER) -- To view, visit https://review.coreboot.org/c/coreboot/+/70106 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie60a6ee82db80328e44639175272cc8097f36c3b Gerrit-Change-Number: 70106 Gerrit-PatchSet: 1 Gerrit-Owner: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-MessageType: newchange

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[L] Change in coreboot[master]: mb/amd/birman/gpio: Configure birman GPIOs
by Fred Reitberger (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Jason Glenesk, Fred Reitberger. Hello build bot (Jenkins), Jason Glenesk, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69411 to look at the new patch set (#5). Change subject: mb/amd/birman/gpio: Configure birman GPIOs ...................................................................... mb/amd/birman/gpio: Configure birman GPIOs Configure birman GPIOs per schematic 105-D67000-00B v0.7 Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: I5459efb38431e568e25405c440b5b9cf1354f02f --- M src/mainboard/amd/birman/early_gpio.c M src/mainboard/amd/birman/gpio.c 2 files changed, 246 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/69411/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/69411 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5459efb38431e568e25405c440b5b9cf1354f02f Gerrit-Change-Number: 69411 Gerrit-PatchSet: 5 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/intel/meteorlake: Refactor `pmc_lockdown_cfg` function
by Kapil Porwal (Code Review) 29 Nov '22

29 Nov '22

Kapil Porwal has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70132 ) Change subject: soc/intel/meteorlake: Refactor `pmc_lockdown_cfg` function ...................................................................... soc/intel/meteorlake: Refactor `pmc_lockdown_cfg` function This patch refactors the `pmc_lockdown_cfg()` to remove the helper functions and uses the `setbits32` function to enforce bit locking as applicable. Port of commit 2eec87a553ec ("soc/intel/alderlake: Refactor `pmc_lockdown_cfg` function") BUG=none TEST=Boot to OS on google/rex. Signed-off-by: Kapil Porwal <kapilporwal(a)google.com> Change-Id: I3622748d8fecef69c60bb3fe9bfe68fc126764b7 --- M src/soc/intel/meteorlake/lockdown.c 1 file changed, 25 insertions(+), 39 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/70132/1 diff --git a/src/soc/intel/meteorlake/lockdown.c b/src/soc/intel/meteorlake/lockdown.c index 51fbdaf..bfd8854 100644 --- a/src/soc/intel/meteorlake/lockdown.c +++ b/src/soc/intel/meteorlake/lockdown.c @@ -12,51 +12,17 @@ #define PCR_PSTH_CTRLREG 0x1d00 #define PSTH_CTRLREG_IOSFPTCGE (1 << 2) -static void pmc_lock_pmsync(void) -{ - uint8_t *pmcbase; - uint32_t pmsyncreg; - - pmcbase = pmc_mmio_regs(); - - pmsyncreg = read32(pmcbase + PMSYNC_TPR_CFG); - pmsyncreg |= PCH2CPU_TPR_CFG_LOCK; - write32(pmcbase + PMSYNC_TPR_CFG, pmsyncreg); -} - -static void pmc_lock_abase(void) -{ - uint8_t *pmcbase; - uint32_t reg32; - - pmcbase = pmc_mmio_regs(); - - reg32 = read32(pmcbase + GEN_PMCON_B); - reg32 |= (SLP_STR_POL_LOCK | ACPI_BASE_LOCK); - write32(pmcbase + GEN_PMCON_B, reg32); -} - -static void pmc_lock_smi(void) -{ - uint8_t *pmcbase; - uint8_t reg8; - - pmcbase = pmc_mmio_regs(); - - reg8 = read8(pmcbase + GEN_PMCON_B); - reg8 |= SMI_LOCK; - write8(pmcbase + GEN_PMCON_B, reg8); -} - static void pmc_lockdown_cfg(int chipset_lockdown) { + uint8_t *pmcbase = pmc_mmio_regs(); + /* PMSYNC */ - pmc_lock_pmsync(); + setbits32(pmcbase + PMSYNC_TPR_CFG, PCH2CPU_TPR_CFG_LOCK); /* Lock down ABASE and sleep stretching policy */ - pmc_lock_abase(); + setbits32(pmcbase + GEN_PMCON_B, SLP_STR_POL_LOCK | ACPI_BASE_LOCK); if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) - pmc_lock_smi(); + setbits32(pmcbase + GEN_PMCON_B, SMI_LOCK); } static void soc_die_lockdown_cfg(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/70132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3622748d8fecef69c60bb3fe9bfe68fc126764b7 Gerrit-Change-Number: 70132 Gerrit-PatchSet: 1 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/intel/alderlake/acpi.c: Don't look up coreboot CPU index
by Arthur Heymans (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Tarun Tuli, Michał Żygowski, Subrata Banik. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69510 ) Change subject: soc/intel/alderlake/acpi.c: Don't look up coreboot CPU index ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: > I mean it doesn't make any difference with and without the patch applied. Right. Looking at the code: loop over struct dev loop over i if( dev->apic_id == cpu_get_apic_id(i) ... is really the same as loop over i as filling in the apicid happens based on which CPU gets the index spinlock first. So this patch is just a cleaner way of writing the same. -- To view, visit https://review.coreboot.org/c/coreboot/+/69510 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaaaef213b32b33e3ec9f4874d576896c2335211c Gerrit-Change-Number: 69510 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Tue, 29 Nov 2022 12:00:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/alderlake/acpi.c: Don't look up coreboot CPU index
by Michał Żygowski (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Arthur Heymans. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69510 ) Change subject: soc/intel/alderlake/acpi.c: Don't look up coreboot CPU index ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: > Tried rebooting 5 times on MSI Z690-A ADL-S desktop and the SSDT hash was the same. I mean it doesn't make any difference with and without the patch applied. -- To view, visit https://review.coreboot.org/c/coreboot/+/69510 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaaaef213b32b33e3ec9f4874d576896c2335211c Gerrit-Change-Number: 69510 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 29 Nov 2022 11:52:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/alderlake/acpi.c: Don't look up coreboot CPU index
by Michał Żygowski (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Arthur Heymans. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69510 ) Change subject: soc/intel/alderlake/acpi.c: Don't look up coreboot CPU index ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: Tried rebooting 5 times on MSI Z690-A ADL-S desktop and the SSDT hash was the same. -- To view, visit https://review.coreboot.org/c/coreboot/+/69510 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaaaef213b32b33e3ec9f4874d576896c2335211c Gerrit-Change-Number: 69510 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 29 Nov 2022 11:42:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/inteltool/Makefile : improve cross-compilation support
by build bot (Jenkins) (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: maciej.gabryelski(a)3mdeb.com, Stefan Reinauer. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70104 ) Change subject: util/inteltool/Makefile : improve cross-compilation support ...................................................................... Patch Set 1: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164771): https://review.coreboot.org/c/coreboot/+/70104/comment/38669722_4a3de482 PS1, Line 8: Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/70104 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b0949d07baae1ae1d7b22ac3d0b8913f81d89c1 Gerrit-Change-Number: 70104 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Kotyla Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: maciej.gabryelski(a)3mdeb.com Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: maciej.gabryelski(a)3mdeb.com Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Tue, 29 Nov 2022 11:35:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/superiotool/Makefile : improve cross-compilation support
by build bot (Jenkins) (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: maciej.gabryelski(a)3mdeb.com, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70103 ) Change subject: util/superiotool/Makefile : improve cross-compilation support ...................................................................... Patch Set 1: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164770): https://review.coreboot.org/c/coreboot/+/70103/comment/5293112e_93f23e0f PS1, Line 8: Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/70103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d455f3d1a6d86c88b8e22da825fe14f9630e971 Gerrit-Change-Number: 70103 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Kotyla Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: maciej.gabryelski(a)3mdeb.com Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: maciej.gabryelski(a)3mdeb.com Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 29 Nov 2022 11:35:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/ectool/Makefile : improve cross-compilation support
by build bot (Jenkins) (Code Review) 29 Nov '22

29 Nov '22

Attention is currently required from: maciej.gabryelski(a)3mdeb.com. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70102 ) Change subject: util/ectool/Makefile : improve cross-compilation support ...................................................................... Patch Set 1: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164769): https://review.coreboot.org/c/coreboot/+/70102/comment/17f5f02a_b53dad78 PS1, Line 9: Build variables like CC, INSTALL, PREFIX, and LDFLAGS should not be Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/70102 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If5c88bde0ae00f0211a250906cbdedfe4f59c67b Gerrit-Change-Number: 70102 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Kotyla Gerrit-Reviewer: maciej.gabryelski(a)3mdeb.com Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: maciej.gabryelski(a)3mdeb.com Gerrit-Comment-Date: Tue, 29 Nov 2022 11:35:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2022