coreboot-gerrit October 2022

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[S] Change in coreboot[master]: util/inteltool: Add support for (non-ULT) Broadwell
by Arthur Heymans (Code Review) 07 Oct '22

07 Oct '22

Attention is currently required from: Stefan Reinauer, Angel Pons. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68186 ) Change subject: util/inteltool: Add support for (non-ULT) Broadwell ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68186 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe0ed9badd580e28060fe8df14a01352d4c1e11e Gerrit-Change-Number: 68186 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Fri, 07 Oct 2022 09:52:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: util/inteltool: Add 9 series PCH support
by Arthur Heymans (Code Review) 07 Oct '22

07 Oct '22

Attention is currently required from: Stefan Reinauer, Angel Pons. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68185 ) Change subject: util/inteltool: Add 9 series PCH support ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68185 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id216cd071b09c93ee6a4792944c6fad39254aa3b Gerrit-Change-Number: 68185 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Fri, 07 Oct 2022 09:52:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/prodrive/hermes: Make board settings less error-prone
by Angel Pons (Code Review) 07 Oct '22

07 Oct '22

Attention is currently required from: Patrick Rudolph, Christian Walter. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67381 ) Change subject: mb/prodrive/hermes: Make board settings less error-prone ...................................................................... Patch Set 6: (1 comment) Patchset: PS5: > do you want to decouple this from the relation chain since it is not related to Gfx? Done, let's wait for build test -- To view, visit https://review.coreboot.org/c/coreboot/+/67381 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f009b21ef0850a2af6edef1818c770171358314 Gerrit-Change-Number: 67381 Gerrit-PatchSet: 6 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Comment-Date: Fri, 07 Oct 2022 09:46:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: nb/intel/i945/raminit: Use 'size_t' for banksize[]
by Elyes Haouas (Code Review) 07 Oct '22

07 Oct '22

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68213 to look at the new patch set (#4). Change subject: nb/intel/i945/raminit: Use 'size_t' for banksize[] ...................................................................... nb/intel/i945/raminit: Use 'size_t' for banksize[] Change-Id: I4fb845bb4145d47aea39d7e5493d854d00e289aa Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/northbridge/intel/i945/raminit.c M src/northbridge/intel/i945/raminit.h 2 files changed, 17 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/68213/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/68213 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fb845bb4145d47aea39d7e5493d854d00e289aa Gerrit-Change-Number: 68213 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: nb/intel/i945/raminit: Use 'size_t' for banksize[]
by build bot (Jenkins) (Code Review) 07 Oct '22

07 Oct '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68213 ) Change subject: nb/intel/i945/raminit: Use 'size_t' for banksize[] ...................................................................... Patch Set 3: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159981): https://review.coreboot.org/c/coreboot/+/68213/comment/730bce79_8aeb4e5b PS3, Line 10: Change-Id: I4fb845bb4145d47aea39d7e5493d854d00e289aa Duplicate signature -- To view, visit https://review.coreboot.org/c/coreboot/+/68213 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fb845bb4145d47aea39d7e5493d854d00e289aa Gerrit-Change-Number: 68213 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 07 Oct 2022 09:42:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: nb/intel/i945/raminit: Use 'size_t' for banksize[]
by Elyes Haouas (Code Review) 07 Oct '22

07 Oct '22

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68213 to look at the new patch set (#3). Change subject: nb/intel/i945/raminit: Use 'size_t' for banksize[] ...................................................................... nb/intel/i945/raminit: Use 'size_t' for banksize[] Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Change-Id: I4fb845bb4145d47aea39d7e5493d854d00e289aa Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/northbridge/intel/i945/raminit.c M src/northbridge/intel/i945/raminit.h 2 files changed, 18 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/68213/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68213 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fb845bb4145d47aea39d7e5493d854d00e289aa Gerrit-Change-Number: 68213 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/ehl: Fix incorrect access to MAC_MDIO_DATA register
by Mario Scheithauer (Code Review) 07 Oct '22

07 Oct '22

Attention is currently required from: Lean Sheng Tan, Werner Zeh. Hello Lean Sheng Tan, Werner Zeh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68214 to look at the new patch set (#2). Change subject: soc/intel/ehl: Fix incorrect access to MAC_MDIO_DATA register ...................................................................... soc/intel/ehl: Fix incorrect access to MAC_MDIO_DATA register Function 'setbits16' clears the data register first. This leads to incorrect register entries when trying to access external devices, such as a PHY. Change-Id: I0212420be770e2ffdabebbfaf5dfbf8d99d25915 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/soc/intel/elkhartlake/tsn_gbe.c 1 file changed, 15 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/68214/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68214 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0212420be770e2ffdabebbfaf5dfbf8d99d25915 Gerrit-Change-Number: 68214 Gerrit-PatchSet: 2 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: nb/intel/i945/raminit: Use 'size_t' for banksize[]
by build bot (Jenkins) (Code Review) 07 Oct '22

07 Oct '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68213 ) Change subject: nb/intel/i945/raminit: Use 'size_t' for banksize[] ...................................................................... Patch Set 2: (2 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159980): https://review.coreboot.org/c/coreboot/+/68213/comment/1a553c59_d52ae8ae PS2, Line 10: Change-Id: I4fb845bb4145d47aea39d7e5493d854d00e289aa Duplicate signature File src/northbridge/intel/i945/raminit.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-159980): https://review.coreboot.org/c/coreboot/+/68213/comment/b3efe265_5a16f7b3 PS2, Line 428: printk(BIOS_DEBUG, "DIMM %d side 0 = %ld MB\n", i, sysinfo->banksize[i * 2] * 32); line length of 98 exceeds 96 columns -- To view, visit https://review.coreboot.org/c/coreboot/+/68213 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fb845bb4145d47aea39d7e5493d854d00e289aa Gerrit-Change-Number: 68213 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 07 Oct 2022 09:35:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: nb/intel/i945/raminit: Use 'size_t' for banksize[]
by Elyes Haouas (Code Review) 07 Oct '22

07 Oct '22

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68213 to look at the new patch set (#2). Change subject: nb/intel/i945/raminit: Use 'size_t' for banksize[] ...................................................................... nb/intel/i945/raminit: Use 'size_t' for banksize[] Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Change-Id: I4fb845bb4145d47aea39d7e5493d854d00e289aa Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/northbridge/intel/i945/raminit.c M src/northbridge/intel/i945/raminit.h 2 files changed, 19 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/68213/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68213 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fb845bb4145d47aea39d7e5493d854d00e289aa Gerrit-Change-Number: 68213 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/ehl: Fix incorrect access to MAC_MDIO_DATA register
by Mario Scheithauer (Code Review) 07 Oct '22

07 Oct '22

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68214 ) Change subject: soc/intel/ehl: Fix incorrect access to MAC_MDIO_DATA register ...................................................................... soc/intel/ehl: Fix incorrect access to MAC_MDIO_DATA register Function 'setbits16' clears the data register first. This leads to incorrect register entries for external accesses. Change-Id: I0212420be770e2ffdabebbfaf5dfbf8d99d25915 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/soc/intel/elkhartlake/tsn_gbe.c 1 file changed, 14 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/68214/1 diff --git a/src/soc/intel/elkhartlake/tsn_gbe.c b/src/soc/intel/elkhartlake/tsn_gbe.c index 49ce4da..3e08897 100644 --- a/src/soc/intel/elkhartlake/tsn_gbe.c +++ b/src/soc/intel/elkhartlake/tsn_gbe.c @@ -72,7 +72,7 @@ { enum cb_err status; - setbits16(base + TSN_MAC_MDIO_DATA, data); + write16(base + TSN_MAC_MDIO_DATA, data); clrsetbits32(base + TSN_MAC_MDIO_ADR, TSN_MAC_MDIO_ADR_MASK, TSN_MAC_PHYAD(phy_adr) | TSN_MAC_REGAD(reg_adr) | TSN_MAC_CLK_TRAIL_4 | TSN_MAC_CSR_CLK_DIV_62 -- To view, visit https://review.coreboot.org/c/coreboot/+/68214 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0212420be770e2ffdabebbfaf5dfbf8d99d25915 Gerrit-Change-Number: 68214 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-MessageType: newchange

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coreboot-gerrit October 2022