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Hello build bot (Jenkins), Stefan Reinauer, Lean Sheng Tan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/68657
to look at the new patch set (#2).
Change subject: util/ifdtool: Add Wellsburg support
......................................................................
util/ifdtool: Add Wellsburg support
Wellsburg is IFDv2 compatible and supports up to 6 regions.
Also add support using the -p argument to specify Wellsburg platform.
Make sure to not use 16 regions as default as this corrupts the image
when using the layout modification feature.
Tested on Intel Grangeville.
Documents used:
Intel Document Id: 516552
Intel Document Id: 565117
Change-Id: I651730b05deb512478d059174cf8615547d2fde4
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Co-Developed-by: Julian Elischer <jrelis(a)google.com>
---
M util/ifdtool/ifdtool.c
M util/ifdtool/ifdtool.h
2 files changed, 37 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/68657/2
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Change subject: vc/amd/fsp: Get rid of last "sabrina" reference
......................................................................
Patch Set 1: Code-Review+2
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Change subject: src/drivers/uart: Add definition of FIFO enabled in Interrupt Identification Register
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68566/comment/b1af859e_88839bf8
PS2, Line 7: Interrupt
: Identification Register
nit: abbreviate to IIR, as the info is in the commit message body.
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Change subject: soc/intel/xeon_sp: Add functions to store/restore uart state in smm
......................................................................
Patch Set 4:
(2 comments)
File src/soc/intel/xeon_sp/smihandler.c:
https://review.coreboot.org/c/coreboot/+/68567/comment/f38aed9e_f555cd2c
PS4, Line 32: if (CONFIG(DEBUG_SMI))
This should also depend on `DRIVERS_UART_8250IO`:
if (CONFIG(DRIVERS_UART_8250IO) && CONFIG(DEBUG_SMI))
https://review.coreboot.org/c/coreboot/+/68567/comment/a5e42aad_37749b6d
PS4, Line 49: if (CONFIG(DEBUG_SMI))
This should also depend on `DRIVERS_UART_8250IO`:
if (CONFIG(DRIVERS_UART_8250IO) && CONFIG(DEBUG_SMI))
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Change subject: util/scripts: Add script to show platforms, CPU, type, and date added
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Patch Set 4: Code-Review+1
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Change subject: soc/amd/mendocino: Update build rules for PSP BIOS image
......................................................................
Patch Set 10:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68136/comment/6af8a272_be4fed8a
PS9, Line 9: Donot
> Do not
Done
https://review.coreboot.org/c/coreboot/+/68136/comment/07746128_851c051b
PS9, Line 9: enabled
> When verstage runs in x86, bootblock is the first BIOS segment. […]
Done
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