coreboot-gerrit October 2022

coreboot-gerrit@coreboot.org

1 participants
5881 discussions

[S] Change in coreboot[master]: [TESTONLY] Check if cacheability matters for SMM
by Arthur Heymans (Code Review) 25 Oct '22

25 Oct '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68816 ) Change subject: [TESTONLY] Check if cacheability matters for SMM ...................................................................... [TESTONLY] Check if cacheability matters for SMM Change-Id: Ia0f951a9d86a6a4ffef9fc46b0307aeb1b3c6045 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/elkhartlake/finalize.c 1 file changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/68816/1 diff --git a/src/soc/intel/elkhartlake/finalize.c b/src/soc/intel/elkhartlake/finalize.c index d6ab737..c56a5ec 100644 --- a/src/soc/intel/elkhartlake/finalize.c +++ b/src/soc/intel/elkhartlake/finalize.c @@ -20,6 +20,7 @@ #include <soc/soc_chip.h> #include <soc/systemagent.h> #include <spi-generic.h> +#include <cpu/x86/mtrr.h> static void pch_finalize(void) { @@ -43,6 +44,11 @@ printk(BIOS_DEBUG, "Finalizing chipset.\n"); pch_finalize(); + + uintptr_t tseg_base; + size_t tseg_size; + smm_region(&tseg_base, &tseg_size); + mtrr_use_temp_range(tseg_base, tseg_size, MTRR_TYPE_UNCACHEABLE); apm_control(APM_CNT_FINALIZE); if (CONFIG(USE_FSP_NOTIFY_PHASE_READY_TO_BOOT) && CONFIG(USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE)) -- To view, visit https://review.coreboot.org/c/coreboot/+/68816 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia0f951a9d86a6a4ffef9fc46b0307aeb1b3c6045 Gerrit-Change-Number: 68816 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[master]: soc/intel/{adl,cmn}: Add/Remove LTR disqualification for UFS
by Subrata Banik (Code Review) 25 Oct '22

25 Oct '22

Attention is currently required from: Haribalaraman Ramasubramanian, Reka Norman, Rizwan Qureshi, Tim Wawrzynczak, Daniil Lunev, Meera Ravindranath, Nick Vaccaro, Divagar Mohandass. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68251 ) Change subject: soc/intel/{adl,cmn}: Add/Remove LTR disqualification for UFS ...................................................................... Patch Set 8: Code-Review+1 (3 comments) File src/soc/intel/alderlake/include/soc/ufs.h: https://review.coreboot.org/c/coreboot/+/68251/comment/f834886c_7df6b7d8 PS8, Line 26: 0x1B0C 0x1b0c https://review.coreboot.org/c/coreboot/+/68251/comment/3d8f6eca_18762070 PS8, Line 27: 0x1E30 0x1e30 File src/soc/intel/common/block/acpi/acpi/ufs.asl: https://review.coreboot.org/c/coreboot/+/68251/comment/4cc68d93_7ce1ae0d PS8, Line 67: PCH_PWRM_BASE_SIZE nit: won't this fit in line above? -- To view, visit https://review.coreboot.org/c/coreboot/+/68251 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88772b0b7dde1fca0130472a38628e72dfd6c26c Gerrit-Change-Number: 68251 Gerrit-PatchSet: 8 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Daniil Lunev <dlunev(a)google.com> Gerrit-Reviewer: Divagar Mohandass <divagar.mohandass(a)intel.com> Gerrit-Reviewer: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Kangheui Won <khwon(a)chromium.org> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Daniil Lunev <dlunev(a)google.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Divagar Mohandass <divagar.mohandass(a)intel.com> Gerrit-Comment-Date: Tue, 25 Oct 2022 16:02:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: commonlib/fsp_relocate: Fix Coverity Issues
by Jonathan Zhang (Code Review) 25 Oct '22

25 Oct '22

Attention is currently required from: Johnny Lin, Ed Sharma, Martin Roth. Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68637 ) Change subject: commonlib/fsp_relocate: Fix Coverity Issues ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/68637/comment/906dfb56_3edf7bb8 PS1, Line 9: Recently committed change 1df1cf9 resulted in some Coverity > There is no gerrit ID. […] Instead of "https://review.coreboot.org/c/coreboot/+/66819", you could just have [CB:66819] as the hyperlink, this is the convention. 66819 is the gerrit ID. -- To view, visit https://review.coreboot.org/c/coreboot/+/68637 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I635c62929e8be9a474a91a62c29c3b5ee9b0ee64 Gerrit-Change-Number: 68637 Gerrit-PatchSet: 2 Gerrit-Owner: Ed Sharma <aeddiesharma(a)fb.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Ed Sharma <aeddiesharma(a)fb.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Tue, 25 Oct 2022 15:58:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jonathan Zhang <jonzhang(a)fb.com> Comment-In-Reply-To: Ed Sharma <aeddiesharma(a)fb.com> Gerrit-MessageType: comment

1 0

[L] Change in coreboot[master]: soc/mediatek/mt8188: Add ddp driver to support eDP output
by 9elements QA (Code Review) 25 Oct '22

25 Oct '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68487 ) Change subject: soc/mediatek/mt8188: Add ddp driver to support eDP output ...................................................................... Patch Set 7: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/130662 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/130661 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/130660 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/130659 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/130658 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/130657 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/130656 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/130655 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/130654 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/130653 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/130652 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/130651 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/130650 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/130649 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/130648 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/130647 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/68487 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc0a878c609818fedd298c141bb39469fd2f6388 Gerrit-Change-Number: 68487 Gerrit-PatchSet: 7 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Tue, 25 Oct 2022 15:56:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: soc/intel/{adl,cmn}: Add/Remove LTR disqualification for UFS
by Meera Ravindranath (Code Review) 25 Oct '22

25 Oct '22

Attention is currently required from: Subrata Banik, Haribalaraman Ramasubramanian, Reka Norman, Rizwan Qureshi, Tim Wawrzynczak, Daniil Lunev, Nick Vaccaro, Divagar Mohandass. Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68251 ) Change subject: soc/intel/{adl,cmn}: Add/Remove LTR disqualification for UFS ...................................................................... Patch Set 7: (6 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/68251/comment/6bab2266_a035939b PS1, Line 8: : a) Add LTR disqualification in D3 to ensure PMC ignores LTR : from UFS IP as it is infinite. : b) Remove LTR disqualification in _PS0 to ensure PMC stops : ignoring LTR from UFS IP during D3 exit. > "LTR ignore" is a work around from IP team. TA is pending. […] Done Commit Message: https://review.coreboot.org/c/coreboot/+/68251/comment/5ce7bb9a_1bd10d99 PS6, Line 7: alderlake > {adl, cmn} Done Patchset: PS1: > > yes, that is why I am guessing 😊. […] Ack File src/soc/intel/alderlake/include/soc/ufs.h: https://review.coreboot.org/c/coreboot/+/68251/comment/ce8111e5_e84ac132 PS6, Line 26: R_PMC_PWRM_LTR_IGN > Is this in the EDS? I can't see it. yes it is, Chapter 13.3.89 in V2 EDS https://review.coreboot.org/c/coreboot/+/68251/comment/c00d94fd_63c851d9 PS6, Line 27: PCH_PWRM_BASE_SIZE > This is redefining a macro from iomap.h. Should it be called something else? […] The name suggestion came from Subrata. What would you like it to be? The region 0x1E30 indicates the offset till which we want to map the register space from the PWRM base. Ideally, anything more than 0x1B0C would do since LTR IGN is the only register we are using. But used the same offset as the reference platform code did. File src/soc/intel/common/block/acpi/acpi/ufs.asl: https://review.coreboot.org/c/coreboot/+/68251/comment/b0b5c16b_69c22000 PS6, Line 71: , 1 > Is this field supposed to be blank? Yes, indicates the 18th bit of LTR IGN register. -- To view, visit https://review.coreboot.org/c/coreboot/+/68251 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88772b0b7dde1fca0130472a38628e72dfd6c26c Gerrit-Change-Number: 68251 Gerrit-PatchSet: 7 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Daniil Lunev <dlunev(a)google.com> Gerrit-Reviewer: Divagar Mohandass <divagar.mohandass(a)intel.com> Gerrit-Reviewer: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Kangheui Won <khwon(a)chromium.org> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Daniil Lunev <dlunev(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Divagar Mohandass <divagar.mohandass(a)intel.com> Gerrit-Comment-Date: Tue, 25 Oct 2022 15:31:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Comment-In-Reply-To: Reka Norman <rekanorman(a)chromium.org> Comment-In-Reply-To: Daniil Lunev <dlunev(a)google.com> Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: soc/intel/{adl,cmn}: Add/Remove LTR disqualification for UFS
by Meera Ravindranath (Code Review) 25 Oct '22

25 Oct '22

Attention is currently required from: Haribalaraman Ramasubramanian, Rizwan Qureshi, Tim Wawrzynczak, Daniil Lunev, Meera Ravindranath, Divagar Mohandass. Hello build bot (Jenkins), Subrata Banik, Haribalaraman Ramasubramanian, Tim Wawrzynczak, Rizwan Qureshi, Daniil Lunev, Divagar Mohandass, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68251 to look at the new patch set (#7). Change subject: soc/intel/{adl,cmn}: Add/Remove LTR disqualification for UFS ...................................................................... soc/intel/{adl,cmn}: Add/Remove LTR disqualification for UFS a) Add LTR disqualification in D3 to ensure PMC ignores LTR from UFS IP as it is infinite. b) Remove LTR disqualification in _PS0 to ensure PMC stops ignoring LTR from UFS IP during D3 exit. c) Add Kconfig (SOC_INTEL_UFS_LTR_DISQUALIFY) check to apply this LTR WA. BUG=b:252975357 TEST=build and boot nirwen and see no issues in PLT runs Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I88772b0b7dde1fca0130472a38628e72dfd6c26c --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/include/soc/ufs.h M src/soc/intel/common/block/acpi/Kconfig M src/soc/intel/common/block/acpi/acpi/ufs.asl 4 files changed, 55 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/68251/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/68251 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88772b0b7dde1fca0130472a38628e72dfd6c26c Gerrit-Change-Number: 68251 Gerrit-PatchSet: 7 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Daniil Lunev <dlunev(a)google.com> Gerrit-Reviewer: Divagar Mohandass <divagar.mohandass(a)intel.com> Gerrit-Reviewer: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Kangheui Won <khwon(a)chromium.org> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Daniil Lunev <dlunev(a)google.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Divagar Mohandass <divagar.mohandass(a)intel.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: Update vboot submodule to upstream main
by Jakub Czapiga (Code Review) 25 Oct '22

25 Oct '22

Attention is currently required from: Julius Werner, Yu-Ping Wu. Hello build bot (Jenkins), Julius Werner, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68540 to look at the new patch set (#4). Change subject: Update vboot submodule to upstream main ...................................................................... Update vboot submodule to upstream main Updating from commit id b827ddb9: 2022-09-01 06:37:33 +0000 - (tests: Ensure auxfw sync runs after EC sync) to commit id 148e5b83: 2022-10-25 09:36:59 +0000 - (Makefile: Fix and simplify the RUNTEST test wrapper) This brings in 28 new commits: 148e5b83 Makefile: Fix and simplify the RUNTEST test wrapper a9c47c41 futility/cmd_show: set uninitialized variable e18a6cda gscvd: presume GBB flags are zero when hashing the RO space contents 0b0aee9c gscvd: refactor discovering GBB in the image ff1749cb futility: add option to save ro_gscvd section in a blob 84c65cd3 vboot_reference: Check OS/firmware mismatch and report to UMA 9a1be550 cmd_update: avoid variable name aliasing d0f7fdf6 treewide: Fix copyrights and extra new lines at end of file 0ca75fd1 tpm_lite: Fix copyrights, line endings, extra new lines at end of file 4ca43a34 crossystem: arm: Retry if we fail to read a GPIO f1a7efc0 futility: updater: Scan patch files for the signer_config manifest 64803227 futility: updater: Support patching GSCVD 2aa69d0c futility: Remove validate_rec_mrc command 0ca7a9e4 firmware: host: futility: Add CBFS metadata hash support aaeb307f futility: Use ccd update mode for suzyq ti50 aa44b7cf vboot: gbb_flags_common should treat ccd_ti50 like ccd_cr50 ff8bb2d9 futility: Address double free 6a33a0fc treewide: Fix license headers to conform with linter b2b4f767 DIR_METADATA: Add V2 Test Plans. 5346938c futility gscvd: add option to print out root key hash 5790c0aa gscvd: add support for reading ranges from the image 499e5743 gbb_flags_common.sh: Restore tmpfile cleanup trap f3f9d2a6 scripts/OWNERS: Fix engeg email chromium -> google ce620761 tests: Remove --allow-multiple-definition linker option 956c2efb futility: Skip picking apart an x86 kernel if has the EFI stub 9f2e9804 Avoid build failures on recent distros 62cc7885 subprocess: Log subprocess arguments when running 3bd35108 2api: Add a new entry point for only loading and verifying the kernel Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> Change-Id: I9a16d6e02cee34140ec375ed6166f47560459140 --- M 3rdparty/vboot 1 file changed, 47 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/68540/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/68540 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9a16d6e02cee34140ec375ed6166f47560459140 Gerrit-Change-Number: 68540 Gerrit-PatchSet: 4 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: Update vboot submodule to upstream master
by Jakub Czapiga (Code Review) 25 Oct '22

25 Oct '22

Attention is currently required from: Julius Werner, Yu-Ping Wu. Jakub Czapiga has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68540 ) Change subject: Update vboot submodule to upstream master ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/68540/comment/0e073012_4825a157 PS2, Line 7: 3rdparty/vboot: Upgrade submodule to latest version > Could you use `util/scripts/update_submodules -R . […] Sure, It's done. I had problems with pipefail on line 120 because grep exits soon, but I updated script for my case locally. It was probably caused by my changes anyway. -- To view, visit https://review.coreboot.org/c/coreboot/+/68540 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9a16d6e02cee34140ec375ed6166f47560459140 Gerrit-Change-Number: 68540 Gerrit-PatchSet: 3 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 25 Oct 2022 15:23:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: Update vboot submodule to upstream master
by build bot (Jenkins) (Code Review) 25 Oct '22

25 Oct '22

Attention is currently required from: Jakub Czapiga, Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68540 ) Change subject: Update vboot submodule to upstream master ...................................................................... Patch Set 3: (6 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161246): https://review.coreboot.org/c/coreboot/+/68540/comment/fc6f33e5_0e184485 PS3, Line 9: Updating from commit id b827ddb9: Possible unwrapped commit description (prefer a maximum 72 chars per line) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161246): https://review.coreboot.org/c/coreboot/+/68540/comment/d822a539_a727baa5 PS3, Line 12: to commit id 148e5b83: Possible unwrapped commit description (prefer a maximum 72 chars per line) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161246): https://review.coreboot.org/c/coreboot/+/68540/comment/1123cb85_99e984f2 PS3, Line 17: a9c47c41 futility/cmd_show: set uninitialized variable Possible unwrapped commit description (prefer a maximum 72 chars per line) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161246): https://review.coreboot.org/c/coreboot/+/68540/comment/585f98d4_e1f0a265 PS3, Line 23: d0f7fdf6 treewide: Fix copyrights and extra new lines at end of file Possible unwrapped commit description (prefer a maximum 72 chars per line) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161246): https://review.coreboot.org/c/coreboot/+/68540/comment/3c302c80_ce5a60e4 PS3, Line 25: 4ca43a34 crossystem: arm: Retry if we fail to read a GPIO Possible unwrapped commit description (prefer a maximum 72 chars per line) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161246): https://review.coreboot.org/c/coreboot/+/68540/comment/9913a905_645933d9 PS3, Line 42: 62cc7885 subprocess: Log subprocess arguments when running Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/68540 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9a16d6e02cee34140ec375ed6166f47560459140 Gerrit-Change-Number: 68540 Gerrit-PatchSet: 3 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 25 Oct 2022 15:23:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: Update vboot submodule to upstream master
by Jakub Czapiga (Code Review) 25 Oct '22

25 Oct '22

Attention is currently required from: Jakub Czapiga, Julius Werner. Hello build bot (Jenkins), Julius Werner, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68540 to look at the new patch set (#3). Change subject: Update vboot submodule to upstream master ...................................................................... Update vboot submodule to upstream master Updating from commit id b827ddb9: 2022-09-01 06:37:33 +0000 - (tests: Ensure auxfw sync runs after EC sync) to commit id 148e5b83: 2022-10-25 09:36:59 +0000 - (Makefile: Fix and simplify the RUNTEST test wrapper) This brings in 28 new commits: 148e5b83 Makefile: Fix and simplify the RUNTEST test wrapper a9c47c41 futility/cmd_show: set uninitialized variable e18a6cda gscvd: presume GBB flags are zero when hashing the RO space contents 0b0aee9c gscvd: refactor discovering GBB in the image ff1749cb futility: add option to save ro_gscvd section in a blob 84c65cd3 vboot_reference: Check OS/firmware mismatch and report to UMA 9a1be550 cmd_update: avoid variable name aliasing d0f7fdf6 treewide: Fix copyrights and extra new lines at end of file 0ca75fd1 tpm_lite: Fix copyrights, line endings, extra new lines at end of file 4ca43a34 crossystem: arm: Retry if we fail to read a GPIO f1a7efc0 futility: updater: Scan patch files for the signer_config manifest 64803227 futility: updater: Support patching GSCVD 2aa69d0c futility: Remove validate_rec_mrc command 0ca7a9e4 firmware: host: futility: Add CBFS metadata hash support aaeb307f futility: Use ccd update mode for suzyq ti50 aa44b7cf vboot: gbb_flags_common should treat ccd_ti50 like ccd_cr50 ff8bb2d9 futility: Address double free 6a33a0fc treewide: Fix license headers to conform with linter b2b4f767 DIR_METADATA: Add V2 Test Plans. 5346938c futility gscvd: add option to print out root key hash 5790c0aa gscvd: add support for reading ranges from the image 499e5743 gbb_flags_common.sh: Restore tmpfile cleanup trap f3f9d2a6 scripts/OWNERS: Fix engeg email chromium -> google ce620761 tests: Remove --allow-multiple-definition linker option 956c2efb futility: Skip picking apart an x86 kernel if has the EFI stub 9f2e9804 Avoid build failures on recent distros 62cc7885 subprocess: Log subprocess arguments when running 3bd35108 2api: Add a new entry point for only loading and verifying the kernel Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> Change-Id: I9a16d6e02cee34140ec375ed6166f47560459140 --- M 3rdparty/vboot 1 file changed, 47 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/68540/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68540 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9a16d6e02cee34140ec375ed6166f47560459140 Gerrit-Change-Number: 68540 Gerrit-PatchSet: 3 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit October 2022