coreboot-gerrit October 2022

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[M] Change in coreboot[master]: payloads/external/edk2: Add option to clone edk2-platforms repo
by Michał Żygowski (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Martin L Roth, Paul Menzel, Stefan Reinauer. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68872 ) Change subject: payloads/external/edk2: Add option to clone edk2-platforms repo ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/68872/comment/4b5eb99d_d4c7daaa PS1, Line 7: paltforms > platforms Done https://review.coreboot.org/c/coreboot/+/68872/comment/04dd8515_239971ed PS1, Line 12: > Please also give one specific example. Added -- To view, visit https://review.coreboot.org/c/coreboot/+/68872 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iabd0793dfdcb95260046dc992ff30ef581159db9 Gerrit-Change-Number: 68872 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Wed, 26 Oct 2022 11:03:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brask/variants/moli: keep SAGV disable
by Raihow Shi (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Tim Wawrzynczak. Raihow Shi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68898 ) Change subject: mb/google/brask/variants/moli: keep SAGV disable ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/68898/comment/90997942_b8509749 PS1, Line 9: Since there is not too many low power requirement and moli is doing FSI > Possible unwrapped commit description (prefer a maximum 72 chars per line) Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/68898 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4115b35fed35b74a307b08f7a10ebced2309297f Gerrit-Change-Number: 68898 Gerrit-PatchSet: 3 Gerrit-Owner: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Comment-Date: Wed, 26 Oct 2022 11:03:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brask/variants/moli: keep SAGV disable
by Raihow Shi (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Tim Wawrzynczak. Hello Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68898 to look at the new patch set (#3). Change subject: mb/google/brask/variants/moli: keep SAGV disable ...................................................................... mb/google/brask/variants/moli: keep SAGV disable Since there is not too many low power requirement for moli and it is doing FSI firmware qual, so it is not critical to enable the SAGV and keep SAGV disable. BUG=b:254600066 TEST=emerge-brask coreboot Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Change-Id: I4115b35fed35b74a307b08f7a10ebced2309297f --- M src/mainboard/google/brya/variants/moli/overridetree.cb 1 file changed, 15 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/68898/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68898 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4115b35fed35b74a307b08f7a10ebced2309297f Gerrit-Change-Number: 68898 Gerrit-PatchSet: 3 Gerrit-Owner: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: payloads/external/edk2: Add option to clone edk2-platforms repo
by Michał Żygowski (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Michał Żygowski, Martin L Roth, Stefan Reinauer. Hello build bot (Jenkins), Martin L Roth, Stefan Reinauer, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68872 to look at the new patch set (#2). Change subject: payloads/external/edk2: Add option to clone edk2-platforms repo ...................................................................... payloads/external/edk2: Add option to clone edk2-platforms repo Add possibility to clone edk2-platforms repository. Some edk2 repositories may use modules from edk2-platforms which contains various feature packages for Intel platforms, e.g VT-d driver if DMA protection is enabled. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: Iabd0793dfdcb95260046dc992ff30ef581159db9 --- M payloads/external/Makefile.inc M payloads/external/edk2/Kconfig M payloads/external/edk2/Makefile 3 files changed, 76 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/68872/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68872 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iabd0793dfdcb95260046dc992ff30ef581159db9 Gerrit-Change-Number: 68872 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/brask/variants/moli: keep SAGV disable
by Raihow Shi (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Tim Wawrzynczak. Hello Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68898 to look at the new patch set (#2). Change subject: mb/google/brask/variants/moli: keep SAGV disable ...................................................................... mb/google/brask/variants/moli: keep SAGV disable Since there is not too many low power requirement for moli and moli is doing FSI firmware qual, so it is not critical to enable the SAGV and keep SAGV disable. BUG=b:254600066 TEST=emerge-brask coreboot Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Change-Id: I4115b35fed35b74a307b08f7a10ebced2309297f --- M src/mainboard/google/brya/variants/moli/overridetree.cb 1 file changed, 15 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/68898/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68898 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4115b35fed35b74a307b08f7a10ebced2309297f Gerrit-Change-Number: 68898 Gerrit-PatchSet: 2 Gerrit-Owner: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/brask/variants/moli: keep SAGV disable
by build bot (Jenkins) (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Tim Wawrzynczak. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68898 ) Change subject: mb/google/brask/variants/moli: keep SAGV disable ...................................................................... Patch Set 1: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161402): https://review.coreboot.org/c/coreboot/+/68898/comment/bbd2f4de_ab077468 PS1, Line 9: Since there is not too many low power requirement and moli is doing FSI Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/68898 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4115b35fed35b74a307b08f7a10ebced2309297f Gerrit-Change-Number: 68898 Gerrit-PatchSet: 1 Gerrit-Owner: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Comment-Date: Wed, 26 Oct 2022 10:59:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brask/variants/moli: keep SAGV disable
by Raihow Shi (Code Review) 26 Oct '22

26 Oct '22

Raihow Shi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68898 ) Change subject: mb/google/brask/variants/moli: keep SAGV disable ...................................................................... mb/google/brask/variants/moli: keep SAGV disable Since there is not too many low power requirement and moli is doing FSI firmware qual, so it is not critical to enable the SAGV and keep SAGV disable. BUG=b:254600066 TEST=emerge-brask coreboot Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Change-Id: I4115b35fed35b74a307b08f7a10ebced2309297f --- M src/mainboard/google/brya/variants/moli/overridetree.cb 1 file changed, 16 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/68898/1 diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb index 5612b6e..2d35e14 100644 --- a/src/mainboard/google/brya/variants/moli/overridetree.cb +++ b/src/mainboard/google/brya/variants/moli/overridetree.cb @@ -14,7 +14,6 @@ end end chip soc/intel/alderlake - register "sagv" = "SaGv_Enabled" # Enable HDMI2 in PortA, HDMI1 in PortB, HDMI/DP in Port2 register "ddi_ports_config" = "{ [DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, -- To view, visit https://review.coreboot.org/c/coreboot/+/68898 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4115b35fed35b74a307b08f7a10ebced2309297f Gerrit-Change-Number: 68898 Gerrit-PatchSet: 1 Gerrit-Owner: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: nb/intel/i945: Check if channel 0 and 1 are populated
by Elyes Haouas (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Arthur Heymans. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68781 ) Change subject: nb/intel/i945: Check if channel 0 and 1 are populated ...................................................................... Patch Set 1: Code-Review-1 (1 comment) Patchset: PS1: > Does this fix anything? Should the rcomp be programmed on the actual configuration or based on the c […] unfortunately, it fix nothing. currently, as there is no datasheet, it needs more investigation. -- To view, visit https://review.coreboot.org/c/coreboot/+/68781 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia77861e5f44501b5d92707977597e143b439e9d4 Gerrit-Change-Number: 68781 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 26 Oct 2022 10:51:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: spd/lp5: Re-generate the SPD data
by EricKY Cheng (Code Review) 26 Oct '22

26 Oct '22

EricKY Cheng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68873 ) Change subject: spd/lp5: Re-generate the SPD data ...................................................................... spd/lp5: Re-generate the SPD data Re-generate Hynix H58G66BK7BX067 and H58G56BK7BX068 data with current spd_tools. BUG=b:243337816 BRANCH=None TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5 Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Change-Id: I19ae0477dea64f2cdd37b6aa51eadd6957c54059 --- M spd/lp5/set-1/spd-7.hex M spd/lp5/set-1/spd-8.hex 2 files changed, 19 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/68873/1 diff --git a/spd/lp5/set-1/spd-7.hex b/spd/lp5/set-1/spd-7.hex index 8b18d49..a38dbbd 100644 --- a/spd/lp5/set-1/spd-7.hex +++ b/spd/lp5/set-1/spd-7.hex @@ -1,4 +1,4 @@ -23 11 15 0E 86 21 95 18 00 40 00 00 02 02 00 00 +23 11 13 0E 86 21 95 18 00 40 00 00 02 02 00 00 00 00 03 00 00 00 00 00 2B 00 90 A8 90 C0 08 60 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/spd/lp5/set-1/spd-8.hex b/spd/lp5/set-1/spd-8.hex index 0602fef..e08c695 100644 --- a/spd/lp5/set-1/spd-8.hex +++ b/spd/lp5/set-1/spd-8.hex @@ -1,4 +1,4 @@ -23 11 15 0E 86 21 B5 18 00 40 00 00 0A 02 00 00 +23 11 13 0E 86 21 B5 18 00 40 00 00 0A 02 00 00 00 00 03 00 00 00 00 00 2B 00 90 A8 90 C0 08 60 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -- To view, visit https://review.coreboot.org/c/coreboot/+/68873 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19ae0477dea64f2cdd37b6aa51eadd6957c54059 Gerrit-Change-Number: 68873 Gerrit-PatchSet: 1 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: cpu/x86/smm: Move setting up 64bit mode earlier
by Arthur Heymans (Code Review) 26 Oct '22

26 Oct '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68897 ) Change subject: cpu/x86/smm: Move setting up 64bit mode earlier ...................................................................... cpu/x86/smm: Move setting up 64bit mode earlier Now there is no need to do it that late in the smm stub. Since we don't need the stack to save EFER MSR anymore. This also removes the need exit back to protected mode for the fxrstor instruction. A further advantage is that all XMM regs (remember that there are more in long mode) are now properly saved. Change-Id: Ie247d6fba0dbc953a810038465f1e0d42ca171cf Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/smm/smm_stub.S 1 file changed, 21 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/68897/1 diff --git a/src/cpu/x86/smm/smm_stub.S b/src/cpu/x86/smm/smm_stub.S index f34eeaf..550d498 100644 --- a/src/cpu/x86/smm/smm_stub.S +++ b/src/cpu/x86/smm/smm_stub.S @@ -136,6 +136,10 @@ movw %ax, %fs movw %ax, %gs /* Used by cpu_info in ramstage */ +#if ENV_X86_64 +#include <cpu/x86/64bit/entry64.inc> +#endif + /* The CPU number is calculated by reading the initial APIC id. Since * the OS can manipulate the APIC id use the non-changing cpuid result * for APIC id (eax). A table is used to handle a discontiguous @@ -231,12 +235,6 @@ * c_handler(&arg) */ #if ENV_X86_64 - mov %ecx, %edi - /* entry64.inc preserves ebx, esi, edi, ebp */ -#include <cpu/x86/64bit/entry64.inc> - mov %edi, %ecx - - push %rbx /* uintptr_t *canary */ push %rcx /* size_t cpu */ @@ -244,14 +242,6 @@ movabs c_handler, %eax call *%rax - - /* - * The only reason to go back to protected mode is because we called fxsave - * protected mode. - */ - - /* Disable long mode. */ - #include <cpu/x86/64bit/exit32.inc> #else push $0x0 /* Padding */ push %ebx /* uintptr_t *canary */ -- To view, visit https://review.coreboot.org/c/coreboot/+/68897 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie247d6fba0dbc953a810038465f1e0d42ca171cf Gerrit-Change-Number: 68897 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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coreboot-gerrit October 2022