Bharath N has uploaded this change for review. ( https://review.coreboot.org/c/qc_blobs/+/68889 )
Change subject: sc7280/qtiseclib: Update qtiseclib blobs binaries and release notes from 63 to 69
......................................................................
sc7280/qtiseclib: Update qtiseclib blobs binaries and release notes from 63 to 69
TEST=Validated on qualcomm sc7280 development board
Signed-off-by: Bharath N <quic_bharn(a)quicinc.com>
Change-Id: I3a3bf0f9c6861920e358021332af5f4f8bc7ca71
---
M sc7280/qtiseclib/Release_Notes.txt
M sc7280/qtiseclib/libqtisec.a
2 files changed, 31 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/qc_blobs refs/changes/89/68889/1
diff --git a/sc7280/qtiseclib/Release_Notes.txt b/sc7280/qtiseclib/Release_Notes.txt
index f491a04..3704a57 100644
--- a/sc7280/qtiseclib/Release_Notes.txt
+++ b/sc7280/qtiseclib/Release_Notes.txt
@@ -1,3 +1,22 @@
+=================== Release 00069 ================================
+This Release Notes file covers these blobs:
+ * libqtisec.a
+
+Version : 00069
+
+Release Date : Oct 14, 2022
+
+Supported Silicon : SC7280
+
+Changes since last version :
+ * code optimization in sysini
+ * static analysis fixes
+ * NOC error scripts
+
+No special instructions, requirements or dependencies, files must be
+present in this folder to be pulled in during coreboot build
+
+Errata : Nothing to report
=================== Release 00063 ================================
This Release Notes file covers these blobs:
* libqtisec.a
diff --git a/sc7280/qtiseclib/libqtisec.a b/sc7280/qtiseclib/libqtisec.a
index 28f623c..de54314 100644
--- a/sc7280/qtiseclib/libqtisec.a
+++ b/sc7280/qtiseclib/libqtisec.a
Binary files differ
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Change subject: mb/google/brask/var/lisbon: Update gpio table
......................................................................
Patch Set 3:
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Kevin Chiu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68888 )
Change subject: mb/google/brya/var/lisbon: Include driver for GL9763E for eMMC boot disk
......................................................................
mb/google/brya/var/lisbon: Include driver for GL9763E for eMMC boot disk
Support GL9763E as a eMMC boot disk
BUG=b:246657849
TEST=FW_NAME=lisbon emerge-brask coreboot
Signed-off-by: Kevin Chiu <kevin.chiu.17802(a)gmail.com>
Change-Id: Ibe579a913225b5241412bbb1b8ea995a5102a3bb
---
M src/mainboard/google/brya/Kconfig.name
1 file changed, 16 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/68888/1
diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name
index 9992eea..d7b26da 100644
--- a/src/mainboard/google/brya/Kconfig.name
+++ b/src/mainboard/google/brya/Kconfig.name
@@ -273,6 +273,7 @@
bool "-> Lisbon"
select BOARD_GOOGLE_BASEBOARD_BRASK
select DRIVERS_GENESYSLOGIC_GL9750
+ select DRIVERS_GENESYSLOGIC_GL9763E
config BOARD_GOOGLE_ZYDRON
bool "-> Zydron"
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Change subject: Revert "soc/intel/systemagent.c: Fix memory type reporting"
......................................................................
Patch Set 1: Code-Review+1
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Change subject: mb/google/brya/gaelin: Configure DRIVER_TPM_I2C_BUS
......................................................................
Patch Set 2: Code-Review+1
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Change subject: mb/google/brya: Update devicetree setting for lisbon
......................................................................
Patch Set 4:
This change is ready for review.
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Change subject: mb/google/brya/var/lisbon: use i2c1 for TPM for lisbon
......................................................................
mb/google/brya/var/lisbon: use i2c1 for TPM for lisbon
This change sets DRIVER_TPM_I2C_BUS to the i2c 1 bus for TPM for the
lisbon variant.
BUG=b:246657849
TEST=FW_NAME=lisbon emerge-brask coreboot
Signed-off-by: Kevin Chiu <kevin.chiu.17802(a)gmail.com>
Change-Id: I16be50258db2111d22f7465458873e92f44c7dac
---
M src/mainboard/google/brya/Kconfig
1 file changed, 17 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/68887/1
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 7b1b783..f54e96b 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -149,6 +149,7 @@
default 0x0 if BOARD_GOOGLE_XIVU
default 0x0 if BOARD_GOOGLE_YAVIKS
default 0x1 if BOARD_GOOGLE_ZYDRON
+ default 0x1 if BOARD_GOOGLE_LISBON
config DRIVER_TPM_I2C_ADDR
hex
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Change subject: Revert "soc/intel/systemagent.c: Fix memory type reporting"
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68879/comment/1481f3f9_b51a07a7
PS1, Line 12:
> Please mention that it hangs at
>
> [DEBUG] apm_control: Finalizing SMM.
>
> and at least some of the known affected systems:
>
> > mc_ehl2 and sporadic on mc_ehl1
>
> prodrive/hermes too, but not APL?
No it does not always hang there on other platforms. 'breaking the smihandler' is sufficiently specific to capture all problems.
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/64625
to look at the new patch set (#7).
Change subject: cpu/x86/mp_init.c: Generate a C header to get start32 offset
......................................................................
cpu/x86/mp_init.c: Generate a C header to get start32 offset
In the current design the relocatable parameters are used to know the
offset of the 32bit startpoint. This requires back and forward
interaction between the stub, the loader and the mp init code. This
makes the code hard to read.
this is static information known at buildtime, so a better way to deal
with this is to generate a header that contains this offset.
Change-Id: Ic01badd2af11a6e1dbc27c8e928916fedf104b5b
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/cpu/x86/Makefile.inc
M src/cpu/x86/mp_init.c
M src/cpu/x86/smm/smm_module_loader.c
M src/cpu/x86/smm/smm_stub.S
A src/cpu/x86/smm_start32_offset.h.template
M src/include/cpu/x86/smm.h
6 files changed, 45 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/64625/7
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