coreboot-gerrit January 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: cpu/x86/lapic: Support switching to X2APIC mode
by Wonkyu Kim (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Kyösti Mälkki. Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55262 ) Change subject: cpu/x86/lapic: Support switching to X2APIC mode ...................................................................... Patch Set 15: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/55262 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19a990ba287d21ccddaa64601923f1c4830e95e9 Gerrit-Change-Number: 55262 Gerrit-PatchSet: 15 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Tue, 04 Jan 2022 22:05:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC] smp/spinlock: Use compiler builtins
by Tim Wawrzynczak (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Raul Rangel, Arthur Heymans, Kyösti Mälkki. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60253 ) Change subject: [RFC] smp/spinlock: Use compiler builtins ...................................................................... Patch Set 2: (1 comment) File src/include/smp/spinlock.h: https://review.coreboot.org/c/coreboot/+/60253/comment/30e54a47_e3d1b5de PS2, Line 28: cpu_relax dumb question from me... this looks like a no-op for non-x86 archs, so is this spinlock even useful for non-x86 anyway? looks like this "relax" terminology may be coming from the kernel, which does have some implementations for other archs. -- To view, visit https://review.coreboot.org/c/coreboot/+/60253 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6694784aa0810cd877886ef95434f62e3aefce6c Gerrit-Change-Number: 60253 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Tue, 04 Jan 2022 21:55:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Create volmar variant
by Tim Wawrzynczak (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: David Wu, Nick Vaccaro. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60766 ) Change subject: mb/google/brya: Create volmar variant ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60766 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ebf62b7a17b075c0e28fb4e8b7c501fc8db3ea3 Gerrit-Change-Number: 60766 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Tue, 04 Jan 2022 21:38:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: guybrush: Inject SPDs into APCB
by Raul Rangel (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Raul Rangel, Martin Roth, Rob Barnes. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60775 ) Change subject: guybrush: Inject SPDs into APCB ...................................................................... Patch Set 1: Code-Review+1 (1 comment) File src/mainboard/google/guybrush/Makefile.inc: https://review.coreboot.org/c/coreboot/+/60775/comment/d5c1cea6_ade14378 PS1, Line 28: APCB_CZN_D4 Should we have the amd-cezanne-fsp build generate a different file to decouple the changes? -- To view, visit https://review.coreboot.org/c/coreboot/+/60775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib21085855324e0d473dd5e258f35a52bed326901 Gerrit-Change-Number: 60775 Gerrit-PatchSet: 1 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Comment-Date: Tue, 04 Jan 2022 21:26:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: guybrush: Inject SPDs into APCB
by Rob Barnes (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Martin Roth. Hello Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60775 to look at the new patch set (#2). Change subject: guybrush: Inject SPDs into APCB ...................................................................... guybrush: Inject SPDs into APCB Inject SPDs into APCB at coreboot build time. BUG=b:209486191 BRANCH=None TEST=Boot guybrush and nipperkin with injected APCB Change-Id: Ib21085855324e0d473dd5e258f35a52bed326901 Signed-off-by: Rob Barnes <robbarnes(a)google.com> --- M Makefile.inc M src/mainboard/google/guybrush/Makefile.inc 2 files changed, 12 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/60775/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib21085855324e0d473dd5e258f35a52bed326901 Gerrit-Change-Number: 60775 Gerrit-PatchSet: 2 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/apcb: Add apcb_v3_edit tool
by Rob Barnes (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Rob Barnes. Hello build bot (Jenkins), Raul Rangel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60281 to look at the new patch set (#4). Change subject: util/apcb: Add apcb_v3_edit tool ...................................................................... util/apcb: Add apcb_v3_edit tool apcb_v3_edit.py tool edits APCB V3 binaries. Specifically it will inject up to 16 SPDs into an existing APCB. The APCB must have a magic number at the top of each SPD slot. BUG=b:209486191 BRANCH=None TEST=Inject 4 SPDs into magic APCB, boot guybrush with modified APCB Change-Id: I9148977c415df41210a3a13a1cd9b3bc1504a480 Signed-off-by: Rob Barnes <robbarnes(a)google.com> --- M Documentation/util.md A util/apcb/apcb_v3_edit.py M util/apcb/description.md 3 files changed, 161 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/60281/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/60281 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9148977c415df41210a3a13a1cd9b3bc1504a480 Gerrit-Change-Number: 60281 Gerrit-PatchSet: 4 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/apcb: Add apcb_v3_edit tool
by Raul Rangel (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Rob Barnes. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60281 ) Change subject: util/apcb: Add apcb_v3_edit tool ...................................................................... Patch Set 3: Code-Review+2 (1 comment) File util/apcb/apcb_v3_edit.py: https://review.coreboot.org/c/coreboot/+/60281/comment/4944e659_03c9fd8a PS2, Line 81: fromhex > Are you suggesting to check that the hex byte is in range? As is, this will cause an ValueError and […] I as referring to the --hex. If you pass in `--hex=false` we shouldn't call fromhex. Looks like you got rid of the --hex so all inputs are in hex format? -- To view, visit https://review.coreboot.org/c/coreboot/+/60281 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9148977c415df41210a3a13a1cd9b3bc1504a480 Gerrit-Change-Number: 60281 Gerrit-PatchSet: 3 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Comment-Date: Tue, 04 Jan 2022 21:24:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Rob Barnes <robbarnes(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common/block/include/lpc: add comment about RANGE_UNIT values
by Raul Rangel (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60771 ) Change subject: soc/amd/common/block/include/lpc: add comment about RANGE_UNIT values ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60771 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22f3485ec81f76af7e0e96b7c1271d5ccf52e701 Gerrit-Change-Number: 60771 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 04 Jan 2022 21:19:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common/lpc/espi_util: move register definitions to header file
by Raul Rangel (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60770 ) Change subject: soc/amd/common/lpc/espi_util: move register definitions to header file ...................................................................... Patch Set 1: (1 comment) File src/soc/amd/common/block/lpc/espi_util.c: https://review.coreboot.org/c/coreboot/+/60770/comment/b715c7e6_4482b850 PS1, Line 13: < Did you mean ""? -- To view, visit https://review.coreboot.org/c/coreboot/+/60770 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I814192b2dfeff05877ac857dd89e8cdc7ae5ee25 Gerrit-Change-Number: 60770 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 04 Jan 2022 21:19:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/gpio: Skip GPP pad lock config if config is not set
by Subrata Banik (Code Review) 04 Jan '22

04 Jan '22

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60776 ) Change subject: soc/intel/common/gpio: Skip GPP pad lock config if config is not set ...................................................................... soc/intel/common/gpio: Skip GPP pad lock config if config is not set Don't perform GPP lock configuration if SOC_INTEL_COMMON_BLOCK_SMM_LOCK_GPIO_PADS config is not selected. This patch fixes a compilation issue when APL/GLK boards are failing while gpio_lock_pads() function is getting called from IA common gpio block. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I392dc2007dba8169e480f82b58b7f0a1578bb09f --- M src/soc/intel/common/block/gpio/gpio.c 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/60776/1 diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c index 3a6f7b7..48de269 100644 --- a/src/soc/intel/common/block/gpio/gpio.c +++ b/src/soc/intel/common/block/gpio/gpio.c @@ -471,6 +471,9 @@ uint32_t data; gpio_t pad; + if (!CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_LOCK_GPIO_PADS)) + return -1; + /* * FSP-S will unlock all the GPIO pads and hide the P2SB device. With * the device hidden, we will not be able to send the sideband interface -- To view, visit https://review.coreboot.org/c/coreboot/+/60776 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I392dc2007dba8169e480f82b58b7f0a1578bb09f Gerrit-Change-Number: 60776 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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coreboot-gerrit January 2022