coreboot-gerrit January 2022

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Change in coreboot[master]: soc/intel/alderlake: Add Alder Lake P IGD device IDs
by Subrata Banik (Code Review) 31 Jan '22

31 Jan '22

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61441 ) Change subject: soc/intel/alderlake: Add Alder Lake P IGD device IDs ...................................................................... Patch Set 7: (1 comment) Patchset: PS6: > Hi Tim, Would you please help to submit this change? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/61441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0cafe92581c454da5e4aeafd7ad52f0e65370b11 Gerrit-Change-Number: 61441 Gerrit-PatchSet: 7 Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Comment-Date: Mon, 31 Jan 2022 04:39:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add Alder Lake P IGD device IDs
by Subrata Banik (Code Review) 31 Jan '22

31 Jan '22

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61441 ) Change subject: soc/intel/alderlake: Add Alder Lake P IGD device IDs ...................................................................... soc/intel/alderlake: Add Alder Lake P IGD device IDs This patch adds additional IGD device IDs as per document 638514. BUG=b:216420554 TEST=coreboot is able to probe the IGD device during PCI enumeration. Change-Id: I0cafe92581c454da5e4aeafd7ad52f0e65370b11 Signed-off-by: Kane Chen <kane.chen(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61441 Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/include/device/pci_ids.h M src/soc/intel/alderlake/bootblock/report_platform.c M src/soc/intel/common/block/graphics/graphics.c 3 files changed, 9 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Sridhar Siricilla: Looks good to me, but someone else must approve Subrata Banik: Looks good to me, approved diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 22962c3..6b53bb0 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3902,6 +3902,9 @@ #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_4 0x46a8 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_5 0x46b3 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_6 0x46a6 +#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_7 0x4628 +#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_8 0x46b1 +#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_9 0x4626 #define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680 #define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0 #define PCI_DEVICE_ID_INTEL_ADL_M_GT2 0x46aa diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index 5c695f2..b419dda 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -115,6 +115,9 @@ { PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" }, + { PCI_DEVICE_ID_INTEL_ADL_P_GT2_7, "Alderlake P GT2" }, + { PCI_DEVICE_ID_INTEL_ADL_P_GT2_8, "Alderlake P GT2" }, + { PCI_DEVICE_ID_INTEL_ADL_P_GT2_9, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" }, { PCI_DEVICE_ID_INTEL_ADL_M_GT2, "Alderlake M GT2" }, { PCI_DEVICE_ID_INTEL_ADL_M_GT3, "Alderlake M GT3" }, diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 1db0e46..4b0b4c4 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -307,6 +307,9 @@ PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, + PCI_DEVICE_ID_INTEL_ADL_P_GT2_7, + PCI_DEVICE_ID_INTEL_ADL_P_GT2_8, + PCI_DEVICE_ID_INTEL_ADL_P_GT2_9, PCI_DEVICE_ID_INTEL_ADL_S_GT1, PCI_DEVICE_ID_INTEL_ADL_M_GT1, PCI_DEVICE_ID_INTEL_ADL_M_GT2, -- To view, visit https://review.coreboot.org/c/coreboot/+/61441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0cafe92581c454da5e4aeafd7ad52f0e65370b11 Gerrit-Change-Number: 61441 Gerrit-PatchSet: 7 Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/alderlake: Enable eMMC based on dev enabled
by Krishna P Bhat D (Code Review) 31 Jan '22

31 Jan '22

Attention is currently required from: Kangheui Won, Rizwan Qureshi, Reka Norman. Hello build bot (Jenkins), Kangheui Won, Tim Wawrzynczak, Rizwan Qureshi, Reka Norman, Usha P, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61129 to look at the new patch set (#9). Change subject: soc/intel/alderlake: Enable eMMC based on dev enabled ...................................................................... soc/intel/alderlake: Enable eMMC based on dev enabled 1. Add eMMC device function in pci_devs.h. 2. Enable eMMC device and configuration based on dev enabled. 3. Add SOC acpi name for eMMC. Change-Id: I44f17420f7a2a1ca0fbb6cfb1886b1617c5a5064 Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d(a)intel.com> --- M src/soc/intel/alderlake/chip.c M src/soc/intel/alderlake/chip.h M src/soc/intel/alderlake/fsp_params.c M src/soc/intel/alderlake/include/soc/pci_devs.h 4 files changed, 28 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/61129/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/61129 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I44f17420f7a2a1ca0fbb6cfb1886b1617c5a5064 Gerrit-Change-Number: 61129 Gerrit-PatchSet: 9 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Add eMMC ACPI methods for Alder Lake N
by Krishna P Bhat D (Code Review) 31 Jan '22

31 Jan '22

Attention is currently required from: Reka Norman, Krishna P Bhat D, Patrick Rudolph. Hello build bot (Jenkins), Kangheui Won, Reka Norman, Tim Wawrzynczak, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61127 to look at the new patch set (#5). Change subject: soc/intel/alderlake: Add eMMC ACPI methods for Alder Lake N ...................................................................... soc/intel/alderlake: Add eMMC ACPI methods for Alder Lake N Alder Lake N SOC has eMMC device. Add ACPI ASL methods for it. Change-Id: I53f04e81584493049d37b46e078d394d3c8a2f09 Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d(a)intel.com> --- A src/soc/intel/alderlake/acpi/scs.asl M src/soc/intel/alderlake/acpi/southbridge.asl 2 files changed, 76 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/61127/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/61127 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I53f04e81584493049d37b46e078d394d3c8a2f09 Gerrit-Change-Number: 61127 Gerrit-PatchSet: 5 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Add GPP_I GPIO group for Alder Lake N SOC
by Rizwan Qureshi (Code Review) 31 Jan '22

31 Jan '22

Attention is currently required from: Reka Norman, Tim Wawrzynczak, Krishna P Bhat D, Patrick Rudolph. Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61106 ) Change subject: soc/intel/alderlake: Add GPP_I GPIO group for Alder Lake N SOC ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61106 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia71a399c03cb7d098a381bd9439d448e8a620761 Gerrit-Change-Number: 61106 Gerrit-PatchSet: 11 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 31 Jan 2022 04:28:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Pass the EN_SPKR gpio in devicetree for nipperkin
by Karthik Ramasubramanian (Code Review) 31 Jan '22

31 Jan '22

Attention is currently required from: V sujith kumar Reddy, Raul Rangel, Rob Barnes. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60315 ) Change subject: Pass the EN_SPKR gpio in devicetree for nipperkin ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: Please refer to my comment in the previous CL. -- To view, visit https://review.coreboot.org/c/coreboot/+/60315 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icbf1e2055c30ca595d6b048e4fcf31a9bb805439 Gerrit-Change-Number: 60315 Gerrit-PatchSet: 2 Gerrit-Owner: V sujith kumar Reddy <vsujithkumar.reddy(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Yu-hsuan Hsu <yuhsuan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: V sujith kumar Reddy <vsujithkumar.reddy(a)amd.corp-partner.google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Comment-Date: Mon, 31 Jan 2022 04:21:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Pass the EN_SPKR gpio in devicetree for guybrush
by Karthik Ramasubramanian (Code Review) 31 Jan '22

31 Jan '22

Attention is currently required from: V sujith kumar Reddy, Raul Rangel, Rob Barnes. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60314 ) Change subject: Pass the EN_SPKR gpio in devicetree for guybrush ...................................................................... Patch Set 2: (2 comments) Patchset: PS2: Is File src/mainboard/google/guybrush/variants/baseboard/devicetree.cb: https://review.coreboot.org/c/coreboot/+/60314/comment/b3d6e4a7_d7ca08d7 PS2, Line 328: GPIO_31 Pass GPIO_70 in the baseboard devicetree since that will apply to both Nipperkin and Dewatt. Override it as GPIO_31 in just guybrush overridetree.cb. This will minimize the number of changes required. -- To view, visit https://review.coreboot.org/c/coreboot/+/60314 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00e433e48cd7ac157163ed9e49c3aa8dc6a850c6 Gerrit-Change-Number: 60314 Gerrit-PatchSet: 2 Gerrit-Owner: V sujith kumar Reddy <vsujithkumar.reddy(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Yu-hsuan Hsu <yuhsuan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: V sujith kumar Reddy <vsujithkumar.reddy(a)amd.corp-partner.google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Comment-Date: Mon, 31 Jan 2022 04:21:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/adlrvp: Add PMC register base for ADL-N
by Usha P (Code Review) 31 Jan '22

31 Jan '22

Attention is currently required from: Maulik V Vaghela, Rizwan Qureshi, Paul Menzel, Krishna P Bhat D, Patrick Rudolph, Felix Held. Hello build bot (Jenkins), Maulik V Vaghela, Kangheui Won, Tim Wawrzynczak, Rizwan Qureshi, Reka Norman, Krishna P Bhat D, Patrick Rudolph, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61148 to look at the new patch set (#3). Change subject: soc/intel/adlrvp: Add PMC register base for ADL-N ...................................................................... soc/intel/adlrvp: Add PMC register base for ADL-N Add PCR_PSF3_TO_SHDW_PMC_REG_BASE for Alderlake-N.This value is updated from the FSP code. Signed-off-by: Usha P <usha.p(a)intel.com> Change-Id: I7c788e149744bfae2c5260c996b16fc1ce2070c1 --- M src/soc/intel/alderlake/bootblock/pch.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/61148/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/61148 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c788e149744bfae2c5260c996b16fc1ce2070c1 Gerrit-Change-Number: 61148 Gerrit-PatchSet: 3 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede/var/galtic: Decrease core display clock to 172.8 MHz
by Karthik Ramasubramanian (Code Review) 31 Jan '22

31 Jan '22

Attention is currently required from: Frank Chu, Paul Menzel. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61103 ) Change subject: mb/google/dedede/var/galtic: Decrease core display clock to 172.8 MHz ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic059ab306f80a6d01f4b0a380a3b767d3245478d Gerrit-Change-Number: 61103 Gerrit-PatchSet: 4 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-CC: Hank Lin <hank2_lin(a)pegatron.corp-partner.google.com> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 31 Jan 2022 03:57:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/lint: Remove SuperIO from checkpatch spellcheck
by Martin Roth - Personal (Code Review) 31 Jan '22

31 Jan '22

Martin Roth - Personal has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61434 ) Change subject: util/lint: Remove SuperIO from checkpatch spellcheck ...................................................................... util/lint: Remove SuperIO from checkpatch spellcheck Patch 423e9e0fc0: Documentation/lint: Use Super I/O instead of SuperIO added the word SuperIO to the checkpatch spelling list. There were unfortunately some issues with this. 1) This introduced a problem because the comparison is used in different cases in different places. The misspelled word is compared ignoring the case, but when looking for the correct word, it looks through the list for the misspelling in all lowercase. When it couldn't find the word "superio" in the list, the variable came back uninitialized. 2) The spellcheck feature isn't enabled in checkpatch unless the option --strict is enabled, so this wasn't getting reported anyway. 3) SuperIO (or superio) will match the KCONFIG options such as CONFIG_SUPERIO_NUVOTON_NCT5104D, and suggest "Super I/O" which doesn't make any sense. Signed-off-by: Martin Roth <gaumless(a)gmail.com> Change-Id: I464305af539926ac8a45c9c0d59eeb2c78dea17a Reviewed-on: https://review.coreboot.org/c/coreboot/+/61434 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: HAOUAS Elyes <ehaouas(a)noos.fr> --- M util/lint/spelling.txt 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve HAOUAS Elyes: Looks good to me, approved diff --git a/util/lint/spelling.txt b/util/lint/spelling.txt index 3ab42b1..96a689e 100644 --- a/util/lint/spelling.txt +++ b/util/lint/spelling.txt @@ -27,7 +27,6 @@ FTBS||FTBFS POSIX-complient||POSIX-compliant READEME||README -SuperIO||Super I/O aaccessibility||accessibility aaccession||accession abailable||available -- To view, visit https://review.coreboot.org/c/coreboot/+/61434 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I464305af539926ac8a45c9c0d59eeb2c78dea17a Gerrit-Change-Number: 61434 Gerrit-PatchSet: 3 Gerrit-Owner: Martin Roth - Personal <martinroth(a)google.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth - Personal <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit January 2022