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Hello build bot (Jenkins), Furquan Shaikh, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/dedede: allow MKBP devices and disable TBMC device
......................................................................
mb/google/dedede: allow MKBP devices and disable TBMC device
Enable MKBP (Matrix Keyboard Protocol) interface for all dedede family
to use for buttons and switches. Disable TBMC (Tablet Mode Switch
device), as it is not needed anymore.
BUG=b:170966461
TEST=manual test on Madoo:
Volume Up/Down and Power buttons, Tablet Mode switch
Cq-Depend: chromium:3069163
Signed-off-by: Boris Mittelberg <bmbm(a)google.com>
Change-Id: I9d1f43e4dd56318af4c1d5f5c1c3a2c237a05c5f
---
M src/mainboard/google/dedede/variants/baseboard/include/baseboard/ec.h
1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/56840/6
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Change subject: elogtool: add "clear" command
......................................................................
Patch Set 4:
(14 comments)
File src/commonlib/bsd/elog.c:
https://review.coreboot.org/c/coreboot/+/56883/comment/c8882363_28194bed
PS4, Line 50:
I think it would be best to split this CL into two:
1. Add/move function definitions to bsd/elog.c
2. Update elogtool to support clear subcommand
Easier to review and also easier to bisect and identify any regressions later.
https://review.coreboot.org/c/coreboot/+/56883/comment/0bcceaa6_e4dff9ca
PS4, Line 51: /* Populate timestamp in event header with given time. */
I think these comments would be very helpful in elog.h.
https://review.coreboot.org/c/coreboot/+/56883/comment/bdc0a68e_be05c207
PS4, Line 82: struct
const
https://review.coreboot.org/c/coreboot/+/56883/comment/07f7919d_8f9e5e74
PS4, Line 85: uint8_t
const
File src/drivers/elog/elog.c:
https://review.coreboot.org/c/coreboot/+/56883/comment/f9a748ca_4f069855
PS4, Line 821: #if CONFIG(RTC)
I don't think this needs to be a CPP check:
```
if (CONFIG(RTC))
rtc_get(&time);
```
should work.
File util/cbfstool/elogtool.c:
https://review.coreboot.org/c/coreboot/+/56883/comment/f539351d_153226b6
PS4, Line 16: #define RW_ELOG_REGION "RW_ELOG"
I think this should also be added to bsd/elog.h. It is required by both elog driver in coreboot and the tool.
https://review.coreboot.org/c/coreboot/+/56883/comment/d7688565_2474cc06
PS4, Line 133: data_size = buf->size - sizeof(struct elog_header);
: data_offset = buf->data + sizeof(struct elog_header);
```
struct buffer event_data_buf;
struct buffer *b = &event_data_buf;
buffer_clone(b, buf);
buffer_seek(b, sizeof(struct elog_header));
```
Gets rid of some of the math that needs to be done explicitly here and also can use the buffer pointer for other cases below.
https://review.coreboot.org/c/coreboot/+/56883/comment/319777a4_6abfe2de
PS4, Line 137: if (data_size < sizeof(struct event_header) + sizeof(used_data_size) + 1)
: return ELOGTOOL_EXIT_INVALID_ELOG_FORMAT;
Rather than adding this check here, I think it would be helpful to just pass in the buffer to `eventlog_init_event()` so that it can check that there is enough buffer size before writing the new event to it. It can be useful for "add" subcommand as well.
https://review.coreboot.org/c/coreboot/+/56883/comment/1214c6ed_ccbb98ed
PS4, Line 145: (const struct event_header *)
I don't think this typecast is required.
```
event = buffer_get(b);
```
https://review.coreboot.org/c/coreboot/+/56883/comment/ad63a3b8_6d946da0
PS4, Line 147: buf->data + buf->size
I think you can add a helper for this in a separate change: `buffer_end()`
https://review.coreboot.org/c/coreboot/+/56883/comment/52039714_b6067b45
PS4, Line 175: ELOGTOOL_EXIT_BAD_INPUT_PATH
If the read was successful but write back failed, it might not really be a problem with bad path?
https://review.coreboot.org/c/coreboot/+/56883/comment/88b937a9_e9157e5d
PS4, Line 181: (uint8_t *) buf->data, buf->size
```
buffer_get(buf), buffer_size(buf));
```
https://review.coreboot.org/c/coreboot/+/56883/comment/0dc34175_e5304cf7
PS4, Line 194: /* Returned buffer must be freed. */
: struct buffer buf;
: ret = elog_read(filename, &buf);
: if (ret != 0)
: return ret;
:
I think this operation is now going to be required for each elog subcommand. We should move this to be handled by the caller and also introduce a command table to handle the commands and write back at the caller:
```
int main(...)
{
...
struct buffer buf;
ret = elog_read(filename, &buf);
if (ret)
return ret;
for (i = 0; i < ARRAY_SIZE(cmds); i++) {
if (!strcmp(cmds[i].name, argv[optind])
ret = cmds[i].func(&buf);
}
if (i == ARRAY_SIZE(cmds))
ret = ELOGTOOL_EXIT_BAD_ARGS;
if (cmds[i].write_back)
save_buffer(&buf, filename);
buffer_delete(&buf);
return ret;
}
```
`write_back` will be set by add/clear but not by list.
File util/cbfstool/eventlog.c:
https://review.coreboot.org/c/coreboot/+/56883/comment/71d3bacf_f9da1094
PS4, Line 654: (uint32_t *)&event[1];
event_get_data(event);
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Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya: allow MKBP devices and disable TBMC device
......................................................................
mb/google/brya: allow MKBP devices and disable TBMC device
Enable MKBP (Matrix Keyboard Protocol) interface for all Brya family
to use for buttons and switches. Disable TBMC (Tablet Mode Switch
device), as it is not needed anymore.
BUG=b:170966461
TEST=manual test on Brya P1: Volume Up/Down buttons
Signed-off-by: Boris Mittelberg <bmbm(a)google.com>
Change-Id: Ic9c707f57871f388c363e01c9ab78a3b358ce728
---
M src/mainboard/google/brya/variants/baseboard/brya/include/baseboard/ec.h
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/56903/3
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Hello Bhanu Prakash Maiya,
I'd like you to do a code review. Please visit
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to review the following change.
Change subject: util/mb/google: add template files for guybrush
......................................................................
util/mb/google: add template files for guybrush
Create template for guyrbsuh variant creation.
BRANCH=none
BUG=b:194031783
TEST=n/a
Change-Id: If62c1a63d0890539d4b43f840f75ee9d7ceab4f8
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya(a)google.com>
Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com>
---
A util/mainboard/google/guybrush/template/Makefile.inc
A util/mainboard/google/guybrush/template/include/variant/ec.h
A util/mainboard/google/guybrush/template/include/variant/gpio.h
A util/mainboard/google/guybrush/template/memory/Makefile.inc
A util/mainboard/google/guybrush/template/memory/dram_id.generated.txt
A util/mainboard/google/guybrush/template/memory/mem_parts_used.txt
A util/mainboard/google/guybrush/template/overridetree.cb
7 files changed, 33 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/56918/1
diff --git a/util/mainboard/google/guybrush/template/Makefile.inc b/util/mainboard/google/guybrush/template/Makefile.inc
new file mode 100644
index 0000000..88e75bd
--- /dev/null
+++ b/util/mainboard/google/guybrush/template/Makefile.inc
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+subdirs-y += ./memory
diff --git a/util/mainboard/google/guybrush/template/include/variant/ec.h b/util/mainboard/google/guybrush/template/include/variant/ec.h
new file mode 100644
index 0000000..9e61a44
--- /dev/null
+++ b/util/mainboard/google/guybrush/template/include/variant/ec.h
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/ec.h>
diff --git a/util/mainboard/google/guybrush/template/include/variant/gpio.h b/util/mainboard/google/guybrush/template/include/variant/gpio.h
new file mode 100644
index 0000000..dfaeec3
--- /dev/null
+++ b/util/mainboard/google/guybrush/template/include/variant/gpio.h
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/gpio.h>
diff --git a/util/mainboard/google/guybrush/template/memory/Makefile.inc b/util/mainboard/google/guybrush/template/memory/Makefile.inc
new file mode 100644
index 0000000..b0ca222
--- /dev/null
+++ b/util/mainboard/google/guybrush/template/memory/Makefile.inc
@@ -0,0 +1,5 @@
+## SPDX-License-Identifier: GPL-2.0-or-later
+## This is an auto-generated file. Do not edit!!
+## Add memory parts in mem_parts_used.txt and run spd_tools to regenerate.
+
+SPD_SOURCES = placeholder.spd.hex
diff --git a/util/mainboard/google/guybrush/template/memory/dram_id.generated.txt b/util/mainboard/google/guybrush/template/memory/dram_id.generated.txt
new file mode 100644
index 0000000..fa24790
--- /dev/null
+++ b/util/mainboard/google/guybrush/template/memory/dram_id.generated.txt
@@ -0,0 +1 @@
+DRAM Part Name ID to assign
diff --git a/util/mainboard/google/guybrush/template/memory/mem_parts_used.txt b/util/mainboard/google/guybrush/template/memory/mem_parts_used.txt
new file mode 100644
index 0000000..8124e4f
--- /dev/null
+++ b/util/mainboard/google/guybrush/template/memory/mem_parts_used.txt
@@ -0,0 +1,11 @@
+# This is a CSV file containing a list of memory parts used by this variant.
+# One part per line with an optional fixed ID in column 2.
+# Only include a fixed ID if it is required for legacy reasons!
+# Generated IDs are dependent on the order of parts in this file,
+# so new parts must always be added at the end of the file!
+#
+# Generate an updated Makefile.inc and dram_id.generated.txt by running the
+# gen_part_id tool from util/spd_tools/{ddr4,lp4x}.
+# See util/spd_tools/{ddr4,lp4x}/README.md for more details and instructions.
+
+# Part Name, Fixed ID (optional)
diff --git a/util/mainboard/google/guybrush/template/overridetree.cb b/util/mainboard/google/guybrush/template/overridetree.cb
new file mode 100644
index 0000000..c182265
--- /dev/null
+++ b/util/mainboard/google/guybrush/template/overridetree.cb
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+chip soc/amd/cezanne
+ device domain 0 on
+
+ end # domain
+end # chip soc/amd/cezanne
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Change subject: mb/google/brya: Configure A17 GPIO to high
......................................................................
Patch Set 3:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56882/comment/ca1fcf5f_e7e87e53
PS2, Line 7: Update A17 GPIO for USB UFC power
> Maybe: Configure USB UFC voltage to 3. […]
Updated the commit msg to better explain the change
https://review.coreboot.org/c/coreboot/+/56882/comment/c6e33e39_2e0fc89a
PS2, Line 9: A17 enables the 3.3V to UFC
> What voltage is currently used (default)?
Updated the commit msg to better explain the change
https://review.coreboot.org/c/coreboot/+/56882/comment/cdb1ae5b_d3bc8fd6
PS2, Line 10:
> Please elaborate, why you are basically reverting https://review.coreboot.org/c/coreboot/+/56655.
Done
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya: Configure A17 GPIO to high
......................................................................
mb/google/brya: Configure A17 GPIO to high
Recent change https://review.coreboot.org/c/coreboot/+/56655
turned A17 low since A17 is turned ON and OFF by IPU driver while
MIPI UFC probing, however USB UFC also requires 3.3V which is enabled
by A17, this caused USB UFC enumeration to fail
BUG=b:196014678
Signed-off-by: Varshit B Pandya <varshit.b.pandya(a)intel.com>
Change-Id: I88c204ec07b1f7511f0d88074e336cfc9116a7d2
---
M src/mainboard/google/brya/variants/baseboard/brya/gpio.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/56882/3
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Change subject: include/bcd: move bcd code to commonlib/bsd/include
......................................................................
Patch Set 2: Code-Review+1
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Change subject: mb/google/dedede: add gooey variant
......................................................................
Patch Set 3:
(4 comments)
File src/mainboard/google/dedede/variants/gooey/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/56858/comment/6c1445b1_5045458b
PS3, Line 11: #| I2C5 | P-Sensor |
Nit: Please fix the indentation.
https://review.coreboot.org/c/coreboot/+/56858/comment/b4b388be_0d4ae5ea
PS3, Line 18: .scl_lcnt = 190,
: .scl_hcnt = 100,
: .sda_hold = 40,
Coreboot recommendation is to configure rise_time_ns and fall_time_ns. I understand that it is copied from Boten. But prefer to fix it than copying and forgetting about it. Boten can be fixed in a follow-up CL.
https://review.coreboot.org/c/coreboot/+/56858/comment/cc8f7c75_be4c8dbe
PS3, Line 68:
register "SerialIoGSpiMode[PchSerialIoIndexGSPI0]" = "PchSerialIoDisabled" # Disable GSPI0
register "SerialIoGSpiCsMode[PchSerialIoIndexGSPI0]" = "0"
https://review.coreboot.org/c/coreboot/+/56858/comment/f925bfbc_134f62fe
PS3, Line 334: end # PCH eSPI
Disable GSPI 0
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