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Change subject: mb/google/guybrush/var/baseboard: Set Clk request for WLAN/SD/WWAN/SSD device
......................................................................
Patch Set 6: Code-Review+2
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Change subject: soc/intel/common: Add TGL-H PCI IDs
......................................................................
Patch Set 2:
(1 comment)
File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/56900/comment/a8395228_0c491602
PS1, Line 3942: #define PCI_DEVICE_ID_INTEL_TGL_ID_H_4_1 0x9A16
> Where did this one go?
The value doesn't exist in the CPU EDS. What I was originally looking at when I added this was TGL H35 (0x9a14/0x9a1a), but I'm not sure how those should be added.
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Change subject: mb/*/{tglrvp,volteer,deltaur}: Remove hardcoding of BSP APIC ID
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56954/comment/26d4ee6b_cdf529ba
PS2, Line 2: MAULIK V VAGHELA
Nit: It’d be great if you configured the git author to not be all capital.
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Change subject: soc/intel/alderlake: set default PL4 values for different SKUs
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
> Should these be the performance numbers? I think the defaults should be the base numbers
I thought to keep these all pl1/pl2/pl4 numbers for performance mode to get best system performance as reference.
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Hello Timofey Komarov, build bot (Jenkins), Nico Huber, Patrick Georgi, Patrick Rudolph, Maxim Polyakov, Paul Menzel, Thomas Heijligen, Edward O'Callaghan, Michael Niewöhner, Marcello Sylvester Bauer,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/50194
to look at the new patch set (#29).
Change subject: util/liveiso: Add NixOS configs for bootable live systems
......................................................................
util/liveiso: Add NixOS configs for bootable live systems
Add NixOS configurations for bootable live systems containing a set of
tools which might be useful for firmware development in general and for
working on coreboot.
There are two configurations provided. One for console-only and a
graphical one, which is mostly the same as the console image but it
comes with Gnome Shell as window manager and some graphical tools in
addition.
An image can be built using `build-console.sh`, respectively
`build-graphical.sh`. The resulting iso image can be found in
`result/iso/`.
The console image results in ~700MB, while the graphical one results in
~2GB.
Change-Id: Iaf49d198e99781434bd89d2a8a125a4988b77e1c
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M MAINTAINERS
A util/liveiso/.gitignore
A util/liveiso/build-console.sh
A util/liveiso/build-graphical.sh
A util/liveiso/common.nix
A util/liveiso/console.nix
A util/liveiso/description.md
A util/liveiso/graphical.nix
8 files changed, 250 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/50194/29
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Change subject: soc/intel/common: Add TGL-H PCI IDs
......................................................................
Patch Set 2:
(1 comment)
File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/56900/comment/bf416c27_6cc3b520
PS1, Line 3942: #define PCI_DEVICE_ID_INTEL_TGL_ID_H_4_1 0x9A16
Where did this one go?
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