coreboot-gerrit August 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/(amd,google): Remove spi configuration from devicetree
by Felix Held (Code Review) 21 Aug '21

21 Aug '21

Attention is currently required from: Jason Glenesk, Martin Roth, Marshall Dawson. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56962 ) Change subject: mb/(amd,google): Remove spi configuration from devicetree ...................................................................... Patch Set 3: Code-Review+1 (1 comment) Patchset: PS3: looks good to me, but the previous patch fails on stoneyridge -- To view, visit https://review.coreboot.org/c/coreboot/+/56962 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifdcd3f33173194c4a25794137756b143751edd70 Gerrit-Change-Number: 56962 Gerrit-PatchSet: 3 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Comment-Date: Fri, 20 Aug 2021 19:55:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne/early_fch: Perform early SPI initialization
by Felix Held (Code Review) 21 Aug '21

21 Aug '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Karthik Ramasubramanian. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56684 ) Change subject: soc/amd/cezanne/early_fch: Perform early SPI initialization ...................................................................... Patch Set 3: (1 comment) Patchset: PS1: > i've abandoned my equivalent patch and added https://review.coreboot. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/56684 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibfbe6e16bd6b0dd46c13cecf2a35f0c0b4576b88 Gerrit-Change-Number: 56684 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 20 Aug 2021 19:52:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common: Update SPI based on Kconfig & EFS instead of devtree
by Felix Held (Code Review) 21 Aug '21

21 Aug '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Furquan Shaikh, Marshall Dawson, Karthik Ramasubramanian. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56959 ) Change subject: soc/amd/common: Update SPI based on Kconfig & EFS instead of devtree ...................................................................... Patch Set 1: (4 comments) File src/soc/amd/common/block/psp/psp_efs.c: https://review.coreboot.org/c/coreboot/+/56959/comment/5ca7c1a6_dd64bfd5 PS1, Line 11: read32((uint32_t *)EFS_ADDRESS) use efs->signature here? at least for me that would clarify what we're doing here File src/soc/amd/common/block/spi/fch_spi.c: https://review.coreboot.org/c/coreboot/+/56959/comment/f0be98c7_3f368207 PS1, Line 42: ! > When would this fail? when this one would fail, we probably already failed much earlier, but i don't see a strong reason not to check it again here and apply the Kconfig defaults in that failure case https://review.coreboot.org/c/coreboot/+/56959/comment/eccd584a_94012383 PS1, Line 48: fch_spi_set_spi100(CONFIG_NORMAL_READ_SPI_SPEED, fast_speed, CONFIG_ALT_SPI_SPEED, should the normal read speed and the altio read speed the minimum speed of EFS fast read setting and Kconfig settings for those two other frequencies? the plan was to be able to change part of the spi configuration in efs by some external tool, to be able to use an automatically built image with an EM100 that often can't run at the speed a real spi flash chip would run at https://review.coreboot.org/c/coreboot/+/56959/comment/a6914123_9cf63977 PS1, Line 52: static void fch_spi_config_modes(void) i'd rename fch_spi_config_mb_modes to fch_spi_config_modes and drop this function that only does one function call -- To view, visit https://review.coreboot.org/c/coreboot/+/56959 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8a24f637b2a0061f60a8f736121d224d4c4ba69b Gerrit-Change-Number: 56959 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 20 Aug 2021 19:52:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: HACK: Herobrine: Reinit TPM INT gpio after qclib executes
by build bot (Jenkins) (Code Review) 21 Aug '21

21 Aug '21

Attention is currently required from: Shelley Chen. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57025 ) Change subject: HACK: Herobrine: Reinit TPM INT gpio after qclib executes ...................................................................... Patch Set 2: (2 comments) File src/soc/qualcomm/common/qclib.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-126475): https://review.coreboot.org/c/coreboot/+/57025/comment/2227234f_b802a82b PS2, Line 220: mainboard_blob_fix(); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-126475): https://review.coreboot.org/c/coreboot/+/57025/comment/58a8b28a_7a1cd856 PS2, Line 220: mainboard_blob_fix(); please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/57025 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c43d120ebb49800c82aec263ff8c215b60c5201 Gerrit-Change-Number: 57025 Gerrit-PatchSet: 2 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Comment-Date: Fri, 20 Aug 2021 19:44:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: HACK: Herobrine: Reinit TPM INT GPIO
by build bot (Jenkins) (Code Review) 21 Aug '21

21 Aug '21

Attention is currently required from: Shelley Chen. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57022 ) Change subject: HACK: Herobrine: Reinit TPM INT GPIO ...................................................................... Patch Set 2: (2 comments) File src/mainboard/google/herobrine/mainboard.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-126474): https://review.coreboot.org/c/coreboot/+/57022/comment/12642c0f_d34ec57b PS2, Line 51: mainboard_blob_fix(); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-126474): https://review.coreboot.org/c/coreboot/+/57022/comment/49c2223e_e8e256b5 PS2, Line 51: mainboard_blob_fix(); please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/57022 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I30426cc0392a640fb6d3b1d0fafca7e9a67a76c3 Gerrit-Change-Number: 57022 Gerrit-PatchSet: 2 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Comment-Date: Fri, 20 Aug 2021 19:43:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: HACK sc7280: QSIP SPI NOR addressing mode for SKU1 and SKU2 HACK
by build bot (Jenkins) (Code Review) 21 Aug '21

21 Aug '21

Attention is currently required from: Shelley Chen, Ravi kumar, Sudheer Amrabadi, mturney mturney. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50586 ) Change subject: HACK sc7280: QSIP SPI NOR addressing mode for SKU1 and SKU2 HACK ...................................................................... Patch Set 65: (2 comments) File src/drivers/spi/spi_flash.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-126471): https://review.coreboot.org/c/coreboot/+/50586/comment/bfd4996c_6f200f11 PS65, Line 541: while (1) suspect code indent for conditional statements (24, 24) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-126471): https://review.coreboot.org/c/coreboot/+/50586/comment/8753897c_957f40ad PS65, Line 562: while (1) suspect code indent for conditional statements (24, 24) -- To view, visit https://review.coreboot.org/c/coreboot/+/50586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ied5b647d0fcc8e3effff3bb7c8680ed5a0c1f3d4 Gerrit-Change-Number: 50586 Gerrit-PatchSet: 65 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Sajida Bhanu <sbhanu(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Comment-Date: Fri, 20 Aug 2021 19:43:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: Add PCIe RC driver in Coreboot
by build bot (Jenkins) (Code Review) 21 Aug '21

21 Aug '21

Attention is currently required from: Shelley Chen, Ravi kumar, Furquan Shaikh, Sudheer Amrabadi, Julius Werner, mturney mturney. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53902 ) Change subject: sc7280: Add PCIe RC driver in Coreboot ...................................................................... Patch Set 32: (1 comment) File src/soc/qualcomm/sc7280/include/soc/pcie.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-126464): https://review.coreboot.org/c/coreboot/+/53902/comment/574ccac1_0b10aacf PS32, Line 168: #define PCIE_DEV_FUNC (dev, func) {(PCI_SLOT(devfn)) | (PCI_FUNC(devfn))} Macros with complex values should be enclosed in parentheses -- To view, visit https://review.coreboot.org/c/coreboot/+/53902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccf60aa56541f5230fa9c3f821d7709615c36631 Gerrit-Change-Number: 53902 Gerrit-PatchSet: 32 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Comment-Date: Fri, 20 Aug 2021 19:41:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Add two sensors for DPTF functionality
by Boris Mittelberg (Code Review) 21 Aug '21

21 Aug '21

Attention is currently required from: Caveh Jalali, Sumeet R Pawnikar. Boris Mittelberg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54724 ) Change subject: mb/google/brya: Add two sensors for DPTF functionality ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Q: Do you plan to add "lower" thermal limits, at least on one sensor, so the fan would start spinnin […] As suggested in b:181271666 comment#45: based on Volteer reference we can start with 40C and 30% (minimal from the fan datasheet): ``` [1] = { .target = DPTF_TEMP_SENSOR_1, .thresholds = { TEMP_PCT(80, 90), TEMP_PCT(75, 80), TEMP_PCT(70, 70), TEMP_PCT(40, 30)} ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/54724 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc9bd6040c9bb316ec7e314f5e9c937c75cfc95a Gerrit-Change-Number: 54724 Gerrit-PatchSet: 2 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Comment-Date: Fri, 20 Aug 2021 19:07:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Boris Mittelberg <bmbm(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: WIP: Herobrine: Initialize Trackpad as MIXED mode
by Shelley Chen (Code Review) 21 Aug '21

21 Aug '21

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57065 ) Change subject: WIP: Herobrine: Initialize Trackpad as MIXED mode ...................................................................... WIP: Herobrine: Initialize Trackpad as MIXED mode This was being initialized for GSI mode, causing the kernel to be unhappy. BUG=b:197005398 BRANCH=None TEST=Boot and make sure the following messages disappeared: [ 8.497920] geni_i2c 984000.i2c: tx dma_request_slave_channel fail Signed-off-by: Shelley Chen <shchen(a)google.com> Change-Id: Ib3a406408d049e1b30db0297dc9843024c316a0c --- M src/mainboard/google/herobrine/mainboard.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/57065/1 diff --git a/src/mainboard/google/herobrine/mainboard.c b/src/mainboard/google/herobrine/mainboard.c index 23f5d0d..b4dc4a6 100644 --- a/src/mainboard/google/herobrine/mainboard.c +++ b/src/mainboard/google/herobrine/mainboard.c @@ -62,7 +62,7 @@ gpi_firmware_load(QUP_0_GSI_BASE); gpi_firmware_load(QUP_1_GSI_BASE); - qupv3_se_fw_load_and_init(QUPV3_0_SE1, SE_PROTOCOL_I2C, GSI); /* APPS I2C */ + qupv3_se_fw_load_and_init(QUPV3_0_SE1, SE_PROTOCOL_I2C, MIXED); /* Touch I2C */ /* * When coreboot firmware disables serial output, * we still need to load console UART QUP FW for OS. -- To view, visit https://review.coreboot.org/c/coreboot/+/57065 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib3a406408d049e1b30db0297dc9843024c316a0c Gerrit-Change-Number: 57065 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: WIP: Herobrine: Initialize Pen and Audio i2c devices
by Shelley Chen (Code Review) 21 Aug '21

21 Aug '21

Attention is currently required from: Shelley Chen. Hello build bot (Jenkins), Douglas Anderson, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57057 to look at the new patch set (#2). Change subject: WIP: Herobrine: Initialize Pen and Audio i2c devices ...................................................................... WIP: Herobrine: Initialize Pen and Audio i2c devices Initialized pen and audio i2c devices. Also did some cleanup alphabetizing includes. BUG=b:197005398 BRANCH=None TEST=boot into kernel grep dmesg to ensure that we don't see any error messages like: [ 4.852139] geni_i2c a9c000.i2c: Invalid proto 255 Signed-off-by: Shelley Chen <shchen(a)google.com> Change-Id: Ic6f9dfd2ed79e094b37d004106003fedff8d1d45 --- M src/mainboard/google/herobrine/mainboard.c 1 file changed, 7 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/57057/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6f9dfd2ed79e094b37d004106003fedff8d1d45 Gerrit-Change-Number: 57057 Gerrit-PatchSet: 2 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Douglas Anderson <dianders(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit August 2021