coreboot-gerrit July 2021

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Change in coreboot[master]: drivers/intel/usb4/retimer: Update code to assign correct port number
by Tim Wawrzynczak (Code Review) 01 Jul '21

01 Jul '21

Attention is currently required from: Maulik V Vaghela, Paul Menzel. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55945 ) Change subject: drivers/intel/usb4/retimer: Update code to assign correct port number ...................................................................... Patch Set 3: (3 comments) File src/drivers/intel/usb4/retimer/chip.h: https://review.coreboot.org/c/coreboot/+/55945/comment/5518ea1a_4b2390b3 PS3, Line 17: /* _PLD setting */ : struct acpi_pld_group group; This isn't necessary, it can be retrieved from the typec_port as well, see below File src/drivers/intel/usb4/retimer/retimer.c: https://review.coreboot.org/c/coreboot/+/55945/comment/7b25e6c0_71525857 PS3, Line 364: usb_port = config->dfp[dfp_port].typec_port->path.usb.port_id; should probably ensure that the device has the correct type first, e.g.: ``` if (config->dfp[dfp_port].typec_port->path.type != DEVICE_PATH_USB)) { printk(BIOS_ERR, "ERROR: typec_port for %s is not a USB device\n", dev_path(dev)); return; } ``` https://review.coreboot.org/c/coreboot/+/55945/comment/4539b1cc_cd049622 PS3, Line 373: acpi_pld_fill_usb(&pld, UPC_TYPE_PROPRIETARY, &config->dfp[dfp_port].group); : pld.shape = PLD_SHAPE_OVAL; : pld.visible = 1; : acpigen_write_pld(&pld); This can also be retrieved from the `typec_port` if you do the following: 1) Add a CL that looks like this: ``` diff --git a/src/drivers/usb/acpi/chip.h b/src/drivers/usb/acpi/chip.h index 73c69cc89f..8526541bcc 100644 --- a/src/drivers/usb/acpi/chip.h +++ b/src/drivers/usb/acpi/chip.h @@ -68,4 +68,6 @@ struct drivers_usb_acpi_config { struct acpi_gpio privacy_gpio; }; +const struct acpi_pld *usb_acpi_get_pld(const struct device *usb_port); + #endif /* __USB_ACPI_CHIP_H__ */ diff --git a/src/drivers/usb/acpi/usb_acpi.c b/src/drivers/usb/acpi/usb_acpi.c index 9d68d0a923..3c8e531ee1 100644 --- a/src/drivers/usb/acpi/usb_acpi.c +++ b/src/drivers/usb/acpi/usb_acpi.c @@ -126,3 +126,23 @@ struct chip_operations drivers_usb_acpi_ops = { CHIP_NAME("USB ACPI Device") .enable_dev = usb_acpi_enable }; + +const struct acpi_pld *usb_acpi_get_pld(const struct device *usb_port) +{ + static struct acpi_pld pld; + const struct drivers_usb_acpi_config *config; + + if (!usb_port || !usb_port->chip_info || usb_port->chip_ops != &drivers_usb_acpi_ops) + return NULL; + + config = usb_port->chip_info; + if (config->use_custom_pld) { + acpigen_write_pld(&config->custom_pld); + return &config->custom_pld; + } else { + /* Fill PLD structure based on port type */ + acpi_pld_fill_usb(&pld, config->type, &config->group); + acpigen_write_pld(&pld); + return &pld; + } +} ``` 2) #include <drivers/usb/acpi/chip.h> here 3) change this section to: ``` if (CONFIG(DRIVERS_USB_ACPI)) { const struct acpi_pld *pld = usb_acpi_get_pld(config->dfp[dfp_port].typec_port); if (pld) acpigen_write_pld(pld); else printk(BIOS_ERR, "Error retrieving PLD from USB Type-C port %u\n", usb_port); } ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/55945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib11637ae39046e0afdacd33bc34e8a59e6f2bfb1 Gerrit-Change-Number: 55945 Gerrit-PatchSet: 3 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Abhijeet Rao <abhijeet.rao(a)intel.corp-partner.google.com> Gerrit-CC: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 01 Jul 2021 19:29:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/usb4/retimer: Update code to assign correct port number
by Furquan Shaikh (Code Review) 01 Jul '21

01 Jul '21

Attention is currently required from: Maulik V Vaghela, Paul Menzel, Tim Wawrzynczak. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55945 ) Change subject: drivers/intel/usb4/retimer: Update code to assign correct port number ...................................................................... Patch Set 3: (1 comment) File src/drivers/intel/usb4/retimer/chip.h: https://review.coreboot.org/c/coreboot/+/55945/comment/1f09d37d_24d65696 PS3, Line 17: /* _PLD setting */ : struct acpi_pld_group group; This isn't required anymore since it can be derived from the typec_port device? -- To view, visit https://review.coreboot.org/c/coreboot/+/55945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib11637ae39046e0afdacd33bc34e8a59e6f2bfb1 Gerrit-Change-Number: 55945 Gerrit-PatchSet: 3 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Abhijeet Rao <abhijeet.rao(a)intel.corp-partner.google.com> Gerrit-CC: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Thu, 01 Jul 2021 19:23:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common/block/lpc: Add custom SPI DMA boot device
by Martin Roth (Code Review) 01 Jul '21

01 Jul '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55854 ) Change subject: soc/amd/common/block/lpc: Add custom SPI DMA boot device ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55854 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id26e2a69601d0f31e256d0010008904a447c8e21 Gerrit-Change-Number: 55854 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 01 Jul 2021 19:17:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Add X86_CUSTOM_BOOTMEDIA
by Martin Roth (Code Review) 01 Jul '21

01 Jul '21

Attention is currently required from: Raul Rangel, Furquan Shaikh, Marshall Dawson, Angel Pons, Andrey Petrov, Patrick Rudolph. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55853 ) Change subject: arch/x86: Add X86_CUSTOM_BOOTMEDIA ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55853 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65bbc118bde88687a7d7749c87acf1cbdc56a269 Gerrit-Change-Number: 55853 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 01 Jul 2021 19:16:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common/block/cpu: Cache the uCode to avoid multiple SPI reads
by Furquan Shaikh (Code Review) 01 Jul '21

01 Jul '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Karthik Ramasubramanian, Felix Held. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55987 ) Change subject: soc/amd/common/block/cpu: Cache the uCode to avoid multiple SPI reads ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55987 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I98b9d4ce8290a1f08063176809e903e671663208 Gerrit-Change-Number: 55987 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 01 Jul 2021 19:05:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: lib/cbfs,commonlib/mem_pool: Make cbfs_free take const pointer
by Furquan Shaikh (Code Review) 01 Jul '21

01 Jul '21

Attention is currently required from: Raul Rangel, Julius Werner. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56002 ) Change subject: lib/cbfs,commonlib/mem_pool: Make cbfs_free take const pointer ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie570825f9255d6499e977f6eace58589115e2552 Gerrit-Change-Number: 56002 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Thu, 01 Jul 2021 18:57:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/cannonlake: Switch PMC to use device callbacks
by build bot (Jenkins) (Code Review) 01 Jul '21

01 Jul '21

Attention is currently required from: Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56009 ) Change subject: soc/intel/cannonlake: Switch PMC to use device callbacks ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/cannonlake/chip.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123163): https://review.coreboot.org/c/coreboot/+/56009/comment/b745ff59_87a6d3f1 PS1, Line 198: else if (dev->path.type == DEVICE_PATH_PCI && suspect code indent for conditional statements (8, 10) -- To view, visit https://review.coreboot.org/c/coreboot/+/56009 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If292728ad975ba803fed6abea879f6f634470a11 Gerrit-Change-Number: 56009 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 01 Jul 2021 18:17:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common/espi: Fix debug message log level
by Martin Roth (Code Review) 01 Jul '21

01 Jul '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55972 ) Change subject: soc/amd/common/espi: Fix debug message log level ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55972 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0bdb92f547ceb8be624521211f4a3b94a91dae22 Gerrit-Change-Number: 55972 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 01 Jul 2021 18:00:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2: Change FSPS returned message to INFO
by Martin Roth (Code Review) 01 Jul '21

01 Jul '21

Attention is currently required from: Raul Rangel, Marshall Dawson, Andrey Petrov, Patrick Rudolph. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55971 ) Change subject: drivers/intel/fsp2: Change FSPS returned message to INFO ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55971 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifb64edbe029cafa82aec99aa50de47f51cd50dce Gerrit-Change-Number: 55971 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 01 Jul 2021 17:59:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common/block/lpc: Add custom SPI DMA boot device
by Raul Rangel (Code Review) 01 Jul '21

01 Jul '21

Attention is currently required from: Jason Glenesk, Martin Roth, Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55854 ) Change subject: soc/amd/common/block/lpc: Add custom SPI DMA boot device ...................................................................... Patch Set 2: (2 comments) File src/soc/amd/common/block/lpc/Makefile.inc: https://review.coreboot.org/c/coreboot/+/55854/comment/809c8803_058c2db2 PS1, Line 16: verstage-y += spi_dma.c > It doesn't look like this is set up for psp_verstage. […] Done File src/soc/amd/common/block/lpc/spi_dma.c: https://review.coreboot.org/c/coreboot/+/55854/comment/7309c22c_cf079cfa PS1, Line 34: memcpy(b, &mdev->base[offset], size); > Nit: Maybe add a comment here unless you think the other patches will be merged before long. I'll omit the comment since the name of the method has mmap in it. -- To view, visit https://review.coreboot.org/c/coreboot/+/55854 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id26e2a69601d0f31e256d0010008904a447c8e21 Gerrit-Change-Number: 55854 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 01 Jul 2021 17:59:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit July 2021