coreboot-gerrit July 2021

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Change in coreboot[master]: mb/google/brya: Update generic device number for mipi_camera device
by Varshit B Pandya (Code Review) 09 Jul '21

09 Jul '21

Attention is currently required from: Varshit B Pandya, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik. Varshit B Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56162 ) Change subject: mb/google/brya: Update generic device number for mipi_camera device ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/56162 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I034cb7da787313d1cb53484922149589ac0f1c5a Gerrit-Change-Number: 56162 Gerrit-PatchSet: 1 Gerrit-Owner: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Fri, 09 Jul 2021 04:49:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: fine tune pmif spi hardware settings for stability
by Yu-Ping Wu (Code Review) 09 Jul '21

09 Jul '21

Attention is currently required from: Hung-Te Lin. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56166 ) Change subject: soc/mediatek/mt8195: fine tune pmif spi hardware settings for stability ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56166 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I48268cda8845a591592d8ca828ffe492e6dfe0ce Gerrit-Change-Number: 56166 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Fri, 09 Jul 2021 04:05:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: fine tune pmif spi hardware settings for stability
by Rex-BC Chen (Code Review) 09 Jul '21

09 Jul '21

Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56166 ) Change subject: soc/mediatek/mt8195: fine tune pmif spi hardware settings for stability ...................................................................... soc/mediatek/mt8195: fine tune pmif spi hardware settings for stability Update IO driving setting for pmif spi. Signed-off-by: James Lo <james.lo(a)mediatek.corp-partner.google.com> Change-Id: I48268cda8845a591592d8ca828ffe492e6dfe0ce --- M src/soc/mediatek/mt8195/include/soc/iocfg.h M src/soc/mediatek/mt8195/pmif_spi.c 2 files changed, 4 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/56166/1 diff --git a/src/soc/mediatek/mt8195/include/soc/iocfg.h b/src/soc/mediatek/mt8195/include/soc/iocfg.h index 8ca2f62..f3524dc 100644 --- a/src/soc/mediatek/mt8195/include/soc/iocfg.h +++ b/src/soc/mediatek/mt8195/include/soc/iocfg.h @@ -63,5 +63,6 @@ enum { IO_4_MA = 0x9, + IO_6_MA = 0x1b, }; #endif /* __SOC_MEDIATEK_MT8195_IOCFG_H__ */ diff --git a/src/soc/mediatek/mt8195/pmif_spi.c b/src/soc/mediatek/mt8195/pmif_spi.c index ddb2175..eff4a21 100644 --- a/src/soc/mediatek/mt8195/pmif_spi.c +++ b/src/soc/mediatek/mt8195/pmif_spi.c @@ -10,7 +10,7 @@ void pmif_spi_iocfg(void) { - /* Set SoC SPI IO driving strength to 4 mA */ - SET32_BITFIELDS(&mtk_iocfg_bm->drv_cfg1, PWRAP_SPI0_DRIVING, IO_4_MA); - SET32_BITFIELDS(&mtk_iocfg_bm->drv_cfg2, PWRAP_SPI1_DRIVING, IO_4_MA); + /* Set SoC SPI IO driving strength to 6 mA */ + SET32_BITFIELDS(&mtk_iocfg_bm->drv_cfg1, PWRAP_SPI0_DRIVING, IO_6_MA); + SET32_BITFIELDS(&mtk_iocfg_bm->drv_cfg2, PWRAP_SPI1_DRIVING, IO_6_MA); } -- To view, visit https://review.coreboot.org/c/coreboot/+/56166 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I48268cda8845a591592d8ca828ffe492e6dfe0ce Gerrit-Change-Number: 56166 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[4.11_branch]: mainboard/ocp/monolake: Expand BIOS region
by Marc Jones (Code Review) 09 Jul '21

09 Jul '21

Attention is currently required from: insomniac, Stefan Reinauer, Rocky Phagura, Javier Galindo. Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55366 ) Change subject: mainboard/ocp/monolake: Expand BIOS region ...................................................................... Patch Set 1: Code-Review-1 -- To view, visit https://review.coreboot.org/c/coreboot/+/55366 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: 4.11_branch Gerrit-Change-Id: I4161c920de2f7cbafa103bb2068bda50ac02e992 Gerrit-Change-Number: 55366 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Javier Galindo <javiergalindo(a)sysproconsulting.com> Gerrit-Reviewer: Jay Talbott <JayTalbott(a)sysproconsulting.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Rocky Phagura Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: insomniac <insomniac(a)slackware.it> Gerrit-Attention: insomniac <insomniac(a)slackware.it> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Rocky Phagura Gerrit-Attention: Javier Galindo <javiergalindo(a)sysproconsulting.com> Gerrit-Comment-Date: Fri, 09 Jul 2021 03:22:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: vc/mediatek/mt8195: Enable DRAM Vcore DVFS settings
by Yu-Ping Wu (Code Review) 09 Jul '21

09 Jul '21

Attention is currently required from: Hung-Te Lin. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56106 ) Change subject: vc/mediatek/mt8195: Enable DRAM Vcore DVFS settings ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56106 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I39342aea902a87cdc2c5b862e5d1a889fcc822c5 Gerrit-Change-Number: 56106 Gerrit-PatchSet: 9 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Fri, 09 Jul 2021 03:18:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: vc/mediatek/mt8195: add FOR_COREBOOT define
by Yu-Ping Wu (Code Review) 09 Jul '21

09 Jul '21

Attention is currently required from: Hung-Te Lin. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56158 ) Change subject: vc/mediatek/mt8195: add FOR_COREBOOT define ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic7a6e24f41c1fda167b5d6bb2d8a2c5c79dda8de Gerrit-Change-Number: 56158 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Fri, 09 Jul 2021 03:17:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: vc/mediatek/mt8195: Enable DRAM Vcore DVFS settings
by Hung-Te Lin (Code Review) 09 Jul '21

09 Jul '21

Attention is currently required from: Rex-BC Chen, Paul Menzel, Yu-Ping Wu. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56106 ) Change subject: vc/mediatek/mt8195: Enable DRAM Vcore DVFS settings ...................................................................... Patch Set 9: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/56106 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I39342aea902a87cdc2c5b862e5d1a889fcc822c5 Gerrit-Change-Number: 56106 Gerrit-PatchSet: 9 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 09 Jul 2021 02:40:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: grunt/treeya: add Realtek ALC5682 codec support
by Martin Roth (Code Review) 09 Jul '21

09 Jul '21

Attention is currently required from: Daniel Kurtz, Kevin Chang, Paul Menzel. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56100 ) Change subject: grunt/treeya: add Realtek ALC5682 codec support ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/kahlee/variants/treeya/audio.c: https://review.coreboot.org/c/coreboot/+/56100/comment/8663c643_6bc06899 PS4, Line 21: if (mmio_dev == NULL) : break; > Martin, is "== NULL" a common thing in coreboot? […] (!mmio_dev) is probably the preferred form, but there are over 1000 places in the code where '== NULL' is used so it's not a big issue. -- To view, visit https://review.coreboot.org/c/coreboot/+/56100 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I49c673fd944b2c2a79c4283eee941a16596ba7fa Gerrit-Change-Number: 56100 Gerrit-PatchSet: 4 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Daniel Kurtz <djkurtz(a)chromium.org> Gerrit-Reviewer: Daniel Kurtz <djkurtz(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alec Wang <alec.wang(a)lcfc.corp-partner.google.com> Gerrit-CC: Allen Cheng <allen.cheng(a)lcfc.corp-partner.google.com> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Daniel Kurtz <djkurtz(a)chromium.org> Gerrit-Attention: Daniel Kurtz <djkurtz(a)google.com> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 09 Jul 2021 02:37:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Daniel Kurtz <djkurtz(a)google.com> Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: vc/mediatek/mt8195: Enable DRAM Vcore DVFS settings
by Rex-BC Chen (Code Review) 09 Jul '21

09 Jul '21

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56106 ) Change subject: vc/mediatek/mt8195: Enable DRAM Vcore DVFS settings ...................................................................... Patch Set 9: (2 comments) File src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c: https://review.coreboot.org/c/coreboot/+/56106/comment/624c9067_9ee0ed38 PS5, Line 275: print("Vio18 = %d\n", dramc_get_vio18_voltage()); > vio18 is fixed at 1.8 volts, it will not be adjusted during dram init, […] Done File src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c: https://review.coreboot.org/c/coreboot/+/56106/comment/9e98fb40_7152d9d9 PS7, Line 275: print("Vio18 = %d\n", dramc_get_vio18_voltage()); > So it'll simply show 0? given it's only for debugging I think it's probably fine? […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/56106 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I39342aea902a87cdc2c5b862e5d1a889fcc822c5 Gerrit-Change-Number: 56106 Gerrit-PatchSet: 9 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 09 Jul 2021 02:34:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: DO-NOT-SUBMIT: MT8195 Cherry review ToT
by Rex-BC Chen (Code Review) 09 Jul '21

09 Jul '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Yu-Ping Wu, Yidi Lin. Rex-BC Chen has uploaded a new patch set (#155) to the change originally created by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/52260 ) Change subject: DO-NOT-SUBMIT: MT8195 Cherry review ToT ...................................................................... DO-NOT-SUBMIT: MT8195 Cherry review ToT Signed-off-by: Yidi Lin <yidi.lin(a)mediatek.com> Change-Id: I3ed96b245bbb52501e9b7d6b89ed42468f505ab0 --- M README.md 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/52260/155 -- To view, visit https://review.coreboot.org/c/coreboot/+/52260 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ed96b245bbb52501e9b7d6b89ed42468f505ab0 Gerrit-Change-Number: 52260 Gerrit-PatchSet: 155 Gerrit-Owner: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joel Kitching <kitching(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit July 2021