coreboot-gerrit July 2021

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Change in encapsulate[master]: Declare usage of GNU features
by Patrick Georgi (Code Review) 12 Jul '21

12 Jul '21

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/encapsulate/+/56220 ) Change subject: Declare usage of GNU features ...................................................................... Declare usage of GNU features unshare() is only available with it on glibc (even though it's probably not GNU?), leading to a warning and potentially unsafe compilation due to default types. Change-Id: I6f3f5c4b3afa3407802fe33728a11106d1e53990 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> --- M encapsulate.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/encapsulate refs/changes/20/56220/1 diff --git a/encapsulate.c b/encapsulate.c index 439fd93..e3a4d93 100644 --- a/encapsulate.c +++ b/encapsulate.c @@ -14,6 +14,8 @@ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ +#define _GNU_SOURCE + #include <sys/types.h> #include <sys/stat.h> #include <sys/mount.h> -- To view, visit https://review.coreboot.org/c/encapsulate/+/56220 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: encapsulate Gerrit-Branch: master Gerrit-Change-Id: I6f3f5c4b3afa3407802fe33728a11106d1e53990 Gerrit-Change-Number: 56220 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/intel/gma: Restructure Opregion version info code
by Meera Ravindranath (Code Review) 12 Jul '21

12 Jul '21

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Meera Ravindranath, Angel Pons, Patrick Rudolph. Hello build bot (Jenkins), Maulik V Vaghela, Angel Pons, Subrata Banik, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56168 to look at the new patch set (#7). Change subject: drivers/intel/gma: Restructure Opregion version info code ...................................................................... drivers/intel/gma: Restructure Opregion version info code Define a structure for opregion version information to align with spec/kernel. BUG=b:190019970 BRANCH=None Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I93a9f2df186002a4e38caa910f867bce0b97ac2b --- M src/drivers/intel/gma/opregion.c M src/drivers/intel/gma/opregion.h 2 files changed, 15 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/56168/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/56168 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I93a9f2df186002a4e38caa910f867bce0b97ac2b Gerrit-Change-Number: 56168 Gerrit-PatchSet: 7 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: arch/x86: Set RTC century byte offset in FADT x86-wide
by Nico Huber (Code Review) 12 Jul '21

12 Jul '21

Attention is currently required from: Arthur Heymans, Raul Rangel, Mariusz Szafrański, Jonathan Zhang, Angel Pons, Patrick Rudolph, Jason Glenesk, Anjaneya "Reddy" Chagam, Marshall Dawson, Johnny Lin, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Morgan Jang, Werner Zeh, Felix Held. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55012 ) Change subject: arch/x86: Set RTC century byte offset in FADT x86-wide ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: I was unaware of this and made CB:56214 and CB:56218. Arthur's concerns are very valid, but for me it wasn't the OS overwriting the option table, but coreboot's time/date code (I have no idea why this code exists and is enabled by default). -- To view, visit https://review.coreboot.org/c/coreboot/+/55012 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8fa5ddc368c129a5f847c64064374aae2d4f0c43 Gerrit-Change-Number: 55012 Gerrit-PatchSet: 2 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 12 Jul 2021 16:28:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: payloads: FILO: Hook up autoboot options
by Nico Huber (Code Review) 12 Jul '21

12 Jul '21

Attention is currently required from: Martin Roth, Paul Menzel, Stefan Reinauer. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56213 ) Change subject: payloads: FILO: Hook up autoboot options ...................................................................... Patch Set 1: (2 comments) File payloads/external/FILO/Makefile: https://review.coreboot.org/c/coreboot/+/56213/comment/9e106384_b354732a PS1, Line 36: ifeq ($(CONFIG_FILO_USE_AUTOBOOT),y) > For some reason, even if selected, the if is not chosen. You stripped the `FILO_` when passing it to the inner Makefile. https://review.coreboot.org/c/coreboot/+/56213/comment/d9524daf_45408205 PS1, Line 39: FILO_ Same here. -- To view, visit https://review.coreboot.org/c/coreboot/+/56213 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id167e9a144bf466da87469108002672b299b702a Gerrit-Change-Number: 56213 Gerrit-PatchSet: 1 Gerrit-Owner: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Mon, 12 Jul 2021 16:20:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/kblrvp: Rework Kconfig
by Felix Singer (Code Review) 12 Jul '21

12 Jul '21

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56219 ) Change subject: mb/intel/kblrvp: Rework Kconfig ...................................................................... mb/intel/kblrvp: Rework Kconfig Rework Kconfig file that each variant has its own config option with their specific selects / configuration and move common selects to `BOARD_INTEL_KBLRVP_COMMON`, which is used as base for each variant. Change-Id: I2a9c12a15c098fcb64c006a707c94a1aed93d73a Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/intel/kblrvp/Kconfig M src/mainboard/intel/kblrvp/Kconfig.name 2 files changed, 36 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/56219/1 diff --git a/src/mainboard/intel/kblrvp/Kconfig b/src/mainboard/intel/kblrvp/Kconfig index fcce402..5b6e35d 100644 --- a/src/mainboard/intel/kblrvp/Kconfig +++ b/src/mainboard/intel/kblrvp/Kconfig @@ -1,21 +1,39 @@ -if BOARD_INTEL_KBLRVP3 || BOARD_INTEL_KBLRVP7 || BOARD_INTEL_KBLRVP8 \ - || BOARD_INTEL_KBLRVP11 - -config BOARD_SPECIFIC_OPTIONS - def_bool y +config BOARD_INTEL_KBLRVP_COMMON + bool select BOARD_ROMSIZE_KB_16384 select EC_ACPI select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE - select SOC_INTEL_COMMON_BLOCK_HDA_VERB if !BOARD_INTEL_KBLRVP8 - select SOC_INTEL_KABYLAKE - select SKYLAKE_SOC_PCH_H if BOARD_INTEL_KBLRVP8 || BOARD_INTEL_KBLRVP11 - select MAINBOARD_HAS_CHROMEOS select HAVE_SPD_IN_CBFS - select MAINBOARD_HAS_LPC_TPM select INTEL_LPSS_UART_FOR_CONSOLE - select MAINBOARD_USES_IFD_GBE_REGION if BOARD_INTEL_KBLRVP8 + select MAINBOARD_HAS_CHROMEOS + select MAINBOARD_HAS_LPC_TPM + select SOC_INTEL_KABYLAKE + +config BOARD_INTEL_KBLRVP_RVP3_OPTIONS + bool + select BOARD_INTEL_KBLRVP_COMMON + select SOC_INTEL_COMMON_BLOCK_HDA_VERB + +config BOARD_INTEL_KBLRVP_RVP7_OPTIONS + bool + select BOARD_INTEL_KBLRVP_COMMON + select SOC_INTEL_COMMON_BLOCK_HDA_VERB + +config BOARD_INTEL_KBLRVP_RVP8_OPTIONS + bool + select BOARD_INTEL_KBLRVP_COMMON + select MAINBOARD_USES_IFD_GBE_REGION + select SKYLAKE_SOC_PCH_H + +config BOARD_INTEL_KBLRVP_RVP11_OPTIONS + bool + select BOARD_INTEL_KBLRVP_COMMON + select SOC_INTEL_COMMON_BLOCK_HDA_VERB + select SKYLAKE_SOC_PCH_H + +if BOARD_INTEL_KBLRVP_COMMON config VBOOT select VBOOT_LID_SWITCH diff --git a/src/mainboard/intel/kblrvp/Kconfig.name b/src/mainboard/intel/kblrvp/Kconfig.name index df65e32..62c334c 100644 --- a/src/mainboard/intel/kblrvp/Kconfig.name +++ b/src/mainboard/intel/kblrvp/Kconfig.name @@ -1,8 +1,15 @@ config BOARD_INTEL_KBLRVP3 bool "Kabylake LPDDR3 RVP3" + select BOARD_INTEL_KBLRVP_RVP3_OPTIONS + config BOARD_INTEL_KBLRVP7 bool "Kabylake DDR3L RVP7" + select BOARD_INTEL_KBLRVP_RVP7_OPTIONS + config BOARD_INTEL_KBLRVP8 bool "Kabylake DDR4 RVP8" + select BOARD_INTEL_KBLRVP_RVP8_OPTIONS + config BOARD_INTEL_KBLRVP11 bool "Kabylake DDR4 RVP11" + select BOARD_INTEL_KBLRVP_RVP11_OPTIONS -- To view, visit https://review.coreboot.org/c/coreboot/+/56219 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2a9c12a15c098fcb64c006a707c94a1aed93d73a Gerrit-Change-Number: 56219 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newchange

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Change in coreboot[master]: acpi: Fill fadt->century based on Kconfig
by Angel Pons (Code Review) 12 Jul '21

12 Jul '21

Attention is currently required from: Raul Rangel, Mariusz Szafrański, Jonathan Zhang, Patrick Rudolph, Lance Zhao, Jason Glenesk, Nico Huber, Anjaneya "Reddy" Chagam, Marshall Dawson, Johnny Lin, Suresh Bellampalli, Tim Wawrzynczak, Vanessa Eusebio, Michal Motyl, Morgan Jang, Felix Held. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56218 ) Change subject: acpi: Fill fadt->century based on Kconfig ...................................................................... Patch Set 1: (1 comment) File src/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/56218/comment/0ffa4e8e_6aed20f9 PS1, Line 29: #include <pc80/mc146818rtc.h> I'd prefer to do this in `arch_fill_fadt()` (already implemented on x86 to fill in the reset register fields) -- To view, visit https://review.coreboot.org/c/coreboot/+/56218 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I916f19e022633b316fbc0c6bf38bbd58228412be Gerrit-Change-Number: 56218 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 12 Jul 2021 16:17:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: acpi: Fill fadt->century based on Kconfig
by Nico Huber (Code Review) 12 Jul '21

12 Jul '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56218 ) Change subject: acpi: Fill fadt->century based on Kconfig ...................................................................... acpi: Fill fadt->century based on Kconfig Change-Id: I916f19e022633b316fbc0c6bf38bbd58228412be Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/acpi/acpi.c M src/soc/amd/picasso/acpi.c M src/soc/amd/stoneyridge/acpi.c M src/soc/intel/baytrail/fadt.c M src/soc/intel/braswell/fadt.c M src/soc/intel/broadwell/pch/fadt.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/elkhartlake/acpi.c M src/soc/intel/skylake/fadt.c M src/soc/intel/xeon_sp/skx/soc_acpi.c M src/southbridge/amd/agesa/hudson/fadt.c M src/southbridge/amd/cimx/sb800/fadt.c M src/southbridge/amd/pi/hudson/fadt.c M src/southbridge/intel/bd82x6x/fadt.c M src/southbridge/intel/i82371eb/fadt.c M src/southbridge/intel/i82801dx/fadt.c M src/southbridge/intel/i82801gx/fadt.c M src/southbridge/intel/i82801ix/fadt.c M src/southbridge/intel/i82801jx/fadt.c M src/southbridge/intel/ibexpeak/fadt.c M src/southbridge/intel/lynxpoint/fadt.c 21 files changed, 4 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/56218/1 diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index 5f9767e8..2e15ea9 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -26,6 +26,7 @@ #include <types.h> #include <version.h> #include <commonlib/sort.h> +#include <pc80/mc146818rtc.h> static acpi_rsdp_t *valid_rsdp(acpi_rsdp_t *rsdp); @@ -1510,6 +1511,9 @@ fadt->preferred_pm_profile = acpi_get_preferred_pm_profile(); + if (CONFIG(USE_PC_CMOS_ALTCENTURY)) + fadt->century = RTC_CLK_ALTCENTURY; + arch_fill_fadt(fadt); acpi_fill_fadt(fadt); diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index eca3333..99c1648 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -94,7 +94,6 @@ fadt->duty_width = 3; /* CLK_VAL bits 3:1 */ fadt->day_alrm = 0x0d; fadt->mon_alrm = 0; - fadt->century = 0x32; fadt->iapc_boot_arch = cfg->fadt_boot_arch; /* legacy free default */ fadt->res2 = 0; /* reserved, MUST be 0 ACPI 3.0 */ fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */ diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index 16874ad..b2de89e 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -86,7 +86,6 @@ fadt->duty_width = 3; /* CLK_VAL bits 3:1 */ fadt->day_alrm = 0x0d; fadt->mon_alrm = 0; /* Not supported */ - fadt->century = 0x32; fadt->iapc_boot_arch = FADT_BOOT_ARCH; /* See table 5-10 */ fadt->res2 = 0; /* reserved, MUST be 0 ACPI 3.0 */ fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */ diff --git a/src/soc/intel/baytrail/fadt.c b/src/soc/intel/baytrail/fadt.c index f78188e..395bdd3 100644 --- a/src/soc/intel/baytrail/fadt.c +++ b/src/soc/intel/baytrail/fadt.c @@ -36,7 +36,6 @@ fadt->duty_width = 0; fadt->day_alrm = 0xd; fadt->mon_alrm = 0x00; - fadt->century = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | diff --git a/src/soc/intel/braswell/fadt.c b/src/soc/intel/braswell/fadt.c index f78188e..395bdd3 100644 --- a/src/soc/intel/braswell/fadt.c +++ b/src/soc/intel/braswell/fadt.c @@ -36,7 +36,6 @@ fadt->duty_width = 0; fadt->day_alrm = 0xd; fadt->mon_alrm = 0x00; - fadt->century = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | diff --git a/src/soc/intel/broadwell/pch/fadt.c b/src/soc/intel/broadwell/pch/fadt.c index 52254a0..9192466 100644 --- a/src/soc/intel/broadwell/pch/fadt.c +++ b/src/soc/intel/broadwell/pch/fadt.c @@ -36,7 +36,6 @@ fadt->duty_width = 0; fadt->day_alrm = 0xd; fadt->mon_alrm = 0x00; - fadt->century = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; fadt->flags |= ACPI_FADT_WBINVD | diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c index 569e61d..3d66bc3 100644 --- a/src/soc/intel/denverton_ns/acpi.c +++ b/src/soc/intel/denverton_ns/acpi.c @@ -120,7 +120,6 @@ /* RTC Registers */ fadt->day_alrm = 0x0D; fadt->mon_alrm = 0x00; - fadt->century = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | diff --git a/src/soc/intel/elkhartlake/acpi.c b/src/soc/intel/elkhartlake/acpi.c index 3a00c46..22b8767 100644 --- a/src/soc/intel/elkhartlake/acpi.c +++ b/src/soc/intel/elkhartlake/acpi.c @@ -163,7 +163,6 @@ fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_width = 0x3; /* CLK_VAL bits 3:1 */ - fadt->century = 0x32; if (config->s0ix_enable) fadt->flags |= ACPI_FADT_LOW_PWR_IDLE_S0; diff --git a/src/soc/intel/skylake/fadt.c b/src/soc/intel/skylake/fadt.c index 3e60216..b8eb9d0 100644 --- a/src/soc/intel/skylake/fadt.c +++ b/src/soc/intel/skylake/fadt.c @@ -40,7 +40,6 @@ fadt->duty_width = 0; fadt->day_alrm = 0xd; fadt->mon_alrm = 0x00; - fadt->century = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_FREE; if (!CONFIG(NO_FADT_8042)) fadt->iapc_boot_arch |= ACPI_FADT_8042; diff --git a/src/soc/intel/xeon_sp/skx/soc_acpi.c b/src/soc/intel/xeon_sp/skx/soc_acpi.c index 1f1d058..41039ea 100644 --- a/src/soc/intel/xeon_sp/skx/soc_acpi.c +++ b/src/soc/intel/xeon_sp/skx/soc_acpi.c @@ -55,7 +55,6 @@ /* RTC Registers */ fadt->mon_alrm = 0x00; - fadt->century = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; /* PM2 Control Registers */ diff --git a/src/southbridge/amd/agesa/hudson/fadt.c b/src/southbridge/amd/agesa/hudson/fadt.c index ba9e47d..c9962be 100644 --- a/src/southbridge/amd/agesa/hudson/fadt.c +++ b/src/southbridge/amd/agesa/hudson/fadt.c @@ -50,7 +50,6 @@ fadt->duty_width = 3; /* CLK_VAL bits 3:1 */ fadt->day_alrm = 0; /* 0x7d these have to be */ fadt->mon_alrm = 0; /* 0x7e added to cmos.layout */ - fadt->century = 0; /* 0x7f to make rtc alarm work */ fadt->iapc_boot_arch = FADT_BOOT_ARCH; /* See table 5-10 */ fadt->res2 = 0; /* reserved, MUST be 0 ACPI 3.0 */ fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */ diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c index 9272194..25600c0 100644 --- a/src/southbridge/amd/cimx/sb800/fadt.c +++ b/src/southbridge/amd/cimx/sb800/fadt.c @@ -75,7 +75,6 @@ fadt->duty_width = 3; /* CLK_VAL bits 3:1 */ fadt->day_alrm = 0; /* 0x7d these have to be */ fadt->mon_alrm = 0; /* 0x7e added to cmos.layout */ - fadt->century = 0; /* 0x7f to make rtc alarm work */ fadt->iapc_boot_arch = FADT_BOOT_ARCH; /* See table 5-10 */ fadt->res2 = 0; /* reserved, MUST be 0 ACPI 3.0 */ fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */ diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c index 0bb9a97..e2f3bba 100644 --- a/src/southbridge/amd/pi/hudson/fadt.c +++ b/src/southbridge/amd/pi/hudson/fadt.c @@ -50,7 +50,6 @@ fadt->duty_width = 3; /* CLK_VAL bits 3:1 */ fadt->day_alrm = 0; /* 0x7d these have to be */ fadt->mon_alrm = 0; /* 0x7e added to cmos.layout */ - fadt->century = 0; /* 0x7f to make rtc alarm work */ fadt->iapc_boot_arch = FADT_BOOT_ARCH; /* See table 5-10 */ fadt->res2 = 0; /* reserved, MUST be 0 ACPI 3.0 */ fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */ diff --git a/src/southbridge/intel/bd82x6x/fadt.c b/src/southbridge/intel/bd82x6x/fadt.c index 77af4e8..c6f6877 100644 --- a/src/southbridge/intel/bd82x6x/fadt.c +++ b/src/southbridge/intel/bd82x6x/fadt.c @@ -39,7 +39,6 @@ fadt->duty_width = 0; fadt->day_alrm = 0xd; fadt->mon_alrm = 0x00; - fadt->century = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; fadt->flags |= ACPI_FADT_WBINVD | diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c index 5aeff4e..1d640f4 100644 --- a/src/southbridge/intel/i82371eb/fadt.c +++ b/src/southbridge/intel/i82371eb/fadt.c @@ -42,7 +42,6 @@ fadt->duty_width = 3; /* this width is in bits */ fadt->day_alrm = 0x0d; /* rtc CMOS RAM offset */ fadt->mon_alrm = 0x0; /* not supported */ - fadt->century = 0x0; /* not supported */ /* * bit meaning * 0 1: We have user-visible legacy devices diff --git a/src/southbridge/intel/i82801dx/fadt.c b/src/southbridge/intel/i82801dx/fadt.c index 84ea73a..9524b7d 100644 --- a/src/southbridge/intel/i82801dx/fadt.c +++ b/src/southbridge/intel/i82801dx/fadt.c @@ -44,7 +44,6 @@ fadt->duty_width = 0; fadt->day_alrm = 0xd; fadt->mon_alrm = 0x00; - fadt->century = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | diff --git a/src/southbridge/intel/i82801gx/fadt.c b/src/southbridge/intel/i82801gx/fadt.c index 153ddea..a59a586 100644 --- a/src/southbridge/intel/i82801gx/fadt.c +++ b/src/southbridge/intel/i82801gx/fadt.c @@ -43,7 +43,6 @@ fadt->duty_width = 0; fadt->day_alrm = 0xd; fadt->mon_alrm = 0x00; - fadt->century = 0x32; fadt->iapc_boot_arch = ACPI_FADT_8042 | ACPI_FADT_LEGACY_DEVICES; fadt->flags |= (ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE diff --git a/src/southbridge/intel/i82801ix/fadt.c b/src/southbridge/intel/i82801ix/fadt.c index 8a48f1b..ec85496 100644 --- a/src/southbridge/intel/i82801ix/fadt.c +++ b/src/southbridge/intel/i82801ix/fadt.c @@ -36,7 +36,6 @@ fadt->duty_width = 3; fadt->day_alrm = 0xd; fadt->mon_alrm = 0x00; - fadt->century = 0x32; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_FREE; fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE | diff --git a/src/southbridge/intel/i82801jx/fadt.c b/src/southbridge/intel/i82801jx/fadt.c index 377b4d2..6c5d1c7 100644 --- a/src/southbridge/intel/i82801jx/fadt.c +++ b/src/southbridge/intel/i82801jx/fadt.c @@ -36,7 +36,6 @@ fadt->duty_width = 0; fadt->day_alrm = 0xd; fadt->mon_alrm = 0x00; - fadt->century = 0x32; fadt->iapc_boot_arch = ACPI_FADT_8042 | ACPI_FADT_LEGACY_DEVICES; fadt->flags |= (ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE diff --git a/src/southbridge/intel/ibexpeak/fadt.c b/src/southbridge/intel/ibexpeak/fadt.c index 40c8bdc..7f22541 100644 --- a/src/southbridge/intel/ibexpeak/fadt.c +++ b/src/southbridge/intel/ibexpeak/fadt.c @@ -39,7 +39,6 @@ fadt->duty_width = 0; fadt->day_alrm = 0xd; fadt->mon_alrm = 0x00; - fadt->century = 0x32; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; fadt->flags |= ACPI_FADT_WBINVD | diff --git a/src/southbridge/intel/lynxpoint/fadt.c b/src/southbridge/intel/lynxpoint/fadt.c index abf56ca..0d07899 100644 --- a/src/southbridge/intel/lynxpoint/fadt.c +++ b/src/southbridge/intel/lynxpoint/fadt.c @@ -51,7 +51,6 @@ fadt->duty_width = 0; fadt->day_alrm = 0xd; fadt->mon_alrm = 0x00; - fadt->century = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; fadt->flags |= ACPI_FADT_WBINVD | -- To view, visit https://review.coreboot.org/c/coreboot/+/56218 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I916f19e022633b316fbc0c6bf38bbd58228412be Gerrit-Change-Number: 56218 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/intel/coffeelake_rvp: Rework Kconfig
by Felix Singer (Code Review) 12 Jul '21

12 Jul '21

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56217 ) Change subject: mb/intel/coffeelake_rvp: Rework Kconfig ...................................................................... mb/intel/coffeelake_rvp: Rework Kconfig Rework Kconfig file that each variant has its own config option with their specific selects / configuration and move common selects to `BOARD_INTEL_COFFEELAKE_COMMON`, which is used as base for each variant. Built each variant with `BUILD_TIMELESS=1` and all generated coreboot.rom files remain identical. Change-Id: I3b3d3cff5ea7a3f4d1c4ddd911240763e4891e06 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/intel/coffeelake_rvp/Kconfig M src/mainboard/intel/coffeelake_rvp/Kconfig.name 2 files changed, 57 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/56217/1 diff --git a/src/mainboard/intel/coffeelake_rvp/Kconfig b/src/mainboard/intel/coffeelake_rvp/Kconfig index e4c2d90..40aca30 100644 --- a/src/mainboard/intel/coffeelake_rvp/Kconfig +++ b/src/mainboard/intel/coffeelake_rvp/Kconfig @@ -1,23 +1,56 @@ -if BOARD_INTEL_COFFEELAKE_RVP11 || BOARD_INTEL_COFFEELAKE_RVPU || BOARD_INTEL_WHISKEYLAKE_RVP || BOARD_INTEL_COFFEELAKE_RVP8 || BOARD_INTEL_COMETLAKE_RVPU - -config BOARD_SPECIFIC_OPTIONS - def_bool y - select BOARD_ROMSIZE_KB_16384 if !BOARD_INTEL_COFFEELAKE_RVPU - select BOARD_ROMSIZE_KB_32768 if BOARD_INTEL_COFFEELAKE_RVPU +config BOARD_INTEL_COFFEELAKE_COMMON + bool + select DRIVERS_GENERIC_MAX98357A + select DRIVERS_I2C_DA7219 + select DRIVERS_I2C_GENERIC + select DRIVERS_I2C_HID + select DRIVERS_I2C_MAX98373 select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS - select DRIVERS_I2C_HID - select DRIVERS_I2C_GENERIC - select DRIVERS_I2C_DA7219 - select DRIVERS_I2C_MAX98373 - select DRIVERS_GENERIC_MAX98357A - select SOC_INTEL_CANNONLAKE_PCH_H if BOARD_INTEL_COFFEELAKE_RVP11 || BOARD_INTEL_COFFEELAKE_RVP8 - select SOC_INTEL_COMMON_BLOCK_HDA_VERB if !BOARD_INTEL_COFFEELAKE_RVPU - select MAINBOARD_USES_IFD_EC_REGION - select MAINBOARD_USES_IFD_GBE_REGION if BOARD_INTEL_COFFEELAKE_RVP11 || BOARD_INTEL_COFFEELAKE_RVP8 select MAINBOARD_HAS_LPC_TPM + select MAINBOARD_USES_IFD_EC_REGION + +config BOARD_INTEL_COFFEELAKE_RVP8_OPTIONS + bool + select BOARD_INTEL_COFFEELAKE_COMMON + select BOARD_ROMSIZE_KB_16384 + select MAINBOARD_USES_IFD_GBE_REGION + select SOC_INTEL_CANNONLAKE_PCH_H + select SOC_INTEL_COFFEELAKE + select SOC_INTEL_COMMON_BLOCK_HDA_VERB + +config BOARD_INTEL_COFFEELAKE_RVP11_OPTIONS + bool + select BOARD_INTEL_COFFEELAKE_COMMON + select BOARD_ROMSIZE_KB_16384 + select MAINBOARD_USES_IFD_GBE_REGION + select SOC_INTEL_CANNONLAKE_PCH_H + select SOC_INTEL_COFFEELAKE + select SOC_INTEL_COMMON_BLOCK_HDA_VERB + +config BOARD_INTEL_COFFEELAKE_RVPU_OPTIONS + bool + select BOARD_INTEL_COFFEELAKE_COMMON + select BOARD_ROMSIZE_KB_32768 + select SOC_INTEL_COFFEELAKE + +config BOARD_INTEL_WHISKEYLAKE_RVP_OPTIONS + bool + select BOARD_INTEL_COFFEELAKE_COMMON + select BOARD_ROMSIZE_KB_16384 + select SOC_INTEL_COMMON_BLOCK_HDA_VERB + select SOC_INTEL_WHISKEYLAKE + +config BOARD_INTEL_COMETLAKE_RVPU_OPTIONS + bool + select BOARD_INTEL_COFFEELAKE_COMMON + select BOARD_ROMSIZE_KB_16384 + select SOC_INTEL_COMETLAKE_1 + select SOC_INTEL_COMMON_BLOCK_HDA_VERB + +if BOARD_INTEL_COFFEELAKE_COMMON config MAINBOARD_DIR string diff --git a/src/mainboard/intel/coffeelake_rvp/Kconfig.name b/src/mainboard/intel/coffeelake_rvp/Kconfig.name index e03e862..ef96a52 100644 --- a/src/mainboard/intel/coffeelake_rvp/Kconfig.name +++ b/src/mainboard/intel/coffeelake_rvp/Kconfig.name @@ -2,16 +2,20 @@ config BOARD_INTEL_COFFEELAKE_RVPU bool "-> Coffeelake U SO-DIMM DDR4 RVP" - select SOC_INTEL_COFFEELAKE + select BOARD_INTEL_COFFEELAKE_RVPU_OPTIONS + config BOARD_INTEL_COFFEELAKE_RVP11 bool "-> Coffeelake H SO-DIMM DDR4 RVP11" - select SOC_INTEL_COFFEELAKE + select BOARD_INTEL_COFFEELAKE_RVP11_OPTIONS + config BOARD_INTEL_WHISKEYLAKE_RVP bool "-> Whiskeylake U DDR4 RVP" - select SOC_INTEL_WHISKEYLAKE + select BOARD_INTEL_WHISKEYLAKE_RVP_OPTIONS + config BOARD_INTEL_COFFEELAKE_RVP8 bool "-> Coffeelake S U-DIMM DDR4 RVP8" - select SOC_INTEL_COFFEELAKE + select BOARD_INTEL_COFFEELAKE_RVP8_OPTIONS + config BOARD_INTEL_COMETLAKE_RVPU bool "-> Cometlake U DDR4 RVP" - select SOC_INTEL_COMETLAKE_1 + select BOARD_INTEL_COMETLAKE_RVPU_OPTIONS -- To view, visit https://review.coreboot.org/c/coreboot/+/56217 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3b3d3cff5ea7a3f4d1c4ddd911240763e4891e06 Gerrit-Change-Number: 56217 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/pc80/rtc: Make use of alt-century byte configurable
by Angel Pons (Code Review) 12 Jul '21

12 Jul '21

Attention is currently required from: Angel Pons. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56214 ) Change subject: drivers/pc80/rtc: Make use of alt-century byte configurable ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/56214 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifba3d77120c2474393ac5e64faac1baeeb58c893 Gerrit-Change-Number: 56214 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 12 Jul 2021 16:02:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: drivers/pc80/rtc: Make use of alt-century byte configurable
by Nico Huber (Code Review) 12 Jul '21

12 Jul '21

Attention is currently required from: Angel Pons. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56214 ) Change subject: drivers/pc80/rtc: Make use of alt-century byte configurable ...................................................................... Patch Set 1: (2 comments) File src/drivers/pc80/rtc/Kconfig: https://review.coreboot.org/c/coreboot/+/56214/comment/a5b0836b_8b07108f PS1, Line 11: OSs > nit: OSes Done File src/drivers/pc80/rtc/mc146818rtc.c: https://review.coreboot.org/c/coreboot/+/56214/comment/343f461d_6ea16da9 PS1, Line 235: 69 > Where does this 69 come from? Maybe `< 70` would make it easier to associate it with 1970? Hrmm, copied from Linux ;) -- To view, visit https://review.coreboot.org/c/coreboot/+/56214 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifba3d77120c2474393ac5e64faac1baeeb58c893 Gerrit-Change-Number: 56214 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 12 Jul 2021 16:01:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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