coreboot-gerrit July 2021

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Change in coreboot[master]: mb/google/volteer/baseboard: Configure chipset_lockdown seperately
by Tim Wawrzynczak (Code Review) 12 Jul '21

12 Jul '21

Attention is currently required from: Felix Singer, Angel Pons. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56209 ) Change subject: mb/google/volteer/baseboard: Configure chipset_lockdown seperately ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/volteer/variants/baseboard/devicetree.cb: https://review.coreboot.org/c/coreboot/+/56209/comment/2a9281e3_dda15399 PS2, Line 328: CHIPSET_LOCKDOWN_COREBOOT > Doesn't this need quotes? Technically, no https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/ut… -- To view, visit https://review.coreboot.org/c/coreboot/+/56209 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I595c042cf62680d61f60965710d382bfdcd81671 Gerrit-Change-Number: 56209 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 12 Jul 2021 15:42:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/pc80/rtc: Make use of legacy BIOS checksum configurable
by Nico Huber (Code Review) 12 Jul '21

12 Jul '21

Nico Huber has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/56215 ) Change subject: drivers/pc80/rtc: Make use of legacy BIOS checksum configurable ...................................................................... Abandoned I misinterpreted the CMOS location. Why we maintain this checksum is a mystery still. -- To view, visit https://review.coreboot.org/c/coreboot/+/56215 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6512b019c3cc0441db311a3b590ab67b8db27f3 Gerrit-Change-Number: 56215 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: abandon

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Change in coreboot[master]: drivers/pc80/rtc: Make use of legacy BIOS checksum configurable
by Angel Pons (Code Review) 12 Jul '21

12 Jul '21

Attention is currently required from: Nico Huber. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56215 ) Change subject: drivers/pc80/rtc: Make use of legacy BIOS checksum configurable ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/56215 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6512b019c3cc0441db311a3b590ab67b8db27f3 Gerrit-Change-Number: 56215 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Mon, 12 Jul 2021 15:33:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/pc80/rtc: Make use of alt-century byte configurable
by Angel Pons (Code Review) 12 Jul '21

12 Jul '21

Attention is currently required from: Nico Huber. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56214 ) Change subject: drivers/pc80/rtc: Make use of alt-century byte configurable ...................................................................... Patch Set 1: Code-Review+1 (2 comments) File src/drivers/pc80/rtc/Kconfig: https://review.coreboot.org/c/coreboot/+/56214/comment/f5e9c9c4_5c96a5b5 PS1, Line 11: OSs nit: OSes File src/drivers/pc80/rtc/mc146818rtc.c: https://review.coreboot.org/c/coreboot/+/56214/comment/aa97916f_61214b5d PS1, Line 235: 69 Where does this 69 come from? Maybe `< 70` would make it easier to associate it with 1970? -- To view, visit https://review.coreboot.org/c/coreboot/+/56214 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifba3d77120c2474393ac5e64faac1baeeb58c893 Gerrit-Change-Number: 56214 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Mon, 12 Jul 2021 15:32:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: security/intel/txt: add missing cpu/x86/msr.h include
by Felix Held (Code Review) 12 Jul '21

12 Jul '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56186 ) Change subject: security/intel/txt: add missing cpu/x86/msr.h include ...................................................................... security/intel/txt: add missing cpu/x86/msr.h include msr_t and a few other things used in here are defined in cpu/x86/msr.h, so include it directly in this file. Change-Id: I7a3299381ff54b7665620861dec60642f27bac8d Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56186 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/security/intel/txt/common.c 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved diff --git a/src/security/intel/txt/common.c b/src/security/intel/txt/common.c index 437c55e..239e152 100644 --- a/src/security/intel/txt/common.c +++ b/src/security/intel/txt/common.c @@ -6,6 +6,7 @@ #include <cpu/x86/cr.h> #include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> +#include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> #include <lib.h> #include <smp/node.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/56186 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a3299381ff54b7665620861dec60642f27bac8d Gerrit-Change-Number: 56186 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/amd/*/mca: use mca_get_bank_count()
by Felix Held (Code Review) 12 Jul '21

12 Jul '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56185 ) Change subject: soc/amd/*/mca: use mca_get_bank_count() ...................................................................... soc/amd/*/mca: use mca_get_bank_count() Use the common mca_get_bank_count function instead of open-coding the functionality to get the MCA bank number. Also re-type the num_banks variable from signed in to unsigned int, since the number of MCA bank is always positive. Change-Id: I126767cf9ad468cab6d6537dd73e9b2dc377b5c4 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56185 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/picasso/mca.c M src/soc/amd/stoneyridge/mca.c 2 files changed, 4 insertions(+), 8 deletions(-) Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved diff --git a/src/soc/amd/picasso/mca.c b/src/soc/amd/picasso/mca.c index 12d4ccc..acb248d 100644 --- a/src/soc/amd/picasso/mca.c +++ b/src/soc/amd/picasso/mca.c @@ -152,12 +152,10 @@ void check_mca(void) { int i; - msr_t cap; struct mca_bank mci; - int num_banks; + unsigned int num_banks; - cap = rdmsr(IA32_MCG_CAP); - num_banks = cap.lo & MCA_BANKS_MASK; + num_banks = mca_get_bank_count(); for (i = 0 ; i < num_banks ; i++) { mci.sts = rdmsr(MCAX_STATUS_MSR(i)); diff --git a/src/soc/amd/stoneyridge/mca.c b/src/soc/amd/stoneyridge/mca.c index 346cd6d..db5fabc3 100644 --- a/src/soc/amd/stoneyridge/mca.c +++ b/src/soc/amd/stoneyridge/mca.c @@ -151,12 +151,10 @@ void check_mca(void) { int i; - msr_t cap; struct mca_bank mci; - int num_banks; + unsigned int num_banks; - cap = rdmsr(IA32_MCG_CAP); - num_banks = cap.lo & MCA_BANKS_MASK; + num_banks = mca_get_bank_count(); if (is_warm_reset()) { for (i = 0 ; i < num_banks ; i++) { -- To view, visit https://review.coreboot.org/c/coreboot/+/56185 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I126767cf9ad468cab6d6537dd73e9b2dc377b5c4 Gerrit-Change-Number: 56185 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: drivers/pc80/rtc: Make use of legacy BIOS checksum configurable
by Nico Huber (Code Review) 12 Jul '21

12 Jul '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56215 ) Change subject: drivers/pc80/rtc: Make use of legacy BIOS checksum configurable ...................................................................... drivers/pc80/rtc: Make use of legacy BIOS checksum configurable The legacy BIOS checksum has a fixed location amidst CMOS and often conflicts with our option tables. Oddly, we only ever handle it when USE_OPTION_TABLE is selected. Let's disable it by default and if nobody complains, remove it later. Change-Id: If6512b019c3cc0441db311a3b590ab67b8db27f3 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/drivers/pc80/rtc/Kconfig M src/drivers/pc80/rtc/mc146818rtc.c 2 files changed, 14 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/56215/1 diff --git a/src/drivers/pc80/rtc/Kconfig b/src/drivers/pc80/rtc/Kconfig index 7958682..a8c6f38 100644 --- a/src/drivers/pc80/rtc/Kconfig +++ b/src/drivers/pc80/rtc/Kconfig @@ -9,3 +9,12 @@ depends on DRIVERS_MC146818 help May be useful for legacy OSs that assume its presence. + +config USE_PC_CMOS_CHECKSUM + bool "Maintain legacy-BIOS checksum in CMOS" + default y if !USE_OPTION_TABLE + depends on DRIVERS_MC146818 && USE_OPTION_TABLE + help + May be useful for legacy OSs that assume its presence. Also, + Linux' /dev/nvram checks it (but seems incompatible to our + option table). diff --git a/src/drivers/pc80/rtc/mc146818rtc.c b/src/drivers/pc80/rtc/mc146818rtc.c index e0c2400..a26ae2d 100644 --- a/src/drivers/pc80/rtc/mc146818rtc.c +++ b/src/drivers/pc80/rtc/mc146818rtc.c @@ -86,7 +86,7 @@ /* See if there has been a CMOS power problem. */ cmos_invalid = cmos_error(); - if (CONFIG(USE_OPTION_TABLE)) { + if (CONFIG(USE_PC_CMOS_CHECKSUM)) { /* See if there is a CMOS checksum error */ checksum_invalid = !cmos_checksum_valid(PC_CKS_RANGE_START, PC_CKS_RANGE_END, PC_CKS_LOC); @@ -128,8 +128,10 @@ if (checksum_invalid) printk(BIOS_DEBUG, "RTC: coreboot checksum invalid\n"); - /* Make certain we have a valid checksum */ - cmos_set_checksum(PC_CKS_RANGE_START, PC_CKS_RANGE_END, PC_CKS_LOC); + if (CONFIG(USE_PC_CMOS_CHECKSUM)) { + /* Make certain we have a valid checksum */ + cmos_set_checksum(PC_CKS_RANGE_START, PC_CKS_RANGE_END, PC_CKS_LOC); + } } /* Clear any pending interrupts */ -- To view, visit https://review.coreboot.org/c/coreboot/+/56215 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6512b019c3cc0441db311a3b590ab67b8db27f3 Gerrit-Change-Number: 56215 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/pc80/rtc: Make use of alt-century byte configurable
by Nico Huber (Code Review) 12 Jul '21

12 Jul '21

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56214 ) Change subject: drivers/pc80/rtc: Make use of alt-century byte configurable ...................................................................... drivers/pc80/rtc: Make use of alt-century byte configurable This legacy alt-century byte sits amidst CMOS and conflicts many option tables. It usually has no meaning to the hardware and needs to be main- tained manually. Let's disable its usage by default if the CMOS option table is enabled. Change-Id: Ifba3d77120c2474393ac5e64faac1baeeb58c893 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/drivers/pc80/rtc/Kconfig M src/drivers/pc80/rtc/mc146818rtc.c 2 files changed, 16 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/56214/1 diff --git a/src/drivers/pc80/rtc/Kconfig b/src/drivers/pc80/rtc/Kconfig index 350863e..7958682 100644 --- a/src/drivers/pc80/rtc/Kconfig +++ b/src/drivers/pc80/rtc/Kconfig @@ -2,3 +2,10 @@ bool default y if ARCH_X86 depends on PC80_SYSTEM + +config USE_PC_CMOS_ALTCENTURY + bool "Use legacy-BIOS alt-century byte in CMOS" + default y if !USE_OPTION_TABLE + depends on DRIVERS_MC146818 + help + May be useful for legacy OSs that assume its presence. diff --git a/src/drivers/pc80/rtc/mc146818rtc.c b/src/drivers/pc80/rtc/mc146818rtc.c index 42671a9..e0c2400 100644 --- a/src/drivers/pc80/rtc/mc146818rtc.c +++ b/src/drivers/pc80/rtc/mc146818rtc.c @@ -191,11 +191,11 @@ */ void cmos_check_update_date(void) { - u8 year, century; + u8 year, century = 0; - /* Assume hardware always supports RTC_CLK_ALTCENTURY. */ wait_uip(); - century = cmos_read(RTC_CLK_ALTCENTURY); + if (CONFIG(USE_PC_CMOS_ALTCENTURY)) + century = cmos_read(RTC_CLK_ALTCENTURY); year = cmos_read(RTC_CLK_YEAR); /* @@ -215,8 +215,8 @@ cmos_write(bin2bcd(time->mday), RTC_CLK_DAYOFMONTH); cmos_write(bin2bcd(time->mon), RTC_CLK_MONTH); cmos_write(bin2bcd(time->year % 100), RTC_CLK_YEAR); - /* Same assumption as above: We always have RTC_CLK_ALTCENTURY */ - cmos_write(bin2bcd(time->year / 100), RTC_CLK_ALTCENTURY); + if (CONFIG(USE_PC_CMOS_ALTCENTURY)) + cmos_write(bin2bcd(time->year / 100), RTC_CLK_ALTCENTURY); cmos_write(bin2bcd(time->wday + 1), RTC_CLK_DAYOFWEEK); return 0; } @@ -230,8 +230,10 @@ time->mday = bcd2bin(cmos_read(RTC_CLK_DAYOFMONTH)); time->mon = bcd2bin(cmos_read(RTC_CLK_MONTH)); time->year = bcd2bin(cmos_read(RTC_CLK_YEAR)); - /* Same assumption as above: We always have RTC_CLK_ALTCENTURY */ - time->year += bcd2bin(cmos_read(RTC_CLK_ALTCENTURY)) * 100; + if (CONFIG(USE_PC_CMOS_ALTCENTURY)) + time->year += bcd2bin(cmos_read(RTC_CLK_ALTCENTURY)) * 100; + else if (time->year <= 69) + time->year += 100; time->wday = bcd2bin(cmos_read(RTC_CLK_DAYOFWEEK)) - 1; return 0; } -- To view, visit https://review.coreboot.org/c/coreboot/+/56214 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifba3d77120c2474393ac5e64faac1baeeb58c893 Gerrit-Change-Number: 56214 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/volteer/baseboard: Configure chipset_lockdown seperately
by Angel Pons (Code Review) 12 Jul '21

12 Jul '21

Attention is currently required from: Felix Singer. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56209 ) Change subject: mb/google/volteer/baseboard: Configure chipset_lockdown seperately ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/volteer/variants/baseboard/devicetree.cb: https://review.coreboot.org/c/coreboot/+/56209/comment/7ce0a1af_29f95bce PS2, Line 328: CHIPSET_LOCKDOWN_COREBOOT Doesn't this need quotes? -- To view, visit https://review.coreboot.org/c/coreboot/+/56209 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I595c042cf62680d61f60965710d382bfdcd81671 Gerrit-Change-Number: 56209 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Mon, 12 Jul 2021 15:21:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Update generic device number for mipi_camera device
by Tim Wawrzynczak (Code Review) 12 Jul '21

12 Jul '21

Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56162 ) Change subject: mb/google/brya: Update generic device number for mipi_camera device ...................................................................... mb/google/brya: Update generic device number for mipi_camera device If two generic devices use the same number, device coming later overrides the earlier device, as a result of this the static.c has only one device. In the case where we have UFC set to UFC_USB, this will result in no IPU device scope in SSDT, since its entry will be set to disbled after UFC probe. TEST=Build, Boot and Check UFC camera preview with UFC=UFC_USB Signed-off-by: Varshit B Pandya <varshit.b.pandya(a)intel.com> Change-Id: I034cb7da787313d1cb53484922149589ac0f1c5a Reviewed-on: https://review.coreboot.org/c/coreboot/+/56162 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Reviewed-by: Subrata Banik <subrata.banik(a)intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/mainboard/google/brya/variants/brya0/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Maulik V Vaghela: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index eb0af99..d4653bc 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -149,7 +149,7 @@ register "cio2_lane_endpoint[1]" = ""^I2C2.CAM1"" register "cio2_prt[0]" = "2" register "cio2_prt[1]" = "1" - device generic 0 on + device generic 1 on probe UFC UFC_MIPI_5675 end end -- To view, visit https://review.coreboot.org/c/coreboot/+/56162 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I034cb7da787313d1cb53484922149589ac0f1c5a Gerrit-Change-Number: 56162 Gerrit-PatchSet: 4 Gerrit-Owner: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: merged

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coreboot-gerrit July 2021