Attention is currently required from: Tim Wawrzynczak, Michael Niewöhner.
Hello build bot (Jenkins), Tim Wawrzynczak, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56199
to look at the new patch set (#7).
Change subject: mb/google/volteer: Deduplicate lockdown config
......................................................................
mb/google/volteer: Deduplicate lockdown config
The setting `chipset_lockdown` has the same configuration for all
variants and they also match with the baseboard configuration. Thus,
remove it from the variant overridetrees.
Built google/delbin with `BUILD_TIMELESS=1` and coreboot.rom
remains the same.
Change-Id: I597e4487e7a0e1848d2a2f2c8f8ebd552994aac2
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/google/volteer/variants/chronicler/overridetree.cb
M src/mainboard/google/volteer/variants/collis/overridetree.cb
M src/mainboard/google/volteer/variants/copano/overridetree.cb
M src/mainboard/google/volteer/variants/delbin/overridetree.cb
M src/mainboard/google/volteer/variants/drobit/overridetree.cb
M src/mainboard/google/volteer/variants/eldrid/overridetree.cb
M src/mainboard/google/volteer/variants/elemi/overridetree.cb
M src/mainboard/google/volteer/variants/lindar/overridetree.cb
M src/mainboard/google/volteer/variants/volteer/overridetree.cb
M src/mainboard/google/volteer/variants/volteer2/overridetree.cb
10 files changed, 0 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/56199/7
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Hello Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56209
to look at the new patch set (#2).
Change subject: mb/google/volteer/baseboard: Configure chipset_lockdown seperately
......................................................................
mb/google/volteer/baseboard: Configure chipset_lockdown seperately
The configuration of the setting `chipset_lockdown` doesn't have any
effect for most of the variants since their configuration of
`common_soc_config` overwrites the configuration of the baseboard's
devicetree. If `chipset_lockdown` is configured seperetaly in the
baseboard devicetree, the variant overridetrees reuse its
configuration.
Thus, move `chipset_lockdown` out of `common_soc_config` in the
baseboard devicetree and configure it seperately.
Change-Id: I595c042cf62680d61f60965710d382bfdcd81671
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/google/volteer/variants/baseboard/devicetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/56209/2
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Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56209 )
Change subject: mb/google/volteer/baseboard: Configure chipset_lockdown seperately
......................................................................
mb/google/volteer/baseboard: Configure chipset_lockdown seperately
The configuration of the setting `chipset_lockdown` doesn't have any
effect for most of the variants since their configuration of
`common_soc_config` overwrites the configuration of `chipset_lockdown`
from the baseboard devicetree. If `chipset_lockdown` is configured
seperetaly in the baseboard devicetree, the variant overridetrees reuse
its configuration.
Thus, move `chipset_lockdown` out of `common_soc_config` in the
baseboard devicetree and configure it seperately.
Change-Id: I595c042cf62680d61f60965710d382bfdcd81671
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/google/volteer/variants/baseboard/devicetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/56209/1
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index 915553a..e2a84f8 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -325,8 +325,8 @@
#| I2C3 | Camera, SAR1 |
#| I2C5 | Trackpad |
#+-------------------+---------------------------+
+ register "common_soc_config.chipset_lockdown" = CHIPSET_LOCKDOWN_COREBOOT
register "common_soc_config" = "{
- .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
.gspi[0] = {
.speed_mhz = 1,
.early_init = 1,
--
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Attention is currently required from: Tim Wawrzynczak, Michael Niewöhner.
Hello build bot (Jenkins), Tim Wawrzynczak, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56199
to look at the new patch set (#6).
Change subject: mb/google/volteer: Deduplicate lockdown config
......................................................................
mb/google/volteer: Deduplicate lockdown config
The setting `chipset_lockdown` has the same configuration for all
variants and they also match with the baseboard configuration. Thus,
remove it from the variant overridetrees.
Built google/delbin with `BUILD_TIMELESS=1` and coreboot.rom
remains the same.
Change-Id: I597e4487e7a0e1848d2a2f2c8f8ebd552994aac2
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/google/volteer/variants/chronicler/overridetree.cb
M src/mainboard/google/volteer/variants/collis/overridetree.cb
M src/mainboard/google/volteer/variants/copano/overridetree.cb
M src/mainboard/google/volteer/variants/delbin/overridetree.cb
M src/mainboard/google/volteer/variants/drobit/overridetree.cb
M src/mainboard/google/volteer/variants/eldrid/overridetree.cb
M src/mainboard/google/volteer/variants/elemi/overridetree.cb
M src/mainboard/google/volteer/variants/lindar/overridetree.cb
M src/mainboard/google/volteer/variants/volteer/overridetree.cb
M src/mainboard/google/volteer/variants/volteer2/overridetree.cb
10 files changed, 0 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/56199/6
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56168 )
Change subject: drivers/intel/gma: Restructure Opregion version info code
......................................................................
Patch Set 6:
(1 comment)
File src/drivers/intel/gma/opregion.c:
https://review.coreboot.org/c/coreboot/+/56168/comment/37db905d_fb3b24b8
PS6, Line 261: 2
> Hi Angel/Subrata,
>
> Since it's SoC related setting, Can we have Kconfig defined here for OPREGION_VERSION and override value via SoC Kconfig?
> This way it'll be single Kconfig but one thing we need to ensure is that, developer/user don't fill incorrect value.
The best way no one fills in an incorrect value is to specify the values exactly once and not allow any overrides. This is why I'd prefer to have boolean Kconfig options: SoC Kconfig would only have to select the desired OpRegion version, and this code would transform the Kconfig selection into the corresponding version number.
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Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56168 )
Change subject: drivers/intel/gma: Restructure Opregion version info code
......................................................................
Patch Set 6:
(1 comment)
File src/drivers/intel/gma/opregion.c:
https://review.coreboot.org/c/coreboot/+/56168/comment/3df88a56_518e1ddd
PS6, Line 261: 2
> > > knowing that, Rev and Rsvd always having 0, can't we use below logic? Thoughts ? […]
Hi Angel/Subrata,
Since it's SoC related setting, Can we have Kconfig defined here for OPREGION_VERSION and override value via SoC Kconfig?
This way it'll be single Kconfig but one thing we need to ensure is that, developer/user don't fill incorrect value.
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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56188 )
Change subject: soc/amd/cezanne: ACPI CPPC support for AMD
......................................................................
Patch Set 2:
(6 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56188/comment/1f49da50_f3e96f65
PS2, Line 7:
i'd add an "add" here
https://review.coreboot.org/c/coreboot/+/56188/comment/303f7e49_bb31d602
PS2, Line 9: CPPC
might be good to have the acronym expanded in the commit message text. at least i had to look up what this is about
Patchset:
PS2:
haven't checked the msr numbers
File src/soc/amd/cezanne/cppc.h:
PS2:
this one should probably be moved to src/soc/amd/cezanne/include/soc/cppc.h
File src/soc/amd/cezanne/cppc_init.c:
PS2:
i'd move the contents of this file to cppc.c. since both get only built into ramstage, i don't really see the necessity to split it into 2 files
https://review.coreboot.org/c/coreboot/+/56188/comment/1b7ec433_35e36da4
PS2, Line 33: msr.addrl = 0xc00102b0;
would be good to have defines for those instead of the magic msr numbers here
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Patrick Georgi has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/55396 )
Change subject: console: Allow identifying if slow consoles are in use
......................................................................
Abandoned
not needed anymore
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Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45208 )
Change subject: console: Allow configuring log level through CBFS
......................................................................
Patch Set 15:
(1 comment)
File src/console/init.c:
https://review.coreboot.org/c/coreboot/+/45208/comment/afcfa7ba_7861b0e5
PS14, Line 31: console_loglevel = get_uint_option("debug_level", console_loglevel);
> It is kinda useful to run tests with coreboot serial logging effectively disabled through low log le […]
Done
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Hello build bot (Jenkins), Jakub Czapiga,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55397
to look at the new patch set (#5).
Change subject: cbtable: Store loglevel with consoles
......................................................................
cbtable: Store loglevel with consoles
This way payloads can make an informed decision if they should use
the serial console.
Signed-off-by: Patrick Georgi <pgeorgi(a)google.com>
Change-Id: Ic32603ffac8ec9955aefa3d608dd324da9271811
---
M payloads/libpayload/include/coreboot_tables.h
M src/commonlib/include/commonlib/coreboot_tables.h
M src/lib/coreboot_table.c
3 files changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/55397/5
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