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Hello build bot (Jenkins), Paul Menzel, Mario Scheithauer,
I'd like you to reexamine a change. Please visit
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Change subject: mb/siemens/mc_ehl: Enable master bit in PCI config space if allowed
......................................................................
mb/siemens/mc_ehl: Enable master bit in PCI config space if allowed
Some legacy devices need to have the master bit set in the PCI config
due to old drivers not setting it correctly. Set the master bit if the
feature is enabled via Kconfig switch PCI_ALLOW_BUS_MASTER_ANY_DEVICE.
For now, the PCI devices with the ID 110a:403e and 110a:403f needs this
master bit to be set.
Change-Id: Id3f6bda97e5f47d0613a1db8f8adac0b158ab8b1
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
---
M src/mainboard/siemens/mc_ehl/mainboard.c
1 file changed, 21 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/56632/3
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Hello build bot (Jenkins), Mario Scheithauer,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#3).
Change subject: mb/siemens/mc_ehl: Add code to wait for legacy devices before PCI scan
......................................................................
mb/siemens/mc_ehl: Add code to wait for legacy devices before PCI scan
Boards based on mc_ehl have, just like some mc_apl variants, legacy
devices on the PCI bus which take longer to boot. In order to ensure
that they will be enumerated correctly wait for them to come up before
PCI scan starts.
TEST=Checked that the new message is visible in the log.
Change-Id: If2f935b69ddaa9364566deacfada5e7d41fcdabd
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
---
M src/mainboard/siemens/mc_ehl/mainboard.c
1 file changed, 30 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/56631/3
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Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56631 )
Change subject: mb/siemens/mc_ehl: Add code to wait for legacy devices before PCI scan
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56631/comment/25d9c2d1_d03a5ee5
PS1, Line 13:
> For TEST=, you built the image and verified the new log message was there.
OK, I can add this line.
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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56651 )
Change subject: cpu/x86: Rename X86_AMD_INIT_SIPI to X86_INIT_SIPI
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
File src/cpu/x86/Kconfig:
https://review.coreboot.org/c/coreboot/+/56651/comment/ac660cbf_a99325d1
PS1, Line 177: newer AMD, Intel platforms don't need the 10ms wait between INIT and SIPI,
since this is a kconfig help text, the text should probably be reflowed to fit within 80 chars per line.
also maybe "AMD and Intel" instead of "AMD, Intel"?
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Change subject: mb/google/brya: add BASEBOARD_DIR to support different baseboard
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS4:
rebase to Top?
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Change subject: mb/siemens/mc_ehl: Add code to wait for legacy devices before PCI scan
......................................................................
Patch Set 2:
(1 comment)
File src/mainboard/siemens/mc_ehl/mainboard.c:
https://review.coreboot.org/c/coreboot/+/56631/comment/8036f2ec_79c642ca
PS1, Line 91: uint32_t
> Done
What other places are there? Using 32-bit type implies some restriction on the value, which seems unnecessary. In this case `get_us_since_boot()` returns uint32_t, which I did not check before.
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Change subject: mb/siemens/mc_ehl: Enable master bit in PCI config space if allowed
......................................................................
Patch Set 2: Code-Review+2
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Change subject: mb/siemens/mc_ehl: Enable master bit in PCI config space if allowed
......................................................................
Patch Set 2: Code-Review+1
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Change subject: mb/siemens/mc_ehl: Enable master bit in PCI config space if allowed
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56632/comment/18fb0785_6c37657f
PS1, Line 10: old drivers
> Done
Understood. People might ask themselves, if it was an old Linux version.
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Change subject: mb/siemens/mc_ehl: Add code to wait for legacy devices before PCI scan
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56631/comment/f8c77f0e_2915991f
PS1, Line 13:
> What du you mean by "as a test"?
For TEST=, you built the image and verified the new log message was there.
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