Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52846 )
Change subject: soc/intel/alderlake: Simplify FSP chipset lockdown configuration
......................................................................
Patch Set 5:
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Change subject: soc/intel/jasperlake: Simplify FSP chipset lockdown configuration
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Change subject: soc/intel/tigerlake: Simplify FSP chipset lockdown configuration
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Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52843 )
Change subject: soc/intel/skylake: Simplify FSP chipset lockdown configuration
......................................................................
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Change subject: soc/intel/cannonlake: Simplify FSP chipset lockdown configuration
......................................................................
Patch Set 3:
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Change subject: mb/google/zork/vilboz: Disable HDMI 2.0 for Vilboz
......................................................................
Patch Set 2: Code-Review+1
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Change subject: mb/google/zork/vilboz: Disable HDMI 2.0 for Vilboz
......................................................................
Patch Set 2:
(1 comment)
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PS2:
Hi Google,
Would you help to review the CL?
Thank you.
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Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52847 )
Change subject: drivers/i2c/generic: Set SW0 to 3 for wake device
......................................................................
drivers/i2c/generic: Set SW0 to 3 for wake device
If device is supported as a wake source, _S0W should be set to 3.
This ensures that the device is put into D3hot by the OSPM.
But, power resource is not turned off.
Hence, it still is capable of waking.
BUG=b:186070097
TEST=build and check device wake state SW0 set to 3 in ssdt table.
Change-Id: I34e4b2350875530d3337be700276bcc4fb1f810a
Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com>
---
M src/drivers/i2c/generic/generic.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/52847/1
diff --git a/src/drivers/i2c/generic/generic.c b/src/drivers/i2c/generic/generic.c
index 1c7267e..c1695f2 100644
--- a/src/drivers/i2c/generic/generic.c
+++ b/src/drivers/i2c/generic/generic.c
@@ -98,7 +98,7 @@
/* Wake capabilities */
if (config->wake) {
- acpigen_write_name_integer("_S0W", 4);
+ acpigen_write_name_integer("_S0W", 3);
acpigen_write_PRW(config->wake, 3);
}
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Ben Chuang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51000 )
Change subject: drivers/genesyslogic/gl9755: Disable the debug mode of short circuit protection
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> Ben, do you mind updating the commit msg?
Hi Tim, I don't mind updating the msg. Please tell me your opinion.
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Change subject: mb/intel/adlrvp: Enable support for Chrome OS mode switches
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS1:
> Done. […]
still failing due to VBOOT
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